int irq_init(uint8_t base)
{
uint8_t i;
printk("Setting up interrupts\n");
printk("\tRegistering all 16 IRQ in IDT\n");
interrupts_set_isr(32, irq0, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(33, irq1, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(34, irq2, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(35, irq3, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(36, irq4, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(37, irq5, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(38, irq6, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(39, irq7, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(40, irq8, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(41, irq9, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(42, irq10, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(43, irq11, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(44, irq12, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(45, irq13, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(46, irq14, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
interrupts_set_isr(47, irq15, INTGATE_PRESENT | INTGATE_32 | INTGATE_KERNEL);
printk("\tMasking all interrupts (0-15)\n");
for (i = 0; i < 16; ++i) {
irq_mask(i);
}
printk("\tEnabling hardware interrupts (sti)\n");
__asm__ volatile("sti");
printk("\n");
}
void irq_init()
{
pic_remap(0x20, 0x28);
irq_mask_all();
interrupts_set_isr(32, &isr32, ISR_KERNEL);
interrupts_set_isr(33, &isr33, ISR_KERNEL);
interrupts_set_isr(34, &isr34, ISR_KERNEL);
interrupts_set_isr(35, &isr35, ISR_KERNEL);
interrupts_set_isr(36, &isr36, ISR_KERNEL);
interrupts_set_isr(37, &isr37, ISR_KERNEL);
interrupts_set_isr(38, &isr38, ISR_KERNEL);
interrupts_set_isr(39, &isr39, ISR_KERNEL);
interrupts_set_isr(40, &isr40, ISR_KERNEL);
interrupts_set_isr(41, &isr41, ISR_KERNEL);
interrupts_set_isr(42, &isr42, ISR_KERNEL);
interrupts_set_isr(43, &isr43, ISR_KERNEL);
interrupts_set_isr(44, &isr44, ISR_KERNEL);
interrupts_set_isr(45, &isr45, ISR_KERNEL);
interrupts_set_isr(46, &isr46, ISR_KERNEL);
interrupts_set_isr(47, &isr47, ISR_KERNEL);
}
