static void clear_nic_irqs(void)
{
e1000_mmio_beg[E1000_ICR] |= E1000_IMS_RXT0;
// watch out for calling irq_eoi() before clearing rx irq in reg
lapic_eoi();
irq_eoi();
}
void int_handler(struct trap_frame *frame)
{
interrupt_handler_t handler = interrupt_handlers[frame->int_no];
if (frame->int_no >= 32) {
irq_eoi(frame->int_no);
}
if(handler){
handler(frame);
}else{
printk_color(COLOR_BLUE, COLOR_BLACK, "INT: %d NO HANDLER\n", frame->int_no);
}
}
void process_nic_interupt(void )
{
//check the status byte of the CSR to determine which interupts are
//enabled.
uint16_t csr_status;
csr_status = read_csr_status();
update_csr_status(csr_status );
cprintf("MANI - processing nic , status %x\n",csr_status);
//Now see which bits are enabled in the STAT/ACK byte
if( is_cx_enabled( csr_status) )
{
process_cx_bit_in_stat(csr_status);
}
if ( is_fr_enabled(csr_status))
{
process_fr_bit_in_stat(csr_status);
}
if ( is_cna_enabled(csr_status))
{
process_cna_bit_in_stat(csr_status);
}
if ( is_rnr_enabled(csr_status))
{
process_rnr_bit_in_stat(csr_status);
}
if ( is_mdi_enabled(csr_status))
{
process_mdi_bit_in_stat(csr_status);
}
if ( is_swi_enabled(csr_status))
{
process_swi_bit_in_stat(csr_status);
}
if ( is_fcp_enabled(csr_status))
{
process_fcp_bit_in_stat(csr_status);
}
irq_eoi();
return;
}
__XOK_SYNC(UAREA only modified when localized)
{
int stat;
irq_eoi (8);
/* MUST read to acknowledge the interrupt */
stat = mc146818_read(NULL, MC_REGC);
if (stat & MC_REGC_PF)
{
if ((!UAREA.u_pendrtc) && UAREA.u_entrtc)
{
tfp tf;
u_int *esp;
u_int tt_eip;
u_int old_pfm = page_fault_mode;
tfp_set (tf, trapno, tf_edi);
tt_eip = tf->tf_eip; /* trap time eip */
/* copy interrupt stack frame on to user stack */
page_fault_mode = PFM_PROP;
tf->tf_esp -= 12;
esp = trup ((u_int *)tf->tf_esp);
esp[2] = tf->tf_eflags;
esp[1] = tf->tf_cs;
esp[0] = tf->tf_eip;
page_fault_mode = old_pfm;
tf->tf_eip = UAREA.u_entrtc;
UAREA.u_pendrtc = 1;
env_upcall();
}
}
}
static void trap_dispatch(struct frame *tf)
{
switch(tf->tf_trapno)
{
case T_PGFLT:
{
//print_frame(tf);
do_page_fault(tf);
break;
}
case T_GPFLT:
{
panic("GPFLT!\n");
do_exit(curtask);
break;
}
case T_BRKPT :
{
print_frame(tf);
panic("break point handler not implemented!\n");
break;
}
case T_DIVIDE:
{
printk("CPU:%d USER T_DIVIDE\n",get_cpuid());
do_exit(curtask);
}
case T_SYSCALL:
{
tf->tf_regs.reg_eax = syscall_handler(tf);
break;
}
case IRQ_SPURIOUS:
{
printk("CPU:%d Spurious interrupt on irq 7\n",get_cpuid());
print_frame(tf);
return;
}
case IRQ_TIMER :
{
lapic_eoi();
schedule_tick();
break;
}
case IRQ_KBD :
{
irq_eoi();
printk("CPU:%d IRQ_KBD \n",get_cpuid());
inb(0x60);
break;
}
case IRQ_SERIAL :
{
panic("SERIAL handler not implemented!\n");
break;
}
case IRQ_IDE0 :
case IRQ_IDE1 :
{
irq_eoi();
do_hd_interrupt(tf);
break;
}
case IRQ_ERROR :
{
print_frame(tf);
panic("ERROR handler not implemented!\n");
break;
}
default:
{
if (tf->tf_cs == _KERNEL_CS_)
panic("unhandled trap in kernel");
else {
print_frame(tf);
return;
}
break;
}
}
}
void irq_slave() {
logmsgf("irq_stubB(), shouldn't happen\n");
irq_eoi();
}
void irq_handler(uint32_t irq_num) {
irq_happened[irq_num] = true;
intr_handler_f callee = irq[irq_num];
callee((void *)cpu_stack());
irq_eoi();
}
