/** * ixgbe_dcb_hw_config_82599 - Configure and enable DCB * @hw: pointer to hardware structure * @dcb_config: pointer to ixgbe_dcb_config structure * * Configure dcb settings and enable dcb mode. */ s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *hw, struct ixgbe_dcb_config *dcb_config) { ixgbe_dcb_config_packet_buffers_82599(hw, dcb_config); ixgbe_dcb_config_82599(hw); ixgbe_dcb_config_rx_arbiter_82599(hw, dcb_config); ixgbe_dcb_config_tx_desc_arbiter_82599(hw, dcb_config); ixgbe_dcb_config_tx_data_arbiter_82599(hw, dcb_config); ixgbe_dcb_config_pfc_82599(hw, dcb_config); ixgbe_dcb_config_tc_stats_82599(hw); return 0; }
/** * ixgbe_dcb_hw_config_cee - Config and enable DCB * @hw: pointer to hardware structure * @dcb_config: pointer to ixgbe_dcb_config structure * * Configure dcb settings and enable dcb mode. */ s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw, struct ixgbe_dcb_config *dcb_config) { s32 ret = IXGBE_NOT_IMPLEMENTED; u8 pfc_en; u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Unpack CEE standard containers */ ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); ixgbe_dcb_unpack_max_cee(dcb_config, max); ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); hw->mac.ops.setup_rxpba(hw, dcb_config->num_tcs.pg_tcs, 0, dcb_config->rx_pba_cfg); switch (hw->mac.type) { case ixgbe_mac_82598EB: ret = ixgbe_dcb_hw_config_82598(hw, dcb_config->link_speed, refill, max, bwgid, tsa); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: case ixgbe_mac_X550: case ixgbe_mac_X550EM_x: #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT) ixgbe_dcb_config_82599(hw, dcb_config); ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->link_speed, refill, max, bwgid, tsa, map); ixgbe_dcb_config_tc_stats_82599(hw, dcb_config); break; #endif default: break; } if (!ret && dcb_config->pfc_mode_enable) { ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en); ret = ixgbe_dcb_config_pfc(hw, pfc_en, map); } return ret; }
/** * ixgbe_dcb_hw_config_82599 - Configure and enable DCB * @hw: pointer to hardware structure * @rx_pba: method to distribute packet buffer * @refill: refill credits index by traffic class * @max: max credits index by traffic class * @bwg_id: bandwidth grouping indexed by traffic class * @prio_type: priority type indexed by traffic class * @pfc_en: enabled pfc bitmask * * Configure dcb settings and enable dcb mode. */ s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *hw, u8 rx_pba, u8 pfc_en, u16 *refill, u16 *max, u8 *bwg_id, u8 *prio_type, u8 *prio_tc) { ixgbe_dcb_config_packet_buffers_82599(hw, rx_pba); ixgbe_dcb_config_82599(hw); ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id, prio_type, prio_tc); ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id, prio_type); ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id, prio_type, prio_tc); ixgbe_dcb_config_pfc_82599(hw, pfc_en); ixgbe_dcb_config_tc_stats_82599(hw); return 0; }