void boot(void)
{
// note: function changes rsp, local stack variables can't be practically used
register char *temp1, *temp2;
__asm__(
"movq %%rsp, %0;"
"movq %1, %%rsp;"
:"=g"(loader_stack)
:"r"(&stack[INITIAL_STACK_SIZE])
);
reload_gdt();
__asm__("cli");
load_idt();
setup_tss();
start(
(uint32_t*)((char*)(uint64_t)loader_stack[3] + (uint64_t)&kernmem - (uint64_t)&physbase),
&physbase,
(void*)(uint64_t)loader_stack[4]
);
for(
temp1 = "!!!!! start() returned !!!!!", temp2 = (char*)0xb8000;
*temp1;
temp1 += 1, temp2 += 2
) *temp2 = *temp1;
while(1);
}
static int isr_hooker_init(void)
{
gate_desc *old_idt, *new_idt;
unsigned long new_idt_page;
pr_info("%s\n", __func__);
/* obtain IDT descriptor */
store_idt(&old_idtr);
old_idt = (gate_desc *)old_idtr.address;
/* prepare new IDT */
new_idt_page = __get_free_page(GFP_KERNEL);
if(!new_idt_page)
return -ENOMEM;
new_idtr.address = new_idt_page;
new_idtr.size = old_idtr.size;
new_idt = (gate_desc *)new_idtr.address;
memcpy(new_idt, old_idt, old_idtr.size);
/* modify the target entry */
orig_isr = gate_offset(new_idt[TRAP_NR]);
pr_info("orig_isr@%p\n", (void*)orig_isr);
pack_gate(&new_idt[TRAP_NR], GATE_INTERRUPT, (unsigned long)stub, 0, 0, __KERNEL_CS);
/* setup new entry */
load_idt((void *)&new_idtr);
smp_call_function((smp_call_func_t)load_idt, &new_idtr, 1);
return 0;
}
void init_kernel()
{
terminal_initialize();
init_serial(COM1);
terminal_enable_serial_echo(COM1);
terminal_printf("fOS version %s\n\n\n", KERNEL_VERSION);
kinit(end + 4096, end + 4096 + (100 * 4096));
init_gdt();
load_gdt();
load_idt();
load_isrs();
irq_install();
asm volatile ( "sti" );
timer_install();
sleep(1);
keyboard_install();
init_paging();
switch_to_paging();
}
void idt_init(void)
{
unsigned long keyboard_address;
unsigned long idt_address;
unsigned long idt_ptr[2];
keyboard_address = (unsigned long)keyboard_handler;
IDT[0x21].offset_lowerbits = keyboard_address & 0xffff;
IDT[0x21].selector = KERNEL_CODE_SEGMENT_OFFSET;
IDT[0x21].zero = 0;
IDT[0x21].type_attr = INTERRUPT_GATE;
IDT[0x21].offset_higherbits = (keyboard_address & 0xffff0000) >> 16;
write_port(0x20 , 0x11);
write_port(0xA0 , 0x11);
write_port(0x21 , 0x20);
write_port(0xA1 , 0x28);
write_port(0x21 , 0x00);
write_port(0xA1 , 0x00);
write_port(0x21 , 0x01);
write_port(0xA1 , 0x01);
write_port(0x21 , 0xff);
write_port(0xA1 , 0xff);
idt_address = (unsigned long)IDT ;
idt_ptr[0] = (sizeof (struct IDT_entry) * IDT_SIZE) + ((idt_address & 0xffff) << 16);
idt_ptr[1] = idt_address >> 16 ;
load_idt(idt_ptr);
}
void install_idt() {
unsigned long idt_size = (sizeof(struct idt_entry) * 256) - 1;
idtp.limit = idt_size;
idtp.base = &idt;
memset(&idt, 0, idt_size);
load_idt();
}
void __init load_gdt_idt(int cpu)
{
/*gdt */
switch_to_new_gdt(cpu);
/*idt*/
load_idt((const struct desc_ptr *)&idt_descr);
}
void __init x86_64_start_kernel(char * real_mode_data)
{
int i;
/* clear bss before set_intr_gate with early_idt_handler */
clear_bss();
/* Make NULL pointers segfault */
zap_identity_mappings();
for (i = 0; i < IDT_ENTRIES; i++)
set_intr_gate(i, early_idt_handler);
load_idt((const struct desc_ptr *)&idt_descr);
early_printk("Kernel alive\n");
for (i = 0; i < NR_CPUS; i++)
cpu_pda(i) = &boot_cpu_pda[i];
pda_init(0);
copy_bootdata(__va(real_mode_data));
#ifdef CONFIG_SMP
cpu_set(0, cpu_online_map);
#endif
start_kernel();
}
/*初始化IDT，并加载*/
void init_idt(void)
{
/*初始化中断门描述符*/
init_idt_des ((u32) divide_error, DPL0,\
IDT_INT, VECTOR_DIVIDE_ERROR);
init_idt_des ((u32) debug, DPL0,\
IDT_INT, VECTOR_DEBUG);
init_idt_des ((u32) nmi, DPL0, IDT_INT, VECTOR_NMI);
init_idt_des ((u32) int3, DPL0, IDT_INT, VECTOR_INT3);
init_idt_des ((u32) overflow, DPL0,\
IDT_INT,VECTOR_OVERFLOW );
init_idt_des ((u32) bounds, DPL0,\
IDT_INT, VECTOR_BOUNDS);
init_idt_des ((u32) invalid_op, DPL0,\
IDT_INT, VECTOR_INVALID_OP);
init_idt_des ((u32) device_not_available, DPL0,\
IDT_INT, VECTOR_DEVICE_NOT_AVAILABLE);
init_idt_des ((u32) doublefault_fn, DPL0,\
IDT_INT, VECTOR_DOUBLEFAULT_FN);
init_idt_des ((u32) coprocessor_segment_overrun, DPL0,\
IDT_INT, VECTOR_COPROCESSOR_SEGMENT_OVERRUN);
init_idt_des ((u32) invalid_tss, DPL0,\
IDT_INT, VECTOR_INVALID_TSS);
init_idt_des ((u32) segment_not_present, DPL0,\
IDT_INT, VECTOR_SEGMENT_NOT_PRESENT);
init_idt_des ((u32) stack_segment, DPL0,\
IDT_INT, VECTOR_STACK_SEGMENT);
init_idt_des ((u32) general_protection, DPL0,\
IDT_INT, VECTOR_GENERAL_PROTECTION);
init_idt_des ((u32) page_fault, DPL0,\
IDT_INT, VECTOR_PAGE_FAULT);
init_idt_des ((u32) coprocessor_error, DPL0,\
IDT_INT, VECTOR_COPROCESSOR_ERROR);
/*初始化异常描述符*/
init_idt_des ((u32) hwint00, DPL0, IDT_INT, IRQ0_VECTOR);
init_idt_des ((u32) hwint01, DPL0, IDT_INT, IRQ1_VECTOR);
init_idt_des ((u32) hwint02, DPL0, IDT_INT, IRQ2_VECTOR);
init_idt_des ((u32) hwint03, DPL0, IDT_INT, IRQ3_VECTOR);
init_idt_des ((u32) hwint04, DPL0, IDT_INT, IRQ4_VECTOR);
init_idt_des ((u32) hwint05, DPL0, IDT_INT, IRQ5_VECTOR);
init_idt_des ((u32) hwint06, DPL0, IDT_INT, IRQ6_VECTOR);
init_idt_des ((u32) hwint07, DPL0, IDT_INT, IRQ7_VECTOR);
init_idt_des ((u32) hwint08, DPL0, IDT_INT, IRQ8_VECTOR);
init_idt_des ((u32) hwint09, DPL0, IDT_INT, IRQ9_VECTOR);
init_idt_des ((u32) hwint10, DPL0, IDT_INT, IRQ10_VECTOR);
init_idt_des ((u32) hwint11, DPL0, IDT_INT, IRQ11_VECTOR);
init_idt_des ((u32) hwint12, DPL0, IDT_INT, IRQ12_VECTOR);
init_idt_des ((u32) hwint13, DPL0, IDT_INT, IRQ13_VECTOR);
init_idt_des ((u32) hwint14, DPL0, IDT_INT, IRQ14_VECTOR);
init_idt_des ((u32) hwint15, DPL0, IDT_INT, IRQ15_VECTOR);
/*初始化idt base及limit,并加在到idtr寄存器*/
u16 *idt_limit = (u16 *) (&idt_ptr[0]);
u32 *idt_base = (u32 *) (&idt_ptr[2]);
*idt_limit = IDT_SIZE * sizeof (GATE) - 1;
*idt_base = (u32) &IDT;
load_idt ();
}
// Initialize and load the IDT.
void setup_idt (void)
{
idt_ptr.size = (sizeof (idt_entry) * 256) - 1;
idt_ptr.address = (uint32_t) &idt;
set_idt_entry (0, (uint32_t) &exc0);
set_idt_entry (1, (uint32_t) &exc1);
set_idt_entry (2, (uint32_t) &exc2);
set_idt_entry (3, (uint32_t) &exc3);
set_idt_entry (4, (uint32_t) &exc4);
set_idt_entry (5, (uint32_t) &exc5);
set_idt_entry (6, (uint32_t) &exc6);
set_idt_entry (7, (uint32_t) &exc7);
set_idt_entry (8, (uint32_t) &exc8);
set_idt_entry (9, (uint32_t) &exc9);
set_idt_entry (10, (uint32_t) &exc10);
set_idt_entry (11, (uint32_t) &exc11);
set_idt_entry (12, (uint32_t) &exc12);
set_idt_entry (13, (uint32_t) &exc13);
set_idt_entry (14, (uint32_t) &exc14);
set_idt_entry (15, (uint32_t) &exc15);
set_idt_entry (16, (uint32_t) &exc16);
set_idt_entry (17, (uint32_t) &exc17);
set_idt_entry (18, (uint32_t) &exc18);
set_idt_entry (19, (uint32_t) &exc19);
set_idt_entry (20, (uint32_t) &exc20);
set_idt_entry (21, (uint32_t) &exc21);
set_idt_entry (22, (uint32_t) &exc22);
set_idt_entry (23, (uint32_t) &exc23);
set_idt_entry (24, (uint32_t) &exc24);
set_idt_entry (25, (uint32_t) &exc25);
set_idt_entry (26, (uint32_t) &exc26);
set_idt_entry (27, (uint32_t) &exc27);
set_idt_entry (28, (uint32_t) &exc28);
set_idt_entry (29, (uint32_t) &exc29);
set_idt_entry (30, (uint32_t) &exc30);
set_idt_entry (31, (uint32_t) &exc31);
remap_pics ();
set_idt_entry (32, (uint32_t) &irq0);
set_idt_entry (33, (uint32_t) &irq1);
set_idt_entry (34, (uint32_t) &irq2);
set_idt_entry (35, (uint32_t) &irq3);
set_idt_entry (36, (uint32_t) &irq4);
set_idt_entry (37, (uint32_t) &irq5);
set_idt_entry (38, (uint32_t) &irq6);
set_idt_entry (39, (uint32_t) &irq7);
set_idt_entry (40, (uint32_t) &irq8);
set_idt_entry (41, (uint32_t) &irq9);
set_idt_entry (42, (uint32_t) &irq10);
set_idt_entry (43, (uint32_t) &irq11);
set_idt_entry (44, (uint32_t) &irq12);
set_idt_entry (45, (uint32_t) &irq13);
set_idt_entry (46, (uint32_t) &irq14);
set_idt_entry (47, (uint32_t) &irq15);
load_idt ();
}
static void setup_idt(void)
{
for (int i = 0; i < EXCEPTION_GATES; i ++)
set_intr_gate(i, &idt_exception_stubs[i]);
set_intr_gate(HALT_CPU_IPI_VECTOR, halt_cpu_ipi_handler);
load_idt(&idtdesc);
}
void __init idt_init(void)
{
int count;
for(count = 0; count < 256; count++)
idt_exception(int_null, count);
/* Standard fault/trap handlers */
idt_exception(_exc0, 0);
idt_exception(_exc1, 1);
idt_exception(_exc2, 2);
idt_exception(_exc3, 3);
idt_exception(_exc4, 4);
idt_exception(_exc5, 5);
idt_exception(_exc6, 6);
idt_exception(_exc7, 7);
idt_exception(_exc8, 8);
idt_exception(_exc9, 9);
idt_exception(_exc10, 10);
idt_exception(_exc11, 11);
idt_exception(_exc12, 12);
idt_exception(_exc13, 13);
idt_exception(_exc14, 14);
/* exception 15 is resrved */
idt_exception(_exc16, 16);
idt_exception(_exc17, 17);
idt_exception(_exc18, 18);
idt_exception(_exc19, 19);
/* 20 -> 32 are reserved */
/* Interrupts caused by externally
* generated IRQ lines */
idt_interrupt(_irq0, 0x20);
idt_interrupt(_irq1, 0x21);
idt_interrupt(_irq2, 0x22);
idt_interrupt(_irq3, 0x23);
idt_interrupt(_irq4, 0x24);
idt_interrupt(_irq5, 0x25);
idt_interrupt(_irq6, 0x26);
idt_interrupt(_irq7, 0x27);
idt_interrupt(_irq8, 0x28);
idt_interrupt(_irq9, 0x29);
idt_interrupt(_irq10, 0x30);
idt_interrupt(_irq11, 0x3a);
idt_interrupt(_irq12, 0x3b);
idt_interrupt(_irq13, 0x3c);
idt_interrupt(_irq14, 0x3d);
idt_interrupt(_irq15, 0x3e);
/* System call */
idt_interrupt(_panic, 0xf0);
idt_user_interrupt(_syscall, 0xff);
/* Yay - we're finished */
load_idt(&loadidt);
}
static void isr_hooker_exit(void)
{
pr_info("%s: # of occurrence in trap(%d) = %d\n", __func__, TRAP_NR, cnt);
/* restore entry */
load_idt((void *)&old_idtr);
smp_call_function((smp_call_func_t)load_idt, &old_idtr, 1);
free_page(new_idtr.address);
}
void unregister_my_page_fault_handler(void){
struct desc_ptr idtr;
store_idt(&idtr);
//if the current idt is not the default one, restore the default one
if(idtr.address != default_idtr.address || idtr.size != default_idtr.size){
load_idt(&default_idtr);
smp_call_function(my_load_idt, (void *)&default_idtr, 1);
free_page(new_idt_table_page);
}
}
static void set_idt(void *newidt, __u16 limit)
{
struct desc_ptr curidt;
/* ia32 supports unaliged loads & stores */
curidt.size = limit;
curidt.address = (unsigned long)newidt;
load_idt(&curidt);
}
NTSTATUS onClose(PDEVICE_OBJECT device_object, PIRP irp)
{
/* Would hold the return code of the function */
NTSTATUS return_ntstatus = STATUS_SUCCESS;
UNREFERENCED_PARAMETER(device_object);
UNREFERENCED_PARAMETER(irp);
PAGED_CODE();
KdPrint(( "Oregano: on_close: Start\r\n" ));
/* Stop any active trace */
stopTracing();
/* Unhook poor trap interrupt, if needed to... */
if( 0 != orgTrapInterrupt ) {
/* Would hold the current IDT address */
idt_t idt = {0};
/* Would hold int1 info, original and new one */
interrupt_info_t int1_info = {0};
/* Used only for setting the int address in the int1 info structure */
MACHINE_LONG trap_interrupt_address = 0;
KdPrint(( "Oregano: on_close: Unhooking trap interrupt\r\n" ));
/* First get the idt address */
#ifndef AMD64
load_idt( &idt );
#else
loadIdt64( &idt );
#endif
/* Get the current int1 function */
get_interrupt_info( &idt, 1, &int1_info );
/* Set back the old int1 */
#ifdef i386
trap_interrupt_address = (MACHINE_LONG)orgTrapInterrupt;
int1_info.low_offset = (unsigned short)trap_interrupt_address;
trap_interrupt_address >>= 16;
int1_info.high_offset = (unsigned short)trap_interrupt_address;
#elif AMD64
trap_interrupt_address = (MACHINE_LONG)orgTrapInterrupt;
int1_info.low_offset = (unsigned short)trap_interrupt_address;
trap_interrupt_address >>= 16;
int1_info.middle_offset = (unsigned short)trap_interrupt_address;
trap_interrupt_address >>= 16;
int1_info.high_offset = (unsigned long)trap_interrupt_address;
#endif
hookAllCPUs( 1, &int1_info );
orgTrapInterrupt = NULL;
KdPrint(( "Oregano: on_close: Unhook done.\r\n" ));
}
void unregisterPageFaultListener(void){
struct desc_ptr idtr;
store_idt(&idtr);
//if the current idt is not the default one, restore the default one
if(idtr.address != defaultIDTR.address || idtr.size != defaultIDTR.size){
load_idt(&defaultIDTR);
smp_call_function(loadMyIDTTable, (void *)&defaultIDTR, 1);
free_page(newIDTTablePage);
}
debugfs_remove(file);
}
void new_tracker_transforms(int n)
{
transforms = n;
if ((transform = (struct transform *) calloc(n, sizeof (struct transform))))
{
int i;
for (i = 0; i < transforms; ++i)
{
load_idt(transform[i].M);
load_idt(transform[i].I);
transform[i].a[0] = 1;
transform[i].a[1] = 0;
transform[i].a[2] = 2;
}
}
}
static void __cpuinit trap_init_f00f_bug(void)
{
__set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
/*
* Update the IDT descriptor and reload the IDT so that
* it uses the read-only mapped virtual address.
*/
idt_descr.address = fix_to_virt(FIX_F00F_IDT);
load_idt(&idt_descr);
}
void install_idt() {
// Set up a special pointer to the IDT.
idtp.limit = (sizeof(idt_entry_t) * 256) - 1;
idtp.base = (uint32_t) &idt;
// Set everything inside the IDT to zeros.
memset(&idt, 0, sizeof(idt_entry_t) * 256);
// Add ISRs to the IDT here.
// Tell the processor where the new IDT is.
load_idt();
}
asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
{
int i;
/*
* Build-time sanity checks on the kernel image and module
* area mappings. (these are purely build-time and produce no code)
*/
BUILD_BUG_ON(MODULES_VADDR < __START_KERNEL_map);
BUILD_BUG_ON(MODULES_VADDR - __START_KERNEL_map < KERNEL_IMAGE_SIZE);
BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);
BUILD_BUG_ON((__START_KERNEL_map & ~PMD_MASK) != 0);
BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0);
BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
(__START_KERNEL & PGDIR_MASK)));
BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
cr4_init_shadow();
/* Kill off the identity-map trampoline */
reset_early_page_tables();
clear_bss();
clear_page(init_level4_pgt);
kasan_early_init();
for (i = 0; i < NUM_EXCEPTION_VECTORS; i++)
set_intr_gate(i, early_idt_handler_array[i]);
load_idt((const struct desc_ptr *)&idt_descr);
copy_bootdata(__va(real_mode_data));
/*
* Load microcode early on BSP.
*/
load_ucode_bsp();
/* set init_level4_pgt kernel high mapping*/
init_level4_pgt[511] = early_level4_pgt[511];
x86_64_start_reservations(real_mode_data);
}
/*
* Initialize the interrupt system.
*/
general_error interrupt_init(void)
{
int i; /* Loop counter. */
/* Initialize the IDT. */
initialize_idt();
/* Load the IDT. */
load_idt(&idt_pointer);
/* Load the jump table. */
for (i=0; i<=255; i++)
interrupt_handler_table[i] = &default_interrupt_handler;
/* If this goes wrong, there's little we can do about it. In
* fact, we will have probably already crashed by now. */
return GENERAL_OK;
}
static void __restore_processor_state(struct saved_context *ctxt)
{
/*
* control registers
*/
/* cr4 was introduced in the Pentium CPU */
if (ctxt->cr4)
write_cr4(ctxt->cr4);
write_cr3(ctxt->cr3);
write_cr2(ctxt->cr2);
write_cr0(ctxt->cr0);
/*
* now restore the descriptor tables to their proper values
* ltr is done i fix_processor_context().
*/
load_gdt(&ctxt->gdt);
load_idt(&ctxt->idt);
/*
* segment registers
*/
loadsegment(es, ctxt->es);
loadsegment(fs, ctxt->fs);
loadsegment(gs, ctxt->gs);
loadsegment(ss, ctxt->ss);
/*
* sysenter MSRs
*/
if (boot_cpu_has(X86_FEATURE_SEP))
enable_sep_cpu();
/*
* restore XCR0 for xsave capable cpu's.
*/
if (cpu_has_xsave)
xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask);
fix_processor_context();
do_fpu_end();
mtrr_ap_init();
mcheck_init(&boot_cpu_data);
}
void __init x86_64_start_kernel(char * real_mode_data)
{
int i;
/*
* Build-time sanity checks on the kernel image and module
* area mappings. (these are purely build-time and produce no code)
*/
BUILD_BUG_ON(MODULES_VADDR < KERNEL_IMAGE_START);
BUILD_BUG_ON(MODULES_VADDR-KERNEL_IMAGE_START < KERNEL_IMAGE_SIZE);
BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);
BUILD_BUG_ON((KERNEL_IMAGE_START & ~PMD_MASK) != 0);
BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0);
BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
(__START_KERNEL & PGDIR_MASK)));
BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
/* clear bss before set_intr_gate with early_idt_handler */
clear_bss();
/* Make NULL pointers segfault */
zap_identity_mappings();
/* Cleanup the over mapped high alias */
cleanup_highmap();
for (i = 0; i < NUM_EXCEPTION_VECTORS; i++) {
#ifdef CONFIG_EARLY_PRINTK
set_intr_gate(i, &early_idt_handlers[i]);
#else
set_intr_gate(i, early_idt_handler);
#endif
}
load_idt((const struct desc_ptr *)&idt_descr);
early_printk("Kernel alive\n");
x86_64_init_pda();
early_printk("Kernel really alive\n");
x86_64_start_reservations(real_mode_data);
}
void __init x86_64_start_kernel(char * real_mode_data)
{
int i;
/*
* Build-time sanity checks on the kernel image and module
* area mappings. (these are purely build-time and produce no code)
*/
/* 문제 있으면 BUILD_BUG_ON 매크로로 컴파일시 에러가 뜬다. */
/* 커널 이미지 크기가 커서 모듈 주소를 침범하면 에러발생 */
BUILD_BUG_ON(MODULES_VADDR < KERNEL_IMAGE_START);
BUILD_BUG_ON(MODULES_VADDR-KERNEL_IMAGE_START < KERNEL_IMAGE_SIZE);
BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);
BUILD_BUG_ON((KERNEL_IMAGE_START & ~PMD_MASK) != 0);
BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0);
BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
(__START_KERNEL & PGDIR_MASK)));
BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
/* clear bss before set_intr_gate with early_idt_handler */
/* bss 초기화 (__bss_start부터 __bss_stop) */
clear_bss();
/* Make NULL pointers segfault */
zap_identity_mappings();
max_pfn_mapped = KERNEL_IMAGE_SIZE >> PAGE_SHIFT; /* 512M / 4K 매핑되는 최대 페이지 프레임 넘버*/
/* 예외 처리 인터럽트들 설정 */
for (i = 0; i < NUM_EXCEPTION_VECTORS; i++) {
#ifdef CONFIG_EARLY_PRINTK
set_intr_gate(i, &early_idt_handlers[i]); /* 인터럽트 예외처리 루틴들을 쓴다. */
#else
set_intr_gate(i, early_idt_handler);
#endif
}
load_idt((const struct desc_ptr *)&idt_descr); /* lidt로 interrupt descriptor table을 읽어온다. */
if (console_loglevel == 10)
early_printk("Kernel alive\n");
x86_64_start_reservations(real_mode_data);
}
void init_idt()
{
int i;
const static int_handler handlers[16] = {
divide_error,
single_step_exception,
nmi,
breakpoint_exception,
overflow,
bounds_check,
inval_opcode,
copr_not_available,
double_fault,
copr_seg_overrun,
inval_tss,
segment_not_present,
stack_exception,
general_protection,
page_fault,
copr_error
};
for(i = 0; i <= 14; ++i) {
init_idt_desc(i, DA_386IGate,
handlers[i], PRIVILEGE_KRNL);
}
init_idt_desc(16, DA_386IGate,
handlers[15], PRIVILEGE_KRNL);
for(i = 0x20; i < IDTSIZE; ++i) {
init_idt_desc(i, DA_386IGate,
hwint00, PRIVILEGE_KRNL);
}
u16* p_idt_limit = (u16*)(&g_idt_ptr[0]);
u32* p_idt_base = (u32*)(&g_idt_ptr[2]);
*p_idt_limit = IDTSIZE * sizeof(gate) - 1;
*p_idt_base = (u32)&g_idt;
load_idt(g_idt_ptr);
}
void init_idt(void)
{
idt_address.base = (uint32_t) &idt_descriptors;
idt_address.limit = sizeof (idt_descriptor_t) * 255 - 1;
k_memset(&idt_descriptors, 0, idt_address.limit);
idt_set_descriptor(0, (uint32_t) &isr0, 0x08, 0x08E);
idt_set_descriptor(1, (uint32_t) &isr1, 0x08, 0x08E);
idt_set_descriptor(2, (uint32_t) &isr2, 0x08, 0x08E);
idt_set_descriptor(3, (uint32_t) &isr3, 0x08, 0x08E);
idt_set_descriptor(4, (uint32_t) &isr4, 0x08, 0x08E);
idt_set_descriptor(5, (uint32_t) &isr5, 0x08, 0x08E);
idt_set_descriptor(6, (uint32_t) &isr6, 0x08, 0x08E);
idt_set_descriptor(7, (uint32_t) &isr7, 0x08, 0x08E);
idt_set_descriptor(8, (uint32_t) &isr8, 0x08, 0x08E);
idt_set_descriptor(9, (uint32_t) &isr9, 0x08, 0x08E);
idt_set_descriptor(10, (uint32_t) &isr10, 0x08, 0x08E);
idt_set_descriptor(11, (uint32_t) &isr11, 0x08, 0x08E);
idt_set_descriptor(12, (uint32_t) &isr12, 0x08, 0x08E);
idt_set_descriptor(13, (uint32_t) &isr13, 0x08, 0x08E);
idt_set_descriptor(14, (uint32_t) &isr14, 0x08, 0x08E);
idt_set_descriptor(15, (uint32_t) &isr15, 0x08, 0x08E);
idt_set_descriptor(16, (uint32_t) &isr16, 0x08, 0x08E);
idt_set_descriptor(17, (uint32_t) &isr17, 0x08, 0x08E);
idt_set_descriptor(18, (uint32_t) &isr18, 0x08, 0x08E);
idt_set_descriptor(19, (uint32_t) &isr19, 0x08, 0x08E);
idt_set_descriptor(20, (uint32_t) &isr20, 0x08, 0x08E);
idt_set_descriptor(21, (uint32_t) &isr21, 0x08, 0x08E);
idt_set_descriptor(22, (uint32_t) &isr22, 0x08, 0x08E);
idt_set_descriptor(23, (uint32_t) &isr23, 0x08, 0x08E);
idt_set_descriptor(24, (uint32_t) &isr24, 0x08, 0x08E);
idt_set_descriptor(25, (uint32_t) &isr25, 0x08, 0x08E);
idt_set_descriptor(26, (uint32_t) &isr26, 0x08, 0x08E);
idt_set_descriptor(27, (uint32_t) &isr27, 0x08, 0x08E);
idt_set_descriptor(28, (uint32_t) &isr28, 0x08, 0x08E);
idt_set_descriptor(29, (uint32_t) &isr29, 0x08, 0x08E);
idt_set_descriptor(30, (uint32_t) &isr30, 0x08, 0x08E);
idt_set_descriptor(31, (uint32_t) &isr31, 0x08, 0x08E);
load_idt((uint32_t) &idt_address);
}
void set_idtr(void)
{
int i;
for(i = 0; i <= NUM_IDT; i++){
set_idt(&idt[i], (unsigned int)asm_int_ignore, 0x08, 1, 0, 1);
}
// exception
// Div by 0
set_idt(&idt[0x00], (unsigned int)asm_int_div_by_0, 0x08, 1, 0, 1);
set_idt(&idt[0x20], (unsigned int)asm_int_timer0, 0x08, 1, 0, 1);
set_idt(&idt[0x21], (unsigned int)asm_int_keyboard, 0x08, 1, 0, 1);
idtr.size = NUM_IDT * sizeof(GATE_DESCRIPTOR);
idtr.base = (GATE_DESCRIPTOR *)idt;
load_idt();
}
int registerPageFaultListener(void){
struct desc_ptr idtr;
gate_desc *old_idt, *new_idt;
int retval;
//first, do some initialization work.
retval = initMyFault();
if(retval)
return retval;
//record the default idtr
store_idt(&defaultIDTR);
//read the content of idtr register and get the address of old IDT table
old_idt = (gate_desc *)defaultIDTR.address; //'defaultIDTR' is initialized in 'my_virt_drv_init'
//allocate a page to store the new IDT table
printk(KERN_INFO "Page fault Listener: alloc a page to store new idt table.\n");
newIDTTablePage = __get_free_page(GFP_KERNEL);
if(!newIDTTablePage)
return -ENOMEM;
idtr.address = newIDTTablePage;
idtr.size = defaultIDTR.size;
//copy the old idt table to the new one
new_idt = (gate_desc *)idtr.address;
memcpy(new_idt, old_idt, idtr.size);
pack_gate(&new_idt[PGFAULT_NR], GATE_INTERRUPT, (unsigned long)customPageFault, 0, 0, __KERNEL_CS);
//load idt for all the processors
printk(KERN_INFO "Page fault Listener: Load the new idt table.\n");
load_idt(&idtr);
printk(KERN_INFO "Page fault Listener: new idt table loaded.\n");
smp_call_function(loadMyIDTTable, (void *)&idtr, 1); //wait till all are finished
printk(KERN_INFO "Page fault Listener: all CPUs have loaded the new idt table.\n");
return 0;
}
void initialize_idt()
{
int i=0;
struct desc_ptr desc_ptr;
initialize_8259a();
memset(&idt_entries, 0, sizeof(struct desc_struct) * IDT_ENTRY_MAX);
for(i=0; i < IDT_ENTRY_MAX; i++) {
idt_entries[i].a = ( 0x8 ) << 16 | (idt_handlers[i] & 0xFFFF);
idt_entries[i].b = ( idt_handlers[i] & 0xFFFF0000 ) | 0x8E << 8;
//printf("%x %x %x\n", idt_handlers[i], idt_entries[i].a, idt_entries[i].b);
}
desc_ptr.size = sizeof(idt_entries);
desc_ptr.address = (long)&idt_entries;
initialize_irq_services();
load_idt(&desc_ptr);
}
void __restore_processor_state(struct saved_context *ctxt)
{
/*
* control registers
*/
write_cr4(ctxt->cr4);
write_cr3(ctxt->cr3);
write_cr2(ctxt->cr2);
write_cr2(ctxt->cr0);
/*
* now restore the descriptor tables to their proper values
* ltr is done i fix_processor_context().
*/
load_gdt(&ctxt->gdt_limit);
load_idt(&ctxt->idt_limit);
/*
* segment registers
*/
loadsegment(es, ctxt->es);
loadsegment(fs, ctxt->fs);
loadsegment(gs, ctxt->gs);
loadsegment(ss, ctxt->ss);
#ifdef CONFIG_SYSENTER
/*
* sysenter MSRs
*/
if (boot_cpu_has(X86_FEATURE_SEP))
enable_sep_cpu();
#endif
fix_processor_context();
do_fpu_end();
mtrr_ap_init();
}
