/* Write a value via the MII link (blocking) */
err_t lpc_mii_write(u32_t PhyReg, u32_t Value)
{
LWIP_DEBUGF(UDP_LPC_EMAC | LWIP_DBG_TRACE,
("Wirting MII register\r\n"));
u32_t mst = 250;
err_t sts = ERR_OK;
/* Write value at PHY address and register */
lpc_mii_write_noblock(PhyReg, Value);
/* Wait for unbusy status */
while (mst > 0) {
sts = LPC_EMAC->MIND;
if ((sts & EMAC_MIND_BUSY) == 0)
mst = 0;
else {
mst--;
osDelay(1);
}
}
if (sts != 0)
sts = ERR_TIMEOUT;
return sts;
}
/* Write a value via the MII link (blocking) */
err_t lpc_mii_write(u32_t PhyReg, u32_t Value)
{
u32_t mst = 250;
err_t sts = ERR_OK;
/* Write value at PHY address and register */
lpc_mii_write_noblock(PhyReg, Value);
/* Wait for unbusy status */
while (mst > 0) {
sts = LPC_ETHERNET->MAC_MII_ADDR & MAC_MIIA_GB;
if (sts == 0)
mst = 0;
else {
mst--;
msDelay(1);
}
}
if (sts != 0)
sts = ERR_TIMEOUT;
return sts;
}
