unsigned int z80_read_byte(unsigned int address) { switch ((address >> 13) & 3) { case 2: /* YM2612 */ { return fm_read(m68k.cycles, address & 3); } case 3: /* Misc */ { /* VDP (through 68k bus) */ if ((address & 0xFF00) == 0x7F00) { return m68k_lockup_r_8(address); } return (m68k_read_bus_8(address) | 0xFF); } default: /* ZRAM */ { return zram[address & 0x1FFF]; } } }
uint8 MD_Cart_Type_SVP::Read8(uint32 A) { if(A < 0x400000) { if(A > rom_size) { printf("Read8: %08x\n", A); return(0); } return(READ_BYTE_MSB(rom, A)); } printf("Read8: %08x\n", A); return(m68k_read_bus_8(A)); }
uint8 MD_Cart_Type_SRAM::Read8(uint32 A) { if(sram_enabled && A >= sram_start && A <= sram_end) { return(READ_BYTE_MSB(sram, A - sram_start)); } if(A < 0x400000) { if(A >= rom_size) { MD_DBG(MD_DBG_WARNING, "[MAP_SRAM] Unknown read8 from 0x%08x\n", A); return(0); } return(READ_BYTE_MSB(rom, A)); } return(m68k_read_bus_8(A)); }
uint8 MD_Cart_Type_RMX3::Read8(uint32 A) { if(A < 0x400000) { if(A > rom_size) { MD_DBG(MD_DBG_WARNING, "[MAP_RMX3] Unknown read8 from 0x%08x\n", A); return(0); } return(READ_BYTE_MSB(rom, A)); } if(A == 0xa13000) return(0x0C); if(A == 0x400004) return(0x88); MD_DBG(MD_DBG_WARNING, "[MAP_RMX3] Unknown read8 from 0x%08x\n", A); return(m68k_read_bus_8(A)); }
uint8 MD_Cart_Type_SBB::Read8(uint32 A) { if(A < 0x400000) { if(A > rom_size) { printf("Moo: %08x\n", A); return(0); } return(READ_BYTE_MSB(rom, A)); } if(A == 0x400000) return(0x55); if(A == 0x400002) return(0x0f); printf("Moo: %08x\n", A); return(m68k_read_bus_8(A)); }