bool hal_aci_tl_event_get(hal_aci_data_t *p_aci_data)
{
bool was_full = m_aci_q_is_full(&aci_rx_q);
if (m_aci_q_dequeue(&aci_rx_q, p_aci_data))
{
if (true == aci_debug_print)
{
Serial.print(" E");
m_print_aci_data(p_aci_data);
}
if (was_full)
{
if (true == a_pins_local_ptr->interface_is_interrupt)
{
/* Enable RDY line interrupt again */
//EIMSK |= (0x2); //AVR Specific - PIC32,DUE,STM32 todo
}
}
return true;
}
else
{
return false;
}
}
void m_rdy_line_handle(void)
{
hal_aci_data_t *p_aci_data;
if (true == a_pins_local_ptr->interface_is_interrupt)
{
detachInterrupt(a_pins_local_ptr->interrupt_number);
}
// Receive or transmit data
p_aci_data = hal_aci_tl_poll_get();
// Check if we received data
if (p_aci_data->buffer[0] > 0)
{
if (!m_aci_q_enqueue(&aci_rx_q, p_aci_data))
{
/* Receive Buffer full.
Should never happen.
Spin in a while loop.
*/
while(1);
}
if (m_aci_q_is_full(&aci_rx_q))
{
/* Disable RDY line interrupt.
Will latch any pending RDY lines, so when enabled it again this
routine should be taken again */
if (true == a_pins_local_ptr->interface_is_interrupt)
{
//EIMSK &= ~(0x2); //AVR Specific - PIC32,DUE,STM32 todo
}
}
}
}
void m_rdy_line_handle(void)
{
hal_aci_data_t *p_aci_data;
sleep_disable();
detachInterrupt(1);
// Receive or transmit data
p_aci_data = hal_aci_tl_poll_get();
// Check if we received data
if (p_aci_data->buffer[0] > 0)
{
if (!m_aci_q_enqueue(&aci_rx_q, p_aci_data))
{
/* Receive Buffer full.
Should never happen.
Spin in a while loop.
*/
while(1);
}
if (m_aci_q_is_full(&aci_rx_q))
{
/* Disable RDY line interrupt.
Will latch any pending RDY lines, so when enabled it again this
routine should be taken again */
toggle_eimsk(false);
}
}
}
bool hal_aci_tl_event_get(hal_aci_data_t *p_aci_data)
{
bool was_full = m_aci_q_is_full(&aci_rx_q);
if (m_aci_q_dequeue(&aci_rx_q, p_aci_data))
{
if (true == aci_debug_print)
{
Serial.print(" E");
m_print_aci_data(p_aci_data);
}
if (was_full)
{
toggle_eimsk(true);
}
return true;
}
else
{
return false;
}
}
bool lib_aci_event_get(aci_state_t *aci_stat, hal_aci_evt_t *p_aci_evt_data)
{
bool status = false;
if (false == aci_stat->aci_pins.interface_is_interrupt)
{
/*
Check the RDYN line
When the RDYN line goes low
Run the SPI master
place the returned ACI Event in the p_aci_evt_data
*/
/*
When the RDYN goes low it means the nRF8001 is ready for the SPI transaction
*/
if (0 != digitalRead(aci_stat->aci_pins.rdyn_pin))
{
/* RDYN line was not low */
/*when there are commands in the Command queue. place the REQN line low, so the RDYN line will go low later*/
if ((false == m_aci_q_is_empty(&aci_tx_q)) &&
(false == m_aci_q_is_full(&aci_rx_q)))
{
digitalWrite(aci_stat->aci_pins.reqn_pin, 0);
}
/*
Master SPI cannot be run , no event to process
*/
}
else
{
/*
Now process the Master SPI
*/
m_rdy_line_handle();
}
}
status = hal_aci_tl_event_get((hal_aci_data_t *)p_aci_evt_data);
/**
Update the state of the ACI witn the
ACI Events -> Pipe Status, Disconnected, Connected, Bond Status, Pipe Error
*/
if (true == status)
{
aci_evt_t * aci_evt;
aci_evt = &p_aci_evt_data->evt;
switch(aci_evt->evt_opcode)
{
case ACI_EVT_PIPE_STATUS:
{
uint8_t i=0;
for (i=0; i < PIPES_ARRAY_SIZE; i++)
{
aci_stat->pipes_open_bitmap[i] = aci_evt->params.pipe_status.pipes_open_bitmap[i];
aci_stat->pipes_closed_bitmap[i] = aci_evt->params.pipe_status.pipes_closed_bitmap[i];
}
}
break;
case ACI_EVT_DISCONNECTED:
{
uint8_t i=0;
for (i=0; i < PIPES_ARRAY_SIZE; i++)
{
aci_stat->pipes_open_bitmap[i] = 0;
aci_stat->pipes_closed_bitmap[i] = 0;
}
aci_stat->confirmation_pending = false;
aci_stat->data_credit_available = aci_stat->data_credit_total;
}
break;
case ACI_EVT_TIMING:
aci_stat->connection_interval = aci_evt->params.timing.conn_rf_interval;
aci_stat->slave_latency = aci_evt->params.timing.conn_slave_rf_latency;
aci_stat->supervision_timeout = aci_evt->params.timing.conn_rf_timeout;
break;
}
}
return status;
}