static void
dec_kn20aa_mcheck(unsigned long mces, unsigned long type, unsigned long logout, struct trapframe *framep)
{
struct mchkinfo *mcp;
mc_hdr_ev5 *hdr;
mc_uc_ev5 *mptr;
/*
* If we expected a machine check, just go handle it in common code.
*/
mcp = &curcpu()->ci_mcinfo;
if (mcp->mc_expected) {
machine_check(mces, framep, type, logout);
return;
}
hdr = (mc_hdr_ev5 *) logout;
mptr = (mc_uc_ev5 *) (logout + sizeof (*hdr));
/*
* Now we can finally print some stuff...
*/
ev5_logout_print(hdr, mptr);
machine_check(mces, framep, type, logout);
}
/**************************************************************************
MAIN - Kick off routine
**************************************************************************/
main()
{
int c;
extern char edata[], end[];
bzero(edata,end-edata); /* Zero BSS */
#ifdef ASK_BOOT
while (1) {
printf("\nBoot from Network (Y/N) ? ");
c = getchar();
if ((c >= 'a') && (c <= 'z')) c &= 0x5F;
if (c == '\r') break;
putchar(c);
if (c == 'N')
exit(0);
if (c == 'Y')
break;
printf(" - bad response\n");
}
#endif
/* get the bios's idea about the disks geometry */
#ifdef PC98
for(c = 0; c < 2; c ++) {
if (*(unsigned char*)0xa155d & (1 << c)) { /* check DISK_EQUIP */
bootinfo.bi_bios_geom[c] = get_diskinfo(c + 0x80);
}
}
#else /* IBM-PC */
for(c = 0; c < N_BIOS_GEOM; c ++)
bootinfo.bi_bios_geom[c] = get_diskinfo(c + 0x80);
#endif /* PC98 */
gateA20();
#ifdef PC98
/* set machine type to PC98_SYSTEM_PARAMETER */
machine_check();
#endif
printf("\nBOOTP/TFTP/NFS bootstrap loader ESC for menu\n"
"\nSearching for adapter...");
if (!eth_probe()) {
printf("No adapter found.\n");
exit(0);
}
kernel = DEFAULT_BOOTFILE;
while (1) {
if (setjmp(jmp_bootmenu))
bootmenu();
else
load();
}
}
static void
dec_kn20aa_mcheck_handler(unsigned long mces, struct trapframe *framep, unsigned long vector, unsigned long param)
{
switch (vector) {
case ALPHA_SYS_MCHECK:
case ALPHA_PROC_MCHECK:
dec_kn20aa_mcheck(mces, vector, param, framep);
break;
default:
printf("KN20AA_MCHECK: unknown check vector 0x%lx\n", vector);
machine_check(mces, framep, vector, param);
break;
}
}
static void
dec_2100_a500_machine_check(unsigned long mces, struct trapframe *framep,
unsigned long vector, unsigned long param)
{
struct mchkinfo *mcp = &curcpu()->ci_mcinfo;
/*
* This is a work-around for a T2 core logic bug. See
* alpha/pci/ttwoga_pci.c.
*/
if (ttwoga_conf_cpu == cpu_number())
mcp->mc_expected = 1;
machine_check(mces, framep, vector, param);
}
/* NORETURN */
void
boot(int drive)
{
int ret;
#ifdef PC98
int i;
unsigned char disk_equips;
#endif
/* Pick up the story from the Bios on geometry of disks */
#ifdef PC98
for(ret = 0; ret < 2; ret ++) {
if (*(unsigned char*)V(0xA155d) & (1 << ret)) {
bootinfo.bi_bios_geom[ret] = get_diskinfo(ret + 0x80);
}
#else /* IBM-PC */
for(ret = 0; ret < N_BIOS_GEOM; ret ++)
bootinfo.bi_bios_geom[ret] = get_diskinfo(ret + 0x80);
#endif /* PC98 */
}
bootinfo.bi_basemem = memsize(0);
bootinfo.bi_extmem = memsize(1);
bootinfo.bi_memsizes_valid = 1;
gateA20();
#ifdef PC98
/* set machine type to PC98_SYSTEM_PARAMETER */
machine_check();
#endif /* PC98 */
/*
* The default boot device is the first partition in the
* compatibility slice on the boot drive.
*/
dosdev = drive;
#ifdef PC98
maj = (drive&0x70) >> 3; /* a good first bet */
if (maj == 4) { /* sd */
disk_equips = *(unsigned char *)V(0xA1482);
unit = 0;
for (i=0; i<(drive&0x0f); i++) {
unit += (disk_equips >> i) & 1;
}
} else {
asmlinkage void do_entInt(unsigned long type, unsigned long vector, unsigned long la_ptr,
unsigned long a3, unsigned long a4, unsigned long a5,
struct pt_regs regs)
{
switch (type) {
case 0:
printk("Interprocessor interrupt? You must be kidding\n");
break;
case 1:
timer_interrupt(®s);
return;
case 2:
machine_check(vector, la_ptr, ®s);
return;
case 3:
#if defined(CONFIG_ALPHA_JENSEN) || defined(CONFIG_ALPHA_NONAME) || \
defined(CONFIG_ALPHA_P2K) || defined(CONFIG_ALPHA_SRM)
srm_device_interrupt(vector, ®s);
#elif NR_IRQS == 48
alcor_and_xlt_device_interrupt(vector, ®s);
#elif NR_IRQS == 33
cabriolet_and_eb66p_device_interrupt(vector, ®s);
#elif defined(CONFIG_ALPHA_MIKASA)
mikasa_device_interrupt(vector, ®s);
#elif NR_IRQS == 32
eb66_and_eb64p_device_interrupt(vector, ®s);
#elif NR_IRQS == 16
isa_device_interrupt(vector, ®s);
#endif
return;
case 4:
printk("Performance counter interrupt\n");
break;;
default:
printk("Hardware intr %ld %lx? Huh?\n", type, vector);
}
printk("PC = %016lx PS=%04lx\n", regs.pc, regs.ps);
}
void
interrupt(unsigned long a0, unsigned long a1, unsigned long a2,
struct trapframe *framep)
{
struct cpu_info *ci = curcpu();
extern int schedhz;
switch (a0) {
case ALPHA_INTR_XPROC: /* interprocessor interrupt */
#if defined(MULTIPROCESSOR)
atomic_add_ulong(&ci->ci_intrdepth, 1);
alpha_ipi_process(ci, framep);
/*
* Handle inter-console messages if we're the primary
* CPU.
*/
if (ci->ci_cpuid == hwrpb->rpb_primary_cpu_id &&
hwrpb->rpb_txrdy != 0)
cpu_iccb_receive();
atomic_sub_ulong(&ci->ci_intrdepth, 1);
#else
printf("WARNING: received interprocessor interrupt!\n");
#endif /* MULTIPROCESSOR */
break;
case ALPHA_INTR_CLOCK: /* clock interrupt */
atomic_add_int(&uvmexp.intrs, 1);
if (CPU_IS_PRIMARY(ci))
clk_count.ec_count++;
if (platform.clockintr) {
/*
* Call hardclock(). This will also call
* statclock(). On the primary CPU, it
* will also deal with time-of-day stuff.
*/
(*platform.clockintr)((struct clockframe *)framep);
/*
* If it's time to call the scheduler clock,
* do so.
*/
if ((++ci->ci_schedstate.spc_schedticks & 0x3f) == 0 &&
schedhz != 0)
schedclock(ci->ci_curproc);
}
break;
case ALPHA_INTR_ERROR: /* Machine Check or Correctable Error */
atomic_add_ulong(&ci->ci_intrdepth, 1);
a0 = alpha_pal_rdmces();
if (platform.mcheck_handler)
(*platform.mcheck_handler)(a0, framep, a1, a2);
else
machine_check(a0, framep, a1, a2);
atomic_sub_ulong(&ci->ci_intrdepth, 1);
break;
case ALPHA_INTR_DEVICE: /* I/O device interrupt */
{
struct scbvec *scb;
KDASSERT(a1 >= SCB_IOVECBASE && a1 < SCB_SIZE);
atomic_add_ulong(&ci->ci_intrdepth, 1);
atomic_add_int(&uvmexp.intrs, 1);
scb = &scb_iovectab[SCB_VECTOIDX(a1 - SCB_IOVECBASE)];
(*scb->scb_func)(scb->scb_arg, a1);
atomic_sub_ulong(&ci->ci_intrdepth, 1);
break;
}
case ALPHA_INTR_PERF: /* performance counter interrupt */
printf("WARNING: received performance counter interrupt!\n");
break;
case ALPHA_INTR_PASSIVE:
#if 0
printf("WARNING: received passive release interrupt vec "
"0x%lx\n", a1);
#endif
break;
default:
printf("unexpected interrupt: type 0x%lx vec 0x%lx "
"a2 0x%lx"
#if defined(MULTIPROCESSOR)
" cpu %lu"
#endif
"\n", a0, a1, a2
#if defined(MULTIPROCESSOR)
, ci->ci_cpuid
#endif
);
panic("interrupt");
/* NOTREACHED */
}
}
void
interrupt(unsigned long a0, unsigned long a1, unsigned long a2,
struct trapframe *framep)
{
struct proc *p;
struct cpu_info *ci = curcpu();
extern int schedhz;
switch (a0) {
case ALPHA_INTR_XPROC: /* interprocessor interrupt */
#if defined(MULTIPROCESSOR)
{
u_long pending_ipis, bit;
#if 0
printf("CPU %lu got IPI\n", cpu_id);
#endif
#ifdef DIAGNOSTIC
if (ci->ci_dev == NULL) {
/* XXX panic? */
printf("WARNING: no device for ID %lu\n", ci->ci_cpuid);
return;
}
#endif
pending_ipis = atomic_loadlatch_ulong(&ci->ci_ipis, 0);
for (bit = 0; bit < ALPHA_NIPIS; bit++)
if (pending_ipis & (1UL << bit))
(*ipifuncs[bit])();
/*
* Handle inter-console messages if we're the primary
* CPU.
*/
if (ci->ci_cpuid == hwrpb->rpb_primary_cpu_id &&
hwrpb->rpb_txrdy != 0)
cpu_iccb_receive();
}
#else
printf("WARNING: received interprocessor interrupt!\n");
#endif /* MULTIPROCESSOR */
break;
case ALPHA_INTR_CLOCK: /* clock interrupt */
#if defined(MULTIPROCESSOR)
/* XXX XXX XXX */
if (CPU_IS_PRIMARY(ci) == 0)
return;
#endif
uvmexp.intrs++;
clk_count.ec_count++;
if (platform.clockintr) {
/*
* Call hardclock(). This will also call
* statclock(). On the primary CPU, it
* will also deal with time-of-day stuff.
*/
(*platform.clockintr)((struct clockframe *)framep);
/*
* If it's time to call the scheduler clock,
* do so.
*/
if ((++schedclk2 & 0x3f) == 0 &&
(p = ci->ci_curproc) != NULL && schedhz != 0)
schedclock(p);
}
break;
case ALPHA_INTR_ERROR: /* Machine Check or Correctable Error */
a0 = alpha_pal_rdmces();
if (platform.mcheck_handler)
(*platform.mcheck_handler)(a0, framep, a1, a2);
else
machine_check(a0, framep, a1, a2);
break;
case ALPHA_INTR_DEVICE: /* I/O device interrupt */
{
struct scbvec *scb;
KDASSERT(a1 >= SCB_IOVECBASE && a1 < SCB_SIZE);
#if defined(MULTIPROCESSOR)
/* XXX XXX XXX */
if (CPU_IS_PRIMARY(ci) == 0)
return;
#endif
uvmexp.intrs++;
scb = &scb_iovectab[SCB_VECTOIDX(a1 - SCB_IOVECBASE)];
(*scb->scb_func)(scb->scb_arg, a1);
break;
}
case ALPHA_INTR_PERF: /* performance counter interrupt */
printf("WARNING: received performance counter interrupt!\n");
break;
case ALPHA_INTR_PASSIVE:
#if 0
printf("WARNING: received passive release interrupt vec "
"0x%lx\n", a1);
#endif
break;
default:
printf("unexpected interrupt: type 0x%lx vec 0x%lx "
"a2 0x%lx"
#if defined(MULTIPROCESSOR)
" cpu %lu"
#endif
"\n", a0, a1, a2
#if defined(MULTIPROCESSOR)
, ci->ci_cpuid
#endif
);
panic("interrupt");
/* NOTREACHED */
}
}
static void
kn300_mcheck(unsigned long mces, unsigned long type, unsigned long logout, struct trapframe *framep)
{
struct mchkinfo *mcp;
static const char *fmt1 = " %-25s = 0x%l016x\n";
int i;
mc_hdr_ev5 *hdr;
mc_uc_ev5 *ptr;
struct mcpcia_iodsnap *iodsnp;
/*
* If we expected a machine check, just go handle it in common code.
*/
mcp = &curcpu()->ci_mcinfo;
if (mcp->mc_expected) {
machine_check(mces, framep, type, logout);
return;
}
hdr = (mc_hdr_ev5 *) logout;
ptr = (mc_uc_ev5 *) (logout + sizeof (*hdr));
ev5_logout_print(hdr, ptr);
iodsnp = (struct mcpcia_iodsnap *) ((unsigned long) hdr +
(unsigned long) hdr->la_system_offset);
for (i = 0; i < MCPCIA_PER_MCBUS; i++, iodsnp++) {
if (!IS_MCPCIA_MAGIC(iodsnp->pci_rev)) {
continue;
}
printf(" IOD %d register dump:\n", i);
printf(fmt1, "Base Addr of PCI bridge", iodsnp->base_addr);
printf(fmt1, "Whami Reg.", iodsnp->whami);
printf(fmt1, "Sys. Env. Reg.", iodsnp->sys_env);
printf(fmt1, "PCI Rev. Reg.", iodsnp->pci_rev);
printf(fmt1, "CAP_CTL Reg.", iodsnp->cap_ctrl);
printf(fmt1, "HAE_MEM Reg.", iodsnp->hae_mem);
printf(fmt1, "HAE_IO Reg.", iodsnp->hae_io);
printf(fmt1, "INT_CTL Reg.", iodsnp->int_ctl);
printf(fmt1, "INT_REG Reg.", iodsnp->int_reg);
printf(fmt1, "INT_MASK0 Reg.", iodsnp->int_mask0);
printf(fmt1, "INT_MASK1 Reg.", iodsnp->int_mask1);
printf(fmt1, "MC_ERR0 Reg.", iodsnp->mc_err0);
printf(fmt1, "MC_ERR1 Reg.", iodsnp->mc_err1);
printf(fmt1, "CAP_ERR Reg.", iodsnp->cap_err);
printf(fmt1, "PCI_ERR1 Reg.", iodsnp->pci_err1);
printf(fmt1, "MDPA_STAT Reg.", iodsnp->mdpa_stat);
printf(fmt1, "MDPA_SYN Reg.", iodsnp->mdpa_syn);
printf(fmt1, "MDPB_STAT Reg.", iodsnp->mdpb_stat);
printf(fmt1, "MDPB_SYN Reg.", iodsnp->mdpb_syn);
}
/*
* Now that we've printed all sorts of useful information
* and have decided that we really can't do any more to
* respond to the error, go on to the common code for
* final disposition. Usually this means that we die.
*/
/*
* XXX: HANDLE PCI ERRORS HERE?
*/
machine_check(mces, framep, type, logout);
}
void
interrupt(unsigned long a0, unsigned long a1, unsigned long a2,
struct trapframe *framep)
{
struct cpu_info *ci = curcpu();
struct cpu_softc *sc = ci->ci_softc;
switch (a0) {
case ALPHA_INTR_XPROC: /* interprocessor interrupt */
#if defined(MULTIPROCESSOR)
atomic_inc_ulong(&ci->ci_intrdepth);
alpha_ipi_process(ci, framep);
/*
* Handle inter-console messages if we're the primary
* CPU.
*/
if (ci->ci_cpuid == hwrpb->rpb_primary_cpu_id &&
hwrpb->rpb_txrdy != 0)
cpu_iccb_receive();
atomic_dec_ulong(&ci->ci_intrdepth);
#else
printf("WARNING: received interprocessor interrupt!\n");
#endif /* MULTIPROCESSOR */
break;
case ALPHA_INTR_CLOCK: /* clock interrupt */
/*
* We don't increment the interrupt depth for the
* clock interrupt, since it is *sampled* from
* the clock interrupt, so if we did, all system
* time would be counted as interrupt time.
*/
sc->sc_evcnt_clock.ev_count++;
ci->ci_data.cpu_nintr++;
if (platform.clockintr) {
/*
* Call hardclock(). This will also call
* statclock(). On the primary CPU, it
* will also deal with time-of-day stuff.
*/
(*platform.clockintr)((struct clockframe *)framep);
/*
* If it's time to call the scheduler clock,
* do so.
*/
if ((++ci->ci_schedstate.spc_schedticks & 0x3f) == 0 &&
schedhz != 0)
schedclock(ci->ci_curlwp);
}
break;
case ALPHA_INTR_ERROR: /* Machine Check or Correctable Error */
atomic_inc_ulong(&ci->ci_intrdepth);
a0 = alpha_pal_rdmces();
if (platform.mcheck_handler != NULL &&
(void *)framep->tf_regs[FRAME_PC] != XentArith)
(*platform.mcheck_handler)(a0, framep, a1, a2);
else
machine_check(a0, framep, a1, a2);
atomic_dec_ulong(&ci->ci_intrdepth);
break;
case ALPHA_INTR_DEVICE: /* I/O device interrupt */
{
struct scbvec *scb;
int idx = SCB_VECTOIDX(a1 - SCB_IOVECBASE);
bool mpsafe = scb_mpsafe[idx];
KDASSERT(a1 >= SCB_IOVECBASE && a1 < SCB_SIZE);
atomic_inc_ulong(&sc->sc_evcnt_device.ev_count);
atomic_inc_ulong(&ci->ci_intrdepth);
if (!mpsafe) {
KERNEL_LOCK(1, NULL);
}
ci->ci_data.cpu_nintr++;
scb = &scb_iovectab[idx];
(*scb->scb_func)(scb->scb_arg, a1);
if (!mpsafe)
KERNEL_UNLOCK_ONE(NULL);
atomic_dec_ulong(&ci->ci_intrdepth);
break;
}
case ALPHA_INTR_PERF: /* performance counter interrupt */
printf("WARNING: received performance counter interrupt!\n");
break;
case ALPHA_INTR_PASSIVE:
#if 0
printf("WARNING: received passive release interrupt vec "
"0x%lx\n", a1);
#endif
break;
default:
printf("unexpected interrupt: type 0x%lx vec 0x%lx "
"a2 0x%lx"
#if defined(MULTIPROCESSOR)
" cpu %lu"
#endif
"\n", a0, a1, a2
#if defined(MULTIPROCESSOR)
, ci->ci_cpuid
#endif
);
panic("interrupt");
/* NOTREACHED */
}
}
