int mali_meson_init_start(struct platform_device* ptr_plt_dev)
{
	struct mali_gpu_device_data* pdev = ptr_plt_dev->dev.platform_data;

	/* for mali platform data. */
	pdev->utilization_interval = 300,
	pdev->utilization_callback = mali_gpu_utilization_callback,

	/* for resource data. */
	ptr_plt_dev->num_resources = ARRAY_SIZE(mali_gpu_resources);
	ptr_plt_dev->resource = mali_gpu_resources;
	return mali_clock_init(&mali_plat_data);
}
int mali_meson_init_start(struct platform_device* ptr_plt_dev)
{
	struct mali_gpu_device_data* pdev = ptr_plt_dev->dev.platform_data;

	/* chip mark detect. */

#ifdef IS_MESON_M8_CPU
	if(IS_MESON_M8_CPU) {
		mali_plat_data.have_switch = 0;
	}
#endif

	/* for mali platform data. */
	pdev->utilization_interval = 300,
	pdev->utilization_callback = mali_gpu_utilization_callback,

	/* for resource data. */
	ptr_plt_dev->num_resources = ARRAY_SIZE(mali_gpu_resources);
	ptr_plt_dev->resource = mali_gpu_resources;
	return mali_clock_init(&mali_plat_data);
}
_mali_osk_errcode_t mali_platform_init(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct mali_platform_drv_data *mali_drv_data;
	int ret;

	mali_drv_data = devm_kzalloc(dev, sizeof(*mali_drv_data), GFP_KERNEL);
	if (!mali_drv_data) {
		dev_err(dev, "no mem\n");
		return _MALI_OSK_ERR_NOMEM;
	}

	dev_set_drvdata(dev, mali_drv_data);

	mali_drv_data->dev = dev;

	mali_dev = dev;

	ret = mali_clock_init(dev);
	if (ret)
		goto err_init;

	ret = mali_dvfs_init(dev);
	if (ret)
		goto err_init;

	ret = mali_create_sysfs(dev);
	if (ret)
		goto term_clk;

	mali_drv_data->clockSetlock = _mali_osk_mutex_init(_MALI_OSK_LOCKFLAG_ORDERED,
				_MALI_OSK_LOCK_ORDER_UTILIZATION);
	mali_core_scaling_enable = 1;

   	return 0;
term_clk:
	mali_clock_term(dev);
err_init:
 	return _MALI_OSK_ERR_FAULT;
}
Exemple #4
0
int mali_meson_init_start(struct platform_device* ptr_plt_dev)
{
    struct mali_gpu_device_data* pdev = ptr_plt_dev->dev.platform_data;


    /* for resource data. */
    ptr_plt_dev->num_resources = ARRAY_SIZE(mali_gpu_resources);
    ptr_plt_dev->resource = mali_gpu_resources;

    /*for dvfs*/
#ifndef CONFIG_MALI_DVFS
    /* for mali platform data. */
    pdev->control_interval = 200;
    pdev->utilization_callback = mali_gpu_utilization_callback;
#else
    pdev->get_clock_info = meson_platform_get_clock_info;
    pdev->get_freq = meson_platform_get_freq;
    pdev->set_freq = meson_platform_set_freq;
#endif

    return mali_clock_init(&mali_plat_data);
}
int mali_meson_init_start(struct platform_device* ptr_plt_dev)
{
	ptr_plt_dev->num_resources = ARRAY_SIZE(mali_gpu_resources);
	ptr_plt_dev->resource = mali_gpu_resources;
	return mali_clock_init(&mali_plat_data);
}