static int __init mali_init(void)
{
unsigned long smem_start;
unsigned long smem_len;
int err = 0;
spin_lock_init(&mali_spinlock);
smem_start = num_physpages << PAGE_SHIFT;
get_mali_param(&mali_param);
if (mali_param.buflen1 < 0)
mali_param.buflen1 = 1 << 20; /* 1MB */
smem_len = mali_param.buflen1;
mali_set_memory_base(smem_start);
mali_set_memory_size(smem_len);
mali_set_mem_validation_base(0);
mali_set_mem_validation_size(0);
mali_ump_secure_id = (unsigned int) -1;
mali_get_ump_secure_id = NULL;
mali_put_ump_secure_id = NULL;
if (!mali_param.enabled)
return -1;
mali_enable_power(1);
mali_enable_clock(1);
/* Wait for power stable */
msleep_interruptible(1);
/* Verify Mali-400 PMU */
err += mali_pmu_power_down(0x7);
if (!err)
err += mali_pmu_power_up(0x2);
if (!err)
err += mali_pmu_power_up(0x7);
if (!err)
mali_show_info();
#ifndef MALI_ALWAYS_ON
err += mali_pmu_power_down(0x5);
err += mali_pmu_power_down(0x7);
#endif /* MALI_ALWAYS_ON */
return err;
}
int mali_platform_powerup_impl(u32 cores)
{
unsigned int status;
#if MALI_DEBUG
printk("mali_platform_powerup_impl(%d)\n", cores);
#endif
#ifdef MALI_PMU_CONTROL
status = REG_VAL32(REG_MALI400_PMU + 8);
/* printk("mali pmu: status = 0x08%x\n", status); */
if ((status & 0x7) != 0)
mali_pmu_power_up(0x7);
#else
status = 0;
#endif
spin_lock(&mali_spinlock);
mali_enable_power(1);
mali_enable_clock(1);
spin_unlock(&mali_spinlock);
return 0;
}
void mali_pm_domain_ref_get(struct mali_pm_domain *domain)
{
if (NULL == domain) return;
mali_pm_domain_lock(domain);
++domain->use_count;
if (MALI_PM_DOMAIN_ON != domain->state) {
/* Power on */
struct mali_pmu_core *pmu = mali_pmu_get_global_pmu_core();
MALI_DEBUG_PRINT(3, ("PM Domain: Powering on 0x%08x\n", domain->pmu_mask));
if (NULL != pmu) {
_mali_osk_errcode_t err;
err = mali_pmu_power_up(pmu, domain->pmu_mask);
if (_MALI_OSK_ERR_OK != err && _MALI_OSK_ERR_BUSY != err) {
MALI_PRINT_ERROR(("PM Domain: Failed to power up PM domain 0x%08x\n",
domain->pmu_mask));
}
}
mali_pm_domain_state_set(domain, MALI_PM_DOMAIN_ON);
} else {
MALI_DEBUG_ASSERT(MALI_PM_DOMAIN_ON == mali_pm_domain_state_get(domain));
}
mali_pm_domain_unlock(domain);
}
void mali_pmu_power_up_all(struct mali_pmu_core *pmu)
{
u32 stat;
MALI_DEBUG_ASSERT_POINTER(pmu);
MALI_DEBUG_ASSERT(pmu->registered_cores_mask != 0);
mali_pm_exec_lock();
mali_pmu_reset(pmu);
/* Now simply power up the domains which are marked as powered down */
stat = mali_hw_core_register_read(&pmu->hw_core,
PMU_REG_ADDR_MGMT_STATUS);
mali_pmu_power_up(pmu, stat);
mali_pm_exec_unlock();
}
