static int max17135_vcom_enable(struct regulator_dev *reg)
{
struct max17135 *max17135 = rdev_get_drvdata(reg);
/*
* Check to see if we need to set the VCOM voltage.
* Should only be done one time. And, we can
* only change vcom voltage if we have been enabled.
*/
if (!max17135->vcom_setup && max17135_is_power_good(max17135)) {
max17135_vcom_set_voltage(reg,
max17135->vcom_uV,
max17135->vcom_uV,
NULL);
max17135->vcom_setup = true;
}
/* enable VCOM regulator output */
if (max17135->pass_num == 1)
gpio_set_value(max17135->gpio_pmic_vcom_ctrl, 1);
else {
unsigned int reg_val;
max17135_reg_read(REG_MAX17135_ENABLE, ®_val);
reg_val &= ~BITFMASK(VCOM_ENABLE);
reg_val |= BITFVAL(VCOM_ENABLE, 1); /* shift to correct bit */
max17135_reg_write(REG_MAX17135_ENABLE, reg_val);
}
return 0;
}
static int max17135_vcom_set_voltage(struct regulator_dev *reg,
int minuV, int uV, unsigned *selector)
{
struct max17135 *max17135 = rdev_get_drvdata(reg);
unsigned int reg_val;
int vcom_read;
if ((uV < vcom_data[max17135->pass_num-1].vcom_min_uV)
|| (uV > vcom_data[max17135->pass_num-1].vcom_max_uV))
return -EINVAL;
max17135_reg_read(REG_MAX17135_DVR, ®_val);
/*
* Only program VCOM if it is not set to the desired value.
* Programming VCOM excessively degrades ability to keep
* DVR register value persistent.
*/
vcom_read = vcom_rs_to_uV(reg_val, max17135->pass_num-1);
if (vcom_read != max17135->vcom_uV) {
reg_val &= ~BITFMASK(DVR);
reg_val |= BITFVAL(DVR, vcom_uV_to_rs(uV,
max17135->pass_num-1));
max17135_reg_write(REG_MAX17135_DVR, reg_val);
reg_val = BITFVAL(CTRL_DVR, true); /* shift to correct bit */
return max17135_reg_write(REG_MAX17135_PRGM_CTRL, reg_val);
}
return 0;
}
static int max17135_vcom_get_voltage(struct regulator_dev *reg)
{
struct max17135 *max17135 = rdev_get_drvdata(reg);
unsigned int reg_val;
max17135_reg_read(REG_MAX17135_DVR, ®_val);
return vcom_rs_to_uV(BITFEXT(reg_val, DVR), max17135->pass_num-1);
}
static ssize_t show_dwnseq(struct device *dev,
struct device_attribute *attr, char *buf)
{
unsigned int reg_val;
unsigned long dwnseq_reg_val=0l;
/*
* get the power down registers
*/
max17135_reg_read(REG_MAX17135_TIMING5,®_val);
dwnseq_reg_val = reg_val << 24;
max17135_reg_read(REG_MAX17135_TIMING6, ®_val);
dwnseq_reg_val = reg_val << 16;
max17135_reg_read(REG_MAX17135_TIMING7, ®_val);
dwnseq_reg_val |= reg_val << 8;
max17135_reg_read(REG_MAX17135_TIMING8, ®_val);
dwnseq_reg_val |= reg_val;
return snprintf(buf, PAGE_SIZE, "0x%08lx\n", dwnseq_reg_val);
}
static ssize_t show_upseq(struct device *dev,
struct device_attribute *attr, char *buf)
{
unsigned int reg_val;
unsigned long upseq_reg_val=0l;
/*
* get the upseq registers
*/
max17135_reg_read(REG_MAX17135_TIMING1,®_val);
upseq_reg_val = reg_val << 24;
max17135_reg_read(REG_MAX17135_TIMING2, ®_val);
upseq_reg_val = reg_val << 16;
max17135_reg_read(REG_MAX17135_TIMING3, ®_val);
upseq_reg_val |= reg_val << 8;
max17135_reg_read(REG_MAX17135_TIMING4, ®_val);
upseq_reg_val |= reg_val;
return snprintf(buf, PAGE_SIZE, "0x%08lx\n", upseq_reg_val);
}
static int max17135_is_power_good(struct max17135 *max17135)
{
unsigned int reg_val;
unsigned int fld_val;
max17135_reg_read(REG_MAX17135_FAULT, ®_val);
fld_val = (reg_val & BITFMASK(FAULT_POK)) >> FAULT_POK_LSH;
/* Check the POK bit */
return fld_val;
}
static ssize_t show_fault_regs(struct device *dev,
struct device_attribute *attr, char *buf)
{
unsigned int reg_val;
/*
* report the fault register value
*/
max17135_reg_read(REG_MAX17135_FAULT,®_val);
return snprintf(buf, PAGE_SIZE, "0x%02x\n", reg_val);
}
static ssize_t show_enable(struct device *dev,
struct device_attribute *attr, char *buf)
{
unsigned int reg_val;
/*
* get the enable registers
*/
max17135_reg_read(REG_MAX17135_ENABLE,®_val);
return snprintf(buf, PAGE_SIZE, "0x%02x\n", reg_val);
}
static ssize_t show_vcom(struct device *dev,
struct device_attribute *attr, char *buf)
{
unsigned int reg_val;
/*
* report the value of DVR register
*/
max17135_reg_read(REG_MAX17135_DVR,®_val);
return snprintf(buf, PAGE_SIZE, "%d\n", reg_val);
}
static int max17135_vcom_disable(struct regulator_dev *reg)
{
struct max17135 *max17135 = rdev_get_drvdata(reg);
if (max17135->pass_num == 1)
gpio_set_value(max17135->gpio_pmic_vcom_ctrl, 0);
else {
unsigned int reg_val;
max17135_reg_read(REG_MAX17135_ENABLE, ®_val);
reg_val &= ~BITFMASK(VCOM_ENABLE);
max17135_reg_write(REG_MAX17135_ENABLE, reg_val);
}
return 0;
}
static int max17135_display_disable(struct regulator_dev *reg)
{
struct max17135 *max17135 = rdev_get_drvdata(reg);
if (max17135->pass_num == 1)
gpio_set_value(max17135->gpio_pmic_wakeup, 0);
else {
unsigned int reg_val;
max17135_reg_read(REG_MAX17135_ENABLE, ®_val);
reg_val &= ~BITFMASK(ENABLE);
max17135_reg_write(REG_MAX17135_ENABLE, reg_val);
}
msleep(max17135->max_wait);
return 0;
}
static int max17135_display_enable(struct regulator_dev *reg)
{
struct max17135 *max17135 = rdev_get_drvdata(reg);
/* The Pass 1 parts cannot turn on the PMIC via I2C. */
if (max17135->pass_num == 1)
gpio_set_value(max17135->gpio_pmic_wakeup, 1);
else {
unsigned int reg_val;
max17135_reg_read(REG_MAX17135_ENABLE, ®_val);
reg_val &= ~BITFMASK(ENABLE);
reg_val |= BITFVAL(ENABLE, 1);
max17135_reg_write(REG_MAX17135_ENABLE, reg_val);
}
return max17135_wait_power_good(max17135);
}
static int max17135_hvinp_get_voltage(struct regulator_dev *reg)
{
unsigned int reg_val;
unsigned int fld_val;
int volt;
max17135_reg_read(REG_MAX17135_HVINP, ®_val);
fld_val = (reg_val & BITFMASK(HVINP)) >> HVINP_LSH;
if ((fld_val >= MAX17135_HVINP_MIN_VAL) &&
(fld_val <= MAX17135_HVINP_MAX_VAL)) {
volt = (fld_val * MAX17135_HVINP_STEP_uV) +
MAX17135_HVINP_MIN_uV;
} else {
printk(KERN_ERR "MAX17135: HVINP voltage is out of range\n");
volt = 0;
}
return volt;
}
/*
* Regulator operations
*/
static int max17135_hvinp_set_voltage(struct regulator_dev *reg,
int minuV, int uV, unsigned *selector)
{
unsigned int reg_val;
unsigned int fld_val;
if ((uV >= MAX17135_HVINP_MIN_uV) &&
(uV <= MAX17135_HVINP_MAX_uV))
fld_val = (uV - MAX17135_HVINP_MIN_uV) /
MAX17135_HVINP_STEP_uV;
else
return -EINVAL;
max17135_reg_read(REG_MAX17135_HVINP, ®_val);
reg_val &= ~BITFMASK(HVINP);
reg_val |= BITFVAL(HVINP, fld_val); /* shift to correct bit */
return max17135_reg_write(REG_MAX17135_HVINP, reg_val);
}
static void max17135_setup_timings(struct max17135 *max17135)
{
unsigned int reg_val;
int timing1, timing2, timing3, timing4,
timing5, timing6, timing7, timing8;
max17135_reg_read(REG_MAX17135_TIMING1, &timing1);
max17135_reg_read(REG_MAX17135_TIMING2, &timing2);
max17135_reg_read(REG_MAX17135_TIMING3, &timing3);
max17135_reg_read(REG_MAX17135_TIMING4, &timing4);
max17135_reg_read(REG_MAX17135_TIMING5, &timing5);
max17135_reg_read(REG_MAX17135_TIMING6, &timing6);
max17135_reg_read(REG_MAX17135_TIMING7, &timing7);
max17135_reg_read(REG_MAX17135_TIMING8, &timing8);
if ((timing1 != max17135->gvee_pwrup) ||
(timing2 != max17135->vneg_pwrup) ||
(timing3 != max17135->vpos_pwrup) ||
(timing4 != max17135->gvdd_pwrup) ||
(timing5 != max17135->gvdd_pwrdn) ||
(timing6 != max17135->vpos_pwrdn) ||
(timing7 != max17135->vneg_pwrdn) ||
(timing8 != max17135->gvee_pwrdn)) {
max17135_reg_write(REG_MAX17135_TIMING1, max17135->gvee_pwrup);
max17135_reg_write(REG_MAX17135_TIMING2, max17135->vneg_pwrup);
max17135_reg_write(REG_MAX17135_TIMING3, max17135->vpos_pwrup);
max17135_reg_write(REG_MAX17135_TIMING4, max17135->gvdd_pwrup);
max17135_reg_write(REG_MAX17135_TIMING5, max17135->gvdd_pwrdn);
max17135_reg_write(REG_MAX17135_TIMING6, max17135->vpos_pwrdn);
max17135_reg_write(REG_MAX17135_TIMING7, max17135->vneg_pwrdn);
max17135_reg_write(REG_MAX17135_TIMING8, max17135->gvee_pwrdn);
reg_val = BITFVAL(CTRL_TIMING, true); /* shift to correct bit */
max17135_reg_write(REG_MAX17135_PRGM_CTRL, reg_val);
}
}
static int max17135_vcom_is_enabled(struct regulator_dev *reg)
{
struct max17135 *max17135 = rdev_get_drvdata(reg);
/* read VCOM regulator enable setting */
if (max17135->pass_num == 1) {
int gpio = gpio_get_value(max17135->gpio_pmic_vcom_ctrl);
if (gpio == 0)
return 0;
else
return 1;
} else {
unsigned int reg_val;
max17135_reg_read(REG_MAX17135_ENABLE, ®_val);
reg_val &= BITFMASK(VCOM_ENABLE);
if (reg_val != 0)
return 1;
else
return 0;
}
}
