static int max77888_freeze(struct device *dev)
{
struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
struct max77888_dev *max77888 = i2c_get_clientdata(i2c);
int i;
for (i = 0; i < ARRAY_SIZE(max77888_dumpaddr_pmic); i++)
max77888_read_reg(i2c, max77888_dumpaddr_pmic[i],
&max77888->reg_pmic_dump[i]);
for (i = 0; i < ARRAY_SIZE(max77888_dumpaddr_muic); i++)
max77888_read_reg(i2c, max77888_dumpaddr_muic[i],
&max77888->reg_muic_dump[i]);
for (i = 0; i < ARRAY_SIZE(max77888_dumpaddr_haptic); i++)
max77888_read_reg(i2c, max77888_dumpaddr_haptic[i],
&max77888->reg_haptic_dump[i]);
disable_irq(max77888->irq);
return 0;
}
static int max77888_set_bits(struct i2c_client *client, const u8 reg,
const u8 mask, const u8 inval)
{
int ret;
u8 value;
ret = max77888_read_reg(client, reg, &value);
if (unlikely(ret < 0))
return ret;
value = (value & ~mask) | (inval & mask);
ret = max77888_write_reg(client, reg, value);
return ret;
}
static int max77888_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *dev_id)
{
struct max77888_dev *max77888;
struct max77888_platform_data *pdata = i2c->dev.platform_data;
u8 reg_data;
int ret = 0;
pr_info("%s:%s\n", MFD_DEV_NAME, __func__);
max77888 = kzalloc(sizeof(struct max77888_dev), GFP_KERNEL);
if (!max77888) {
dev_err(&i2c->dev, "%s: Failed to alloc mem for max77888\n", __func__);
return -ENOMEM;
}
if (i2c->dev.of_node) {
pdata = devm_kzalloc(&i2c->dev, sizeof(struct max77888_platform_data),
GFP_KERNEL);
if (!pdata) {
dev_err(&i2c->dev, "Failed to allocate memory \n");
ret = -ENOMEM;
goto err;
}
ret = of_max77888_dt(&i2c->dev, pdata);
if (ret < 0){
dev_err(&i2c->dev, "Failed to get device of_node \n");
goto err;
}
i2c->dev.platform_data = pdata;
} else
pdata = i2c->dev.platform_data;
max77888->dev = &i2c->dev;
max77888->i2c = i2c;
max77888->irq = i2c->irq;
if (pdata) {
max77888->pdata = pdata;
pdata->irq_base = irq_alloc_descs(-1, 0, MAX77888_IRQ_NR, -1);
if (pdata->irq_base < 0) {
pr_err("%s:%s irq_alloc_descs Fail! ret(%d)\n",
MFD_DEV_NAME, __func__, pdata->irq_base);
ret = -EINVAL;
goto err;
} else
max77888->irq_base = pdata->irq_base;
max77888->irq_gpio = pdata->irq_gpio;
max77888->irqf_trigger = pdata->irqf_trigger;
max77888->wakeup = pdata->wakeup;
} else {
ret = -EINVAL;
goto err;
}
mutex_init(&max77888->i2c_lock);
i2c_set_clientdata(i2c, max77888);
if (max77888_read_reg(i2c, MAX77888_PMIC_REG_PMIC_ID2, ®_data) < 0) {
dev_err(max77888->dev,
"device not found on this channel (this is not an error)\n");
ret = -ENODEV;
goto err_w_lock;
} else {
/* print rev */
max77888->pmic_rev = (reg_data & 0x7);
max77888->pmic_ver = ((reg_data & 0xF8) >> 0x3);
pr_info("%s:%s device found: rev.0x%x, ver.0x%x\n",
MFD_DEV_NAME, __func__,
max77888->pmic_rev, max77888->pmic_ver);
}
/* No active discharge on safeout ldo 1,2 */
max77888_update_reg(i2c, MAX77888_CHG_REG_SAFEOUT_CTRL, 0x00, 0x30);
max77888->muic = i2c_new_dummy(i2c->adapter, I2C_ADDR_MUIC);
i2c_set_clientdata(max77888->muic, max77888);
max77888->haptic = i2c_new_dummy(i2c->adapter, I2C_ADDR_HAPTIC);
i2c_set_clientdata(max77888->haptic, max77888);
ret = max77888_irq_init(max77888);
if (ret < 0)
goto err_irq_init;
ret = mfd_add_devices(max77888->dev, -1, max77888_devs,
ARRAY_SIZE(max77888_devs), NULL, 0, NULL);
if (ret < 0)
goto err_mfd;
device_init_wakeup(max77888->dev, pdata->wakeup);
return ret;
err_mfd:
mfd_remove_devices(max77888->dev);
err_irq_init:
i2c_unregister_device(max77888->muic);
i2c_unregister_device(max77888->haptic);
err_w_lock:
mutex_destroy(&max77888->i2c_lock);
err:
kfree(max77888);
return ret;
}
int max77888_irq_init(struct max77888_dev *max77888)
{
int i;
int cur_irq;
int ret;
u8 i2c_data;
pr_info("func: %s, irq_gpio: %d, irq_base: %d\n", __func__,
max77888->irq_gpio, max77888->irq_base);
#ifdef CONFIG_MUIC_RESET_PIN_ENABLE
INIT_DELAYED_WORK(&muic_restore_work, max77888_restore_muic_reg);
#endif
if (!max77888->irq_gpio) {
dev_warn(max77888->dev, "No interrupt specified.\n");
max77888->irq_base = 0;
return 0;
}
if (!max77888->irq_base) {
dev_err(max77888->dev, "No interrupt base specified.\n");
return 0;
}
mutex_init(&max77888->irqlock);
max77888->irq = gpio_to_irq(max77888->irq_gpio);
ret = gpio_request(max77888->irq_gpio, "if_pmic_irq");
if (ret) {
dev_err(max77888->dev, "%s: failed requesting gpio %d\n",
__func__, max77888->irq_gpio);
return ret;
}
gpio_direction_input(max77888->irq_gpio);
gpio_free(max77888->irq_gpio);
#ifdef CONFIG_MUIC_RESET_PIN_ENABLE
if (muic_reset_pin)
{
max77888->irq_reset = gpio_to_irq(max77888->irq_reset_gpio);
ret = gpio_request(max77888->irq_reset_gpio, "muic_reset_irq");
if (ret) {
dev_err(max77888->dev, "%s: failed requesting gpio %d\n",
__func__, max77888->irq_reset_gpio);
return ret;
}
gpio_direction_input(max77888->irq_reset_gpio);
gpio_free(max77888->irq_reset_gpio);
}
#endif
/* Mask individual interrupt sources */
for (i = 0; i < MAX77888_IRQ_GROUP_NR; i++) {
struct i2c_client *i2c;
/* MUIC IRQ 0:MASK 1:NOT MASK */
/* Other IRQ 1:MASK 0:NOT MASK */
if (i >= MUIC_INT1 && i <= MUIC_INT3) {
max77888->irq_masks_cur[i] = 0x00;
max77888->irq_masks_cache[i] = 0x00;
} else {
max77888->irq_masks_cur[i] = 0xff;
max77888->irq_masks_cache[i] = 0xff;
}
i2c = get_i2c(max77888, i);
if (IS_ERR_OR_NULL(i2c))
continue;
if (max77888_mask_reg[i] == MAX77888_REG_INVALID)
continue;
if (i >= MUIC_INT1 && i <= MUIC_INT3)
max77888_write_reg(i2c, max77888_mask_reg[i], 0x00);
else
max77888_write_reg(i2c, max77888_mask_reg[i], 0xff);
}
/* Register with genirq */
for (i = 0; i < MAX77888_IRQ_NR; i++) {
cur_irq = i + max77888->irq_base;
irq_set_chip_data(cur_irq, max77888);
irq_set_chip_and_handler(cur_irq, &max77888_irq_chip,
handle_edge_irq);
irq_set_nested_thread(cur_irq, 1);
#ifdef CONFIG_ARM
set_irq_flags(cur_irq, IRQF_VALID);
#else
irq_set_noprobe(cur_irq);
#endif
}
/* Unmask max77888 interrupt */
ret = max77888_read_reg(max77888->i2c, MAX77888_PMIC_REG_INTSRC_MASK,
&i2c_data);
if (ret) {
dev_err(max77888->dev, "%s: fail to read muic reg\n", __func__);
return ret;
}
i2c_data &= ~(MAX77888_IRQSRC_CHG); /* Unmask charger interrupt */
i2c_data &= ~(MAX77888_IRQSRC_MUIC); /* Unmask muic interrupt */
max77888_write_reg(max77888->i2c, MAX77888_PMIC_REG_INTSRC_MASK,
i2c_data);
ret = request_threaded_irq(max77888->irq, NULL, max77888_irq_thread,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
"max77888-irq", max77888);
if (ret) {
dev_err(max77888->dev, "Failed to request IRQ %d: %d\n",
max77888->irq, ret);
return ret;
}
#ifdef CONFIG_MUIC_RESET_PIN_ENABLE
if (muic_reset_pin)
{
ret = request_threaded_irq(max77888->irq_reset, NULL, max77888_reset_irq_thread,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
"max77888-reset_irq", max77888);
if (ret) {
dev_err(max77888->dev, "Failed to request IRQ %d: %d\n",
max77888->irq_reset, ret);
return ret;
}
}
#endif
return 0;
}
static irqreturn_t max77888_irq_thread(int irq, void *data)
{
struct max77888_dev *max77888 = data;
u8 irq_reg[MAX77888_IRQ_GROUP_NR] = {0};
u8 tmp_irq_reg[MAX77888_IRQ_GROUP_NR] = {};
u8 irq_src;
int ret;
int i;
/* INTMASK1 3:ADC1K 0:ADC */
/* INTMASK2 4:VBVolt 0:Chgtype */
max77888_write_reg(max77888->muic, MAX77888_MUIC_REG_INTMASK1, 0x09);
max77888_write_reg(max77888->muic, MAX77888_MUIC_REG_INTMASK2, 0x11);
clear_retry:
ret = max77888_read_reg(max77888->i2c,
MAX77888_PMIC_REG_INTSRC, &irq_src);
if (ret < 0) {
dev_err(max77888->dev,
"Failed to read interrupt source: %d\n", ret);
return IRQ_NONE;
}
pr_info("%s: interrupt source(0x%02x)\n", __func__, irq_src);
if (irq_src & MAX77888_IRQSRC_CHG) {
/* CHG_INT */
ret = max77888_read_reg(max77888->i2c, MAX77888_CHG_REG_CHG_INT,
&irq_reg[CHG_INT]);
pr_info("%s: charger interrupt(0x%02x)\n",
__func__, irq_reg[CHG_INT]);
/* mask chgin to prevent chgin infinite interrupt
* chgin is unmasked chgin isr
*/
if (irq_reg[CHG_INT] &
max77888_irqs[MAX77888_CHG_IRQ_CHGIN_I].mask) {
u8 reg_data;
max77888_read_reg(max77888->i2c,
MAX77888_CHG_REG_CHG_INT_MASK, ®_data);
reg_data |= (1 << 6);
max77888_write_reg(max77888->i2c,
MAX77888_CHG_REG_CHG_INT_MASK, reg_data);
}
}
if (irq_src & MAX77888_IRQSRC_TOP) {
/* TOPSYS_INT */
ret = max77888_read_reg(max77888->i2c,
MAX77888_PMIC_REG_TOPSYS_INT,
&irq_reg[TOPSYS_INT]);
pr_info("%s: topsys interrupt(0x%02x)\n",
__func__, irq_reg[TOPSYS_INT]);
}
if (irq_src & MAX77888_IRQSRC_FLASH) {
/* LED_INT */
ret = max77888_read_reg(max77888->i2c,
MAX77888_LED_REG_FLASH_INT, &irq_reg[LED_INT]);
pr_info("%s: led interrupt(0x%02x)\n",
__func__, irq_reg[LED_INT]);
}
if (irq_src & MAX77888_IRQSRC_MUIC) {
/* MUIC INT1 ~ INT3 */
max77888_bulk_read(max77888->muic, MAX77888_MUIC_REG_INT1,
MAX77888_NUM_IRQ_MUIC_REGS,
&tmp_irq_reg[MUIC_INT1]);
/* Or temp irq register to irq register for if it retries */
for (i = MUIC_INT1; i < MAX77888_IRQ_GROUP_NR; i++)
irq_reg[i] |= tmp_irq_reg[i];
pr_info("%s: muic interrupt(0x%02x, 0x%02x, 0x%02x)\n",
__func__, irq_reg[MUIC_INT1],
irq_reg[MUIC_INT2], irq_reg[MUIC_INT3]);
}
pr_debug("%s: irq gpio post-state(0x%02x)\n", __func__,
gpio_get_value(max77888->irq_gpio));
if (gpio_get_value(max77888->irq_gpio) == 0) {
pr_warn("%s: irq_gpio is not High!\n", __func__);
goto clear_retry;
}
#if 0
/* Apply masking */
for (i = 0; i < MAX77888_IRQ_GROUP_NR; i++) {
if (i >= MUIC_INT1 && i <= MUIC_INT3)
irq_reg[i] &= max77888->irq_masks_cur[i];
else
irq_reg[i] &= ~max77888->irq_masks_cur[i];
}
#endif
/* Report */
for (i = 0; i < MAX77888_IRQ_NR; i++) {
if (irq_reg[max77888_irqs[i].group] & max77888_irqs[i].mask)
handle_nested_irq(max77888->irq_base + i);
}
return IRQ_HANDLED;
}
