static ssize_t mc9s08dz60_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
int ret;
unsigned long reg, new_value;
u8 value;
char *p;
strict_strtoul(buf, 16, ®);
p = NULL;
p = memchr(buf, ' ', count);
if (p == NULL) {
mc9s08dz60_read_reg(reg, &value);
pr_info("reg%02lu: %06x\n", reg, value);
return count;
}
p += 1;
strict_strtoul(p, 16, &new_value);
value = new_value;
ret = mc9s08dz60_write_reg((u8)reg, value);
if (ret == 0)
pr_info("write reg%02lx: %06x\n", reg, value);
else
pr_info("register update failed\n");
return count;
}
static int mcu_pmic_read(int reg_num, unsigned int *reg_val)
{
int ret;
u8 value = 0;
/* mcu ops */
if (reg_num >= REG_MCU_VERSION && reg_num <= REG_MCU_DES_FLAG)
ret = mc9s08dz60_read_reg(mcu_pmic_reg_addr_table[reg_num],
&value);
else if (reg_num >= REG_MAX8660_OUTPUT_ENABLE_1
&& reg_num <= REG_MAX8660_FORCE_PWM)
ret = max8660_get_buffered_reg_val(reg_num, &value);
else
return -1;
if (ret < 0)
return -1;
*reg_val = value;
return 0;
}
static ssize_t mc9s08dz60_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
unsigned int i;
u8 value;
int offset = 7;
for (i = 0; i < 7; i++) {
mc9s08dz60_read_reg(i, &value);
pr_info("reg%02x: %02x\t", i, value);
mc9s08dz60_read_reg(i + offset, &value);
pr_info("reg%02x: %02x\t", i + offset, value);
mc9s08dz60_read_reg(i + offset * 2, &value);
pr_info("reg%02x: %02x\t", i + offset * 2, value);
mc9s08dz60_read_reg(i + offset * 3, &value);
pr_info("reg%02x: %02x\t", i + offset * 3, value);
mc9s08dz60_read_reg(i + offset * 4, &value);
pr_info("reg%02x: %02x\t", i + offset * 4, value);
mc9s08dz60_read_reg(i + offset * 5, &value);
pr_info("reg%02x: %02x\n", i + offset * 5, value);
}
return 0;
}
