/* * mdp4_overlay0_done_lcdc: called from isr */ void mdp4_overlay0_done_lcdc(int cndx) { struct vsycn_ctrl *vctrl; struct mdp4_overlay_pipe *pipe; vctrl = &vsync_ctrl_db[cndx]; pipe = vctrl->base_pipe; #if defined (CONFIG_EUR_MODEL_GT_I9210) if (pipe == NULL) return; #endif spin_lock(&vctrl->spin_lock); vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM); vctrl->ov_done++; complete_all(&vctrl->ov_comp); if (pipe->ov_blt_addr == 0) { spin_unlock(&vctrl->spin_lock); return; } mdp4_lcdc_blt_dmap_update(pipe); pipe->dmap_cnt++; spin_unlock(&vctrl->spin_lock); }
/* * mdp4_overlay0_done_lcdc: called from isr */ void mdp4_overlay0_done_lcdc(int cndx) { struct vsycn_ctrl *vctrl; struct mdp4_overlay_pipe *pipe; vctrl = &vsync_ctrl_db[cndx]; pipe = vctrl->base_pipe; spin_lock(&vctrl->spin_lock); vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM); vctrl->ov_done++; complete_all(&vctrl->ov_comp); if (pipe == NULL) { spin_unlock(&vctrl->spin_lock); return; } if (pipe->ov_blt_addr == 0) { spin_unlock(&vctrl->spin_lock); return; } if (mdp_rev <= MDP_REV_41) mdp4_mixer_blend_cfg(MDP4_MIXER0); mdp4_lcdc_blt_dmap_update(pipe); pipe->dmap_cnt++; spin_unlock(&vctrl->spin_lock); }
/* * mdp4_overlay0_done_lcdc: called from isr */ void mdp4_overlay0_done_lcdc(struct mdp_dma_data *dma) { spin_lock(&mdp_spin_lock); dma->busy = FALSE; if (lcdc_pipe->blt_addr == 0) { spin_unlock(&mdp_spin_lock); return; } mdp4_lcdc_blt_dmap_update(lcdc_pipe); lcdc_pipe->dmap_cnt++; mdp_disable_irq_nosync(MDP_OVERLAY0_TERM); spin_unlock(&mdp_spin_lock); complete(&dma->comp); }