int mdss_edp_on(struct mdss_panel_data *pdata) { struct mdss_edp_drv_pdata *edp_drv = NULL; int ret = 0; if (!pdata) { pr_err("%s: Invalid input data\n", __func__); return -EINVAL; } edp_drv = container_of(pdata, struct mdss_edp_drv_pdata, panel_data); pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash); if (!edp_drv->cont_splash) { /* vote for clocks */ mdss_edp_phy_pll_reset(edp_drv); mdss_edp_aux_reset(edp_drv); mdss_edp_mainlink_reset(edp_drv); mdss_edp_aux_ctrl(edp_drv, 1); ret = mdss_edp_prepare_clocks(edp_drv); if (ret) return ret; mdss_edp_phy_power_ctrl(edp_drv, 1); ret = mdss_edp_clk_enable(edp_drv); if (ret) { mdss_edp_unprepare_clocks(edp_drv); return ret; } mdss_edp_phy_pll_ready(edp_drv); mdss_edp_lane_power_ctrl(edp_drv, 1); mdss_edp_clock_synchrous(edp_drv, 1); mdss_edp_phy_vm_pe_init(edp_drv); mdss_edp_config_ctrl(edp_drv); mdss_edp_sw_mvid_nvid(edp_drv); mdss_edp_timing_cfg(edp_drv); gpio_set_value(edp_drv->gpio_panel_en, 1); INIT_COMPLETION(edp_drv->idle_comp); mdss_edp_mainlink_ctrl(edp_drv, 1); } else { mdss_edp_aux_ctrl(edp_drv, 1); } mdss_edp_irq_enable(edp_drv); mdss_edp_wait4train(edp_drv); edp_drv->cont_splash = 0; pr_debug("%s:-\n", __func__); return ret; }
int mdss_edp_on(struct mdss_panel_data *pdata) { struct mdss_edp_drv_pdata *edp_drv = NULL; int ret = 0; if (!pdata) { pr_err("%s: Invalid input data\n", __func__); return -EINVAL; } edp_drv = container_of(pdata, struct mdss_edp_drv_pdata, panel_data); pr_debug("%s:+\n", __func__); if (edp_drv->train_start == 0) edp_drv->train_start++; mdss_edp_phy_pll_reset(edp_drv->base); mdss_edp_aux_reset(edp_drv->base); mdss_edp_mainlink_reset(edp_drv->base); ret = mdss_edp_prepare_clocks(edp_drv); if (ret) return ret; mdss_edp_phy_powerup(edp_drv->base, 1); mdss_edp_pll_configure(edp_drv->base, edp_drv->edid.timing[0].pclk); mdss_edp_phy_pll_ready(edp_drv->base); ret = mdss_edp_clk_enable(edp_drv); if (ret) { mdss_edp_unprepare_clocks(edp_drv); return ret; } mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false); mdss_edp_aux_ctrl(edp_drv->base, 1); mdss_edp_lane_power_ctrl(edp_drv->base, edp_drv->dpcd.max_lane_count, 1); mdss_edp_enable_mainlink(edp_drv->base, 1); mdss_edp_config_clk(edp_drv->base, edp_drv->mmss_cc_base); mdss_edp_clock_synchrous(edp_drv->base, 1); mdss_edp_phy_vm_pe_init(edp_drv->base); mdss_edp_config_sync(edp_drv->base); mdss_edp_config_sw_div(edp_drv->base); mdss_edp_config_static_mdiv(edp_drv->base); gpio_set_value(edp_drv->gpio_panel_en, 1); mdss_edp_irq_enable(edp_drv); pr_debug("%s:-\n", __func__); return 0; }