static inline unsigned int ctr_read(unsigned int i) { switch(i) { case 0: return mfpmr(PMRN_PMC0); case 1: return mfpmr(PMRN_PMC1); case 2: return mfpmr(PMRN_PMC2); case 3: return mfpmr(PMRN_PMC3); default: return 0; } }
static int fsl_emb_start(struct op_counter_config *ctr) { int i; mtmsr(mfmsr() | MSR_PMM); for (i = 0; i < num_counters; ++i) { if (ctr[i].enabled) { ctr_write(i, reset_value[i]); /* Set each enabled counter to only * count when the Mark bit is *not* set */ set_pmc_marked(i, 1, 0); pmc_start_ctr(i, 1); } else { ctr_write(i, 0); /* Set the ctr to be stopped */ pmc_start_ctr(i, 0); } } /* Clear the freeze bit, and enable the interrupt. * The counters won't actually start until the rfi clears * the PMM bit */ pmc_start_ctrs(1); oprofile_running = 1; pr_debug("start on cpu %d, pmgc0 %x\n", smp_processor_id(), mfpmr(PMRN_PMGC0)); return 0; }
static void pmc_stop_ctrs(void) { u32 pmgc0 = mfpmr(PMRN_PMGC0); pmgc0 |= PMGC0_FAC; pmgc0 &= ~(PMGC0_PMIE | PMGC0_FCECE); mtpmr(PMRN_PMGC0, pmgc0); }
static void fsl_emb_stop(void) { /* freeze counters */ pmc_stop_ctrs(); oprofile_running = 0; pr_debug("stop on cpu %d, pmgc0 %x\n", smp_processor_id(), mfpmr(PMRN_PMGC0)); mb(); }
static inline u32 get_pmlca(int ctr) { u32 pmlca; switch (ctr) { case 0: pmlca = mfpmr(PMRN_PMLCA0); break; case 1: pmlca = mfpmr(PMRN_PMLCA1); break; case 2: pmlca = mfpmr(PMRN_PMLCA2); break; case 3: pmlca = mfpmr(PMRN_PMLCA3); break; default: panic("Bad ctr number\n"); } return pmlca; }
static void pmc_start_ctrs(int enable) { u32 pmgc0 = mfpmr(PMRN_PMGC0); pmgc0 &= ~PMGC0_FAC; pmgc0 |= PMGC0_FCECE; if (enable) pmgc0 |= PMGC0_PMIE; else pmgc0 &= ~PMGC0_PMIE; mtpmr(PMRN_PMGC0, pmgc0); }
static void dump_pmcs(void) { printk("pmgc0: %x\n", mfpmr(PMRN_PMGC0)); printk("pmc\t\tpmlca\t\tpmlcb\n"); printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC0), mfpmr(PMRN_PMLCA0), mfpmr(PMRN_PMLCB0)); printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC1), mfpmr(PMRN_PMLCA1), mfpmr(PMRN_PMLCB1)); printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC2), mfpmr(PMRN_PMLCA2), mfpmr(PMRN_PMLCB2)); printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC3), mfpmr(PMRN_PMLCA3), mfpmr(PMRN_PMLCB3)); }
void fsl_pm_end(u8 idx) { pm_stats[idx].cycles[1] = mfpmr(PMR_UPMC0); pm_stats[idx].instrs[1] = mfpmr(PMR_UPMC1); }
void fsl_pm_begin(u8 idx) { pm_stats[idx].cycles[0] = mfpmr(PMR_UPMC0); pm_stats[idx].instrs[0] = mfpmr(PMR_UPMC1); }