/**
* Check link status
*
* @v smsc95xx SMSC95xx device
* @ret rc Return status code
*/
static int smsc95xx_check_link ( struct smsc95xx_device *smsc95xx ) {
struct net_device *netdev = smsc95xx->netdev;
int intr;
int rc;
/* Read PHY interrupt source */
intr = mii_read ( &smsc95xx->mii, SMSC95XX_MII_PHY_INTR_SOURCE );
if ( intr < 0 ) {
rc = intr;
DBGC ( smsc95xx, "SMSC95XX %p could not get PHY interrupt "
"source: %s\n", smsc95xx, strerror ( rc ) );
return rc;
}
/* Acknowledge PHY interrupt */
if ( ( rc = mii_write ( &smsc95xx->mii, SMSC95XX_MII_PHY_INTR_SOURCE,
intr ) ) != 0 ) {
DBGC ( smsc95xx, "SMSC95XX %p could not acknowledge PHY "
"interrupt: %s\n", smsc95xx, strerror ( rc ) );
return rc;
}
/* Check link status */
if ( ( rc = mii_check_link ( &smsc95xx->mii, netdev ) ) != 0 ) {
DBGC ( smsc95xx, "SMSC95XX %p could not check link: %s\n",
smsc95xx, strerror ( rc ) );
return rc;
}
DBGC ( smsc95xx, "SMSC95XX %p link %s (intr %#04x)\n",
smsc95xx, ( netdev_link_ok ( netdev ) ? "up" : "down" ), intr );
return 0;
}
/*
* restart auto-negotiation, config UMAC and RGMII block
*/
void mii_setup(struct net_device *dev)
{
struct BcmEnet_devctrl *pDevCtrl = netdev_priv(dev);
struct ethtool_cmd ecmd ;
volatile struct uniMacRegs *umac = pDevCtrl->umac;
TRACE(("%s: %s\n", __func__, netif_carrier_ok(pDevCtrl->dev) ?
"netif_carrier_on" : "netif_carrier_off"));
if (pDevCtrl->phyType == BRCM_PHY_TYPE_MOCA) {
/* MoCA case */
netif_carrier_on(pDevCtrl->dev);
pDevCtrl->dev->flags |= IFF_RUNNING;
return ;
}
mii_ethtool_gset(&pDevCtrl->mii, &ecmd);
if (mii_link_ok(&pDevCtrl->mii) && !netif_carrier_ok(pDevCtrl->dev)) {
printk(KERN_INFO "%s: Link is up, %d Mbps %s Duplex\n",
pDevCtrl->dev->name,
ecmd.speed,
ecmd.duplex == DUPLEX_FULL ? "Full" : "Half");
} else if (!mii_link_ok(&pDevCtrl->mii) &&
netif_carrier_ok(pDevCtrl->dev)) {
printk(KERN_INFO "%s: Link is down\n", pDevCtrl->dev->name);
return;
}
mii_check_link(&pDevCtrl->mii);
/*
* program UMAC and RGMII block accordingly, if the PHY is
* not capable of in-band signaling.
*/
if (pDevCtrl->phyType != BRCM_PHY_TYPE_EXT_RGMII_IBS) {
GENET_RGMII_OOB_CTRL(pDevCtrl) &= ~OOB_DISABLE;
GENET_RGMII_OOB_CTRL(pDevCtrl) |= RGMII_LINK;
if (ecmd.duplex == DUPLEX_FULL)
umac->cmd &= ~CMD_HD_EN;
else
umac->cmd |= CMD_HD_EN;
/* speed */
umac->cmd = umac->cmd & ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT);
if (ecmd.speed == SPEED_10)
umac->cmd |= (UMAC_SPEED_10 << CMD_SPEED_SHIFT);
else if (ecmd.speed == SPEED_100)
umac->cmd |= (UMAC_SPEED_100 << CMD_SPEED_SHIFT);
else if (ecmd.speed == SPEED_1000)
umac->cmd |= (UMAC_SPEED_1000 << CMD_SPEED_SHIFT);
}
/* pause capability */
if (pDevCtrl->phyType == BRCM_PHY_TYPE_INT ||
pDevCtrl->phyType == BRCM_PHY_TYPE_EXT_MII) {
unsigned int val;
val = mii_read(dev, pDevCtrl->phyAddr, MII_LPA);
if (!(val & LPA_PAUSE_CAP)) {
umac->cmd |= CMD_RX_PAUSE_IGNORE;
umac->cmd |= CMD_TX_PAUSE_IGNORE;
}
} else if (pDevCtrl->phyType == BRCM_PHY_TYPE_EXT_RGMII ||
pDevCtrl->phyType == BRCM_PHY_TYPE_EXT_RGMII_IBS) {
unsigned int val;
val = mii_read(dev, pDevCtrl->phyAddr, MII_BRCM_AUX_STAT_SUM);
if (!(val & MII_BRCM_AUX_GPHY_RX_PAUSE))
umac->cmd |= CMD_RX_PAUSE_IGNORE;
if (!(val & MII_BRCM_AUX_GPHY_TX_PAUSE))
umac->cmd |= CMD_TX_PAUSE_IGNORE;
}
}
/******************************************************************************
* struct napi_struct functions
*****************************************************************************/
static int ftmac100_poll(struct napi_struct *napi, int budget)
{
struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
struct net_device *netdev = priv->netdev;
unsigned int status;
bool completed = true;
int rx = 0;
status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
/*
* FTMAC100_INT_RPKT_FINISH:
* RX DMA has received packets into RX buffer successfully
*
* FTMAC100_INT_NORXBUF:
* RX buffer unavailable
*/
bool retry;
do {
retry = ftmac100_rx_packet(priv, &rx);
} while (retry && rx < budget);
if (retry && rx == budget)
completed = false;
}
if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
/*
* FTMAC100_INT_XPKT_OK:
* packet transmitted to ethernet successfully
*
* FTMAC100_INT_XPKT_LOST:
* packet transmitted to ethernet lost due to late
* collision or excessive collision
*/
ftmac100_tx_complete(priv);
}
if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
if (net_ratelimit())
netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
if (status & FTMAC100_INT_NORXBUF) {
/* RX buffer unavailable */
netdev->stats.rx_over_errors++;
}
if (status & FTMAC100_INT_RPKT_LOST) {
/* received packet lost due to RX FIFO full */
netdev->stats.rx_fifo_errors++;
}
if (status & FTMAC100_INT_PHYSTS_CHG) {
/* PHY link status change */
mii_check_link(&priv->mii);
}
}
if (completed) {
/* stop polling */
napi_complete(napi);
ftmac100_enable_all_int(priv);
}
return rx;
}
static int ftmac100_poll(struct napi_struct *napi, int budget)
{
struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
struct net_device *netdev = priv->netdev;
unsigned int status;
bool completed = true;
int rx = 0;
status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
/*
*/
bool retry;
do {
retry = ftmac100_rx_packet(priv, &rx);
} while (retry && rx < budget);
if (retry && rx == budget)
completed = false;
}
if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
/*
*/
ftmac100_tx_complete(priv);
}
if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
if (net_ratelimit())
netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
if (status & FTMAC100_INT_NORXBUF) {
/* */
netdev->stats.rx_over_errors++;
}
if (status & FTMAC100_INT_RPKT_LOST) {
/* */
netdev->stats.rx_fifo_errors++;
}
if (status & FTMAC100_INT_PHYSTS_CHG) {
/* */
mii_check_link(&priv->mii);
}
}
if (completed) {
/* */
napi_complete(napi);
ftmac100_enable_all_int(priv);
}
return rx;
}
