int mips32_configure_break_unit(struct target *target)
{
/* get pointers to arch-specific information */
struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
int retval;
uint32_t dcr;
if (mips32->bp_scanned)
return ERROR_OK;
/* get info about breakpoint support */
retval = target_read_u32(target, EJTAG_DCR, &dcr);
if (retval != ERROR_OK)
return retval;
/* EJTAG 2.0 defines IB and DB bits in IMP instead of DCR. */
if (ejtag_info->ejtag_version == EJTAG_VERSION_20) {
ejtag_info->debug_caps = dcr & EJTAG_DCR_ENM;
if (!(ejtag_info->impcode & EJTAG_V20_IMP_NOIB))
ejtag_info->debug_caps |= EJTAG_DCR_IB;
if (!(ejtag_info->impcode & EJTAG_V20_IMP_NODB))
ejtag_info->debug_caps |= EJTAG_DCR_DB;
} else
/* keep debug caps for later use */
ejtag_info->debug_caps = dcr & (EJTAG_DCR_ENM
| EJTAG_DCR_IB | EJTAG_DCR_DB);
if (ejtag_info->debug_caps & EJTAG_DCR_IB) {
retval = mips32_configure_ibs(target);
if (retval != ERROR_OK)
return retval;
}
if (ejtag_info->debug_caps & EJTAG_DCR_DB) {
retval = mips32_configure_dbs(target);
if (retval != ERROR_OK)
return retval;
}
/* check if target endianness settings matches debug control register */
if (((ejtag_info->debug_caps & EJTAG_DCR_ENM)
&& (target->endianness == TARGET_LITTLE_ENDIAN)) ||
(!(ejtag_info->debug_caps & EJTAG_DCR_ENM)
&& (target->endianness == TARGET_BIG_ENDIAN)))
LOG_WARNING("DCR endianness settings does not match target settings");
LOG_DEBUG("DCR 0x%" PRIx32 " numinst %i numdata %i", dcr, mips32->num_inst_bpoints,
mips32->num_data_bpoints);
mips32->bp_scanned = 1;
return ERROR_OK;
}
int mips32_configure_break_unit(struct target *target)
{
/* get pointers to arch-specific information */
struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
int retval;
uint32_t dcr;
if (mips32->bp_scanned)
return ERROR_OK;
/* get info about breakpoint support */
retval = target_read_u32(target, EJTAG_DCR, &dcr);
if (retval != ERROR_OK)
return retval;
/* EJTAG 2.0 does not specify EJTAG_DCR_IB and EJTAG_DCR_DB bits,
* assume IB and DB registers are always present. */
if (ejtag_info->ejtag_version == EJTAG_VERSION_20)
dcr |= EJTAG_DCR_IB | EJTAG_DCR_DB;
if (dcr & EJTAG_DCR_IB) {
retval = mips32_configure_ibs(target);
if (retval != ERROR_OK)
return retval;
}
if (dcr & EJTAG_DCR_DB) {
retval = mips32_configure_dbs(target);
if (retval != ERROR_OK)
return retval;
}
/* check if target endianness settings matches debug control register */
if (((dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_LITTLE_ENDIAN)) ||
(!(dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_BIG_ENDIAN)))
LOG_WARNING("DCR endianness settings does not match target settings");
LOG_DEBUG("DCR 0x%" PRIx32 " numinst %i numdata %i", dcr, mips32->num_inst_bpoints,
mips32->num_data_bpoints);
mips32->bp_scanned = 1;
return ERROR_OK;
}
