static uint mmc_spi_readdata(struct mmc_spi_host *host, void *xbuf,
uint32_t bcnt, uint32_t bsize)
{
uint8_t *buf = xbuf;
uint8_t r1;
uint16_t crc;
int i;
while (bcnt--) {
for (i = 0; i < RTOUT; i++) {
mmc_spi_readbytes(host, 1, &r1);
if (r1 != 0xff) /* data token */
break;
}
if (r1 == SPI_TOKEN_SINGLE) {
mmc_spi_readbytes(host, bsize, buf);
mmc_spi_readbytes(host, 2, &crc);
#ifdef CONFIG_MMC_SPI_CRC_ON
if (be16_to_cpu(cyg_crc16(buf, bsize)) != crc) {
dev_dbg(host->dev, "%s: CRC error\n", __func__);
r1 = R1_SPI_COM_CRC;
break;
}
#endif
r1 = 0;
} else {
r1 = R1_SPI_ERROR;
break;
}
buf += bsize;
}
return r1;
}
static int mmc_spi_command_send(struct mmc_spi_host *host, struct mci_cmd *cmd)
{
uint8_t r1;
uint8_t command[7];
int i;
command[0] = 0xff;
command[1] = MMC_SPI_CMD(cmd->cmdidx);
command[2] = cmd->cmdarg >> 24;
command[3] = cmd->cmdarg >> 16;
command[4] = cmd->cmdarg >> 8;
command[5] = cmd->cmdarg;
#ifdef CONFIG_MMC_SPI_CRC_ON
command[6] = (crc7(0, &command[1], 5) << 1) | 0x01;
#else
command[6] = MMC_SPI_CMD0_CRC;
#endif
mmc_spi_writebytes(host, 7, command);
for (i = 0; i < CTOUT; i++) {
mmc_spi_readbytes(host, 1, &r1);
if (i && ((r1 & 0x80) == 0)) { /* r1 response */
dev_dbg(host->dev, "%s: CMD%d, TRY %d, RESP %x\n", __func__, cmd->cmdidx, i, r1);
break;
}
}
return r1;
}
static int mmc_spi_skip(struct mmc_spi_host *host, unsigned long timeout,
unsigned n, u8 byte)
{
u8 *cp = host->data->status;
unsigned long start = jiffies;
while (1) {
int status;
unsigned i;
status = mmc_spi_readbytes(host, n);
if (status < 0)
return status;
for (i = 0; i < n; i++) {
if (cp[i] != byte)
return cp[i];
}
if (time_is_before_jiffies(start + timeout))
break;
/* If we need long timeouts, we may release the CPU.
* We use jiffies here because we want to have a relation
* between elapsed time and the blocking of the scheduler.
*/
if (time_is_before_jiffies(start+1))
schedule();
}
return -ETIMEDOUT;
}
static int
mmc_spi_skip(struct mmc_spi_host *host, ktime_t timeout, unsigned n, u8 byte)
{
u8 *cp = host->data->status;
timeout = ktime_add(timeout, ktime_get());
while (1) {
int status;
unsigned i;
status = mmc_spi_readbytes(host, n);
if (status < 0)
return status;
for (i = 0; i < n; i++) {
if (cp[i] != byte)
return cp[i];
}
/* REVISIT investigate msleep() to avoid busy-wait I/O
* in at least some cases.
*/
if (ktime_to_ns(ktime_sub(ktime_get(), timeout)) > 0)
break;
}
return -ETIMEDOUT;
}
static int mmc_spi_init(struct mci_host *mci, struct device_d *mci_dev)
{
struct mmc_spi_host *host = to_spi_host(mci);
mmc_spi_readbytes(host, 10, NULL);
/*
* Do a burst with chipselect active-high. We need to do this to
* meet the requirement of 74 clock cycles with both chipselect
* and CMD (MOSI) high before CMD0 ... after the card has been
* powered up to Vdd(min), and so is ready to take commands.
*
* Some cards are particularly needy of this (e.g. Viking "SD256")
* while most others don't seem to care.
*
* Note that this is one of the places MMC/SD plays games with the
* SPI protocol. Another is that when chipselect is released while
* the card returns BUSY status, the clock must issue several cycles
* with chipselect high before the card will stop driving its output.
*/
host->spi->mode |= SPI_CS_HIGH;
if (spi_setup(host->spi) != 0) {
/* Just warn; most cards work without it. */
dev_warn(&host->spi->dev,
"can't change chip-select polarity\n");
host->spi->mode &= ~SPI_CS_HIGH;
} else {
mmc_spi_readbytes(host, 18, NULL);
host->spi->mode &= ~SPI_CS_HIGH;
if (spi_setup(host->spi) != 0) {
/* Wot, we can't get the same setup we had before? */
dev_err(&host->spi->dev,
"can't restore chip-select polarity\n");
}
}
return 0;
}
static int mmc_spi_request(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
{
struct mmc_spi_host *host = to_spi_host(mci);
uint8_t r1;
int i;
int ret = 0;
dev_dbg(host->dev, "%s : CMD%02d, RESP %s, ARG 0x%X\n", __func__,
cmd->cmdidx, maptype(cmd), cmd->cmdarg);
r1 = mmc_spi_command_send(host, cmd);
cmd->response[0] = r1;
if (r1 == 0xff) { /* no response */
ret = -ETIME;
goto done;
} else if (r1 & R1_SPI_COM_CRC) {
ret = -ECOMM;
goto done;
} else if (r1 & ~R1_SPI_IDLE) { /* other errors */
ret = -ETIME;
goto done;
} else if (cmd->resp_type == MMC_RSP_R2) {
r1 = mmc_spi_readdata(host, cmd->response, 1, 16);
for (i = 0; i < 4; i++)
cmd->response[i] = be32_to_cpu(cmd->response[i]);
dev_dbg(host->dev, "MMC_RSP_R2 -> %x %x %x %x\n", cmd->response[0], cmd->response[1],
cmd->response[2], cmd->response[3]);
} else if (!data) {
switch (cmd->cmdidx) {
case SD_CMD_SEND_IF_COND:
case MMC_CMD_SPI_READ_OCR:
mmc_spi_readbytes(host, 4, cmd->response);
cmd->response[0] = be32_to_cpu(cmd->response[0]);
break;
}
} else {
if (data->flags == MMC_DATA_READ) {
dev_dbg(host->dev, "%s : DATA READ, %x blocks, bsize = 0x%X\n", __func__,
data->blocks, data->blocksize);
r1 = mmc_spi_readdata(host, data->dest,
data->blocks, data->blocksize);
} else if (data->flags == MMC_DATA_WRITE) {
dev_dbg(host->dev, "%s : DATA WRITE, %x blocks, bsize = 0x%X\n", __func__,
data->blocks, data->blocksize);
r1 = mmc_spi_writedata(host, data->src,
data->blocks, data->blocksize,
(cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK));
}
if (r1 & R1_SPI_COM_CRC)
ret = -ECOMM;
else if (r1)
ret = -ETIME;
}
done:
mmc_cs_off(host);
return ret;
return 0;
}
static uint mmc_spi_writedata(struct mmc_spi_host *host, const void *xbuf,
uint32_t bcnt, uint32_t bsize, int multi)
{
const uint8_t *buf = xbuf;
uint8_t r1;
uint16_t crc = 0;
uint8_t tok[2];
int i;
tok[0] = 0xff;
tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
while (bcnt--) {
#ifdef CONFIG_MMC_SPI_CRC_ON
crc = be16_to_cpu(cyg_crc16((u8 *)buf, bsize));
#endif
mmc_spi_writebytes(host, 2, tok);
mmc_spi_writebytes(host, bsize, (void *)buf);
mmc_spi_writebytes(host, 2, &crc);
for (i = 0; i < CTOUT; i++) {
mmc_spi_readbytes(host, 1, &r1);
if ((r1 & 0x11) == 0x01) /* response token */
break;
}
dev_dbg(host->dev,"%s : TOKEN%d RESP 0x%X\n", __func__, i, r1);
if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) {
for (i = 0; i < WTOUT; i++) { /* wait busy */
mmc_spi_readbytes(host, 1, &r1);
if (i && r1 == 0xff) {
r1 = 0;
break;
}
}
if (i == WTOUT) {
dev_dbg(host->dev, "%s: wtout %x\n", __func__, r1);
r1 = R1_SPI_ERROR;
break;
}
} else {
dev_dbg(host->dev, "%s: err %x\n", __func__, r1);
r1 = R1_SPI_COM_CRC;
break;
}
buf += bsize;
}
if (multi && bcnt == -1) { /* stop multi write */
tok[1] = SPI_TOKEN_STOP_TRAN;
mmc_spi_writebytes(host, 2, tok);
for (i = 0; i < WTOUT; i++) { /* wait busy */
mmc_spi_readbytes(host, 1, &r1);
if (i && r1 == 0xff) {
r1 = 0;
break;
}
}
if (i == WTOUT) {
dev_dbg(host->dev, "%s: wstop %x\n", __func__, r1);
r1 = R1_SPI_ERROR;
}
}
return r1;
}
/* return zero, else negative errno after setting cmd->error */
static int mmc_spi_response_get(struct mmc_spi_host *host,
struct mmc_command *cmd, int cs_on)
{
u8 *cp = host->data->status;
u8 *end = cp + host->t.len;
int value = 0;
int bitshift;
u8 leftover = 0;
unsigned short rotator;
int i;
char tag[32];
snprintf(tag, sizeof(tag), " ... CMD%d response SPI_%s",
cmd->opcode, maptype(cmd));
/* Except for data block reads, the whole response will already
* be stored in the scratch buffer. It's somewhere after the
* command and the first byte we read after it. We ignore that
* first byte. After STOP_TRANSMISSION command it may include
* two data bits, but otherwise it's all ones.
*/
cp += 8;
while (cp < end && *cp == 0xff)
cp++;
/* Data block reads (R1 response types) may need more data... */
if (cp == end) {
cp = host->data->status;
end = cp+1;
/* Card sends N(CR) (== 1..8) bytes of all-ones then one
* status byte ... and we already scanned 2 bytes.
*
* REVISIT block read paths use nasty byte-at-a-time I/O
* so it can always DMA directly into the target buffer.
* It'd probably be better to memcpy() the first chunk and
* avoid extra i/o calls...
*
* Note we check for more than 8 bytes, because in practice,
* some SD cards are slow...
*/
for (i = 2; i < 16; i++) {
value = mmc_spi_readbytes(host, 1);
if (value < 0)
goto done;
if (*cp != 0xff)
goto checkstatus;
}
value = -ETIMEDOUT;
goto done;
}
checkstatus:
bitshift = 0;
if (*cp & 0x80) {
/* Houston, we have an ugly card with a bit-shifted response */
rotator = *cp++ << 8;
/* read the next byte */
if (cp == end) {
value = mmc_spi_readbytes(host, 1);
if (value < 0)
goto done;
cp = host->data->status;
end = cp+1;
}
rotator |= *cp++;
while (rotator & 0x8000) {
bitshift++;
rotator <<= 1;
}
cmd->resp[0] = rotator >> 8;
leftover = rotator;
} else {
/* return zero, else negative errno after setting cmd->error */
static int mmc_spi_response_get(struct mmc_spi_host *host,
struct mmc_command *cmd, int cs_on)
{
u8 *cp = host->data->status;
u8 *end = cp + host->t.len;
int value = 0;
char tag[32];
snprintf(tag, sizeof(tag), " ... CMD%d response SPI_%s",
cmd->opcode, maptype(cmd));
/* Except for data block reads, the whole response will already
* be stored in the scratch buffer. It's somewhere after the
* command and the first byte we read after it. We ignore that
* first byte. After STOP_TRANSMISSION command it may include
* two data bits, but otherwise it's all ones.
*/
cp += 8;
while (cp < end && *cp == 0xff)
cp++;
/* Data block reads (R1 response types) may need more data... */
if (cp == end) {
unsigned i;
cp = host->data->status;
/* Card sends N(CR) (== 1..8) bytes of all-ones then one
* status byte ... and we already scanned 2 bytes.
*
* REVISIT block read paths use nasty byte-at-a-time I/O
* so it can always DMA directly into the target buffer.
* It'd probably be better to memcpy() the first chunk and
* avoid extra i/o calls...
*/
for (i = 2; i < 9; i++) {
value = mmc_spi_readbytes(host, 1);
if (value < 0)
goto done;
if (*cp != 0xff)
goto checkstatus;
}
value = -ETIMEDOUT;
goto done;
}
checkstatus:
if (*cp & 0x80) {
dev_dbg(&host->spi->dev, "%s: INVALID RESPONSE, %02x\n",
tag, *cp);
value = -EBADR;
goto done;
}
cmd->resp[0] = *cp++;
cmd->error = 0;
/* Status byte: the entire seven-bit R1 response. */
if (cmd->resp[0] != 0) {
if ((R1_SPI_PARAMETER | R1_SPI_ADDRESS
| R1_SPI_ILLEGAL_COMMAND)
& cmd->resp[0])
value = -EINVAL;
else if (R1_SPI_COM_CRC & cmd->resp[0])
value = -EILSEQ;
else if ((R1_SPI_ERASE_SEQ | R1_SPI_ERASE_RESET)
& cmd->resp[0])
value = -EIO;
/* else R1_SPI_IDLE, "it's resetting" */
}
switch (mmc_spi_resp_type(cmd)) {
/* SPI R1B == R1 + busy; STOP_TRANSMISSION (for multiblock reads)
* and less-common stuff like various erase operations.
*/
case MMC_RSP_SPI_R1B:
/* maybe we read all the busy tokens already */
while (cp < end && *cp == 0)
cp++;
if (cp == end)
mmc_spi_wait_unbusy(host, r1b_timeout);
break;
/* SPI R2 == R1 + second status byte; SEND_STATUS
* SPI R5 == R1 + data byte; IO_RW_DIRECT
*/
case MMC_RSP_SPI_R2:
cmd->resp[0] |= *cp << 8;
break;
/* SPI R3, R4, or R7 == R1 + 4 bytes */
case MMC_RSP_SPI_R3:
cmd->resp[1] = be32_to_cpu(get_unaligned((u32 *)cp));
break;
/* SPI R1 == just one status byte */
case MMC_RSP_SPI_R1:
break;
default:
dev_dbg(&host->spi->dev, "bad response type %04x\n",
mmc_spi_resp_type(cmd));
if (value >= 0)
value = -EINVAL;
goto done;
}
if (value < 0)
dev_dbg(&host->spi->dev, "%s: resp %04x %08x\n",
tag, cmd->resp[0], cmd->resp[1]);
/* disable chipselect on errors and some success cases */
if (value >= 0 && cs_on)
return value;
done:
if (value < 0)
cmd->error = value;
mmc_cs_off(host);
return value;
}