int esc_mods_find_pci_class_code(struct file *pfile, MODS_FIND_PCI_CLASS_CODE *p)
{
struct pci_dev *dev;
int index = 0;
mods_debug_printk(DEBUG_PCICFG, "find pci class code %04x, index %d\n",
(int) p->ClassCode, (int) p->Index);
dev = MODS_PCI_GET_CLASS(p->ClassCode, NULL);
while (dev)
{
if (index == p->Index)
{
p->BusNumber = MODS_PCI_BUS_NUMBER(dev);
p->DeviceNumber = MODS_PCI_SLOT_NUMBER(dev);
p->FunctionNumber = MODS_PCI_FUNCTION_NUMBER(dev);
//pci_dev_put(dev);
return OK;
}
dev = MODS_PCI_GET_CLASS(p->ClassCode, dev);
index++;
}
return -EINVAL;
}
int esc_mods_pci_read(struct file *pfile, MODS_PCI_READ *p)
{
struct pci_dev *dev;
unsigned int devfn;
devfn = PCI_DEVFN(p->DeviceNumber, p->FunctionNumber);
dev = MODS_PCI_GET_SLOT(p->BusNumber, devfn);
if (dev == NULL)
{
return -EINVAL;
}
mods_debug_printk(DEBUG_PCICFG, "pci read %x:%02x.%x, addr 0x%04x, size %d\n",
(int) p->BusNumber, (int) p->DeviceNumber,
(int) p->FunctionNumber, (int) p->Address, (int) p->DataSize);
p->Data = 0;
switch (p->DataSize)
{
case 1:
MODS_PCI_READ_CONFIG_BYTE(dev, p->Address, (u8 *) &p->Data);
break;
case 2:
MODS_PCI_READ_CONFIG_WORD(dev, p->Address, (u16 *) &p->Data);
break;
case 4:
MODS_PCI_READ_CONFIG_DWORD(dev, p->Address, (u32 *) &p->Data);
break;
default:
return -EINVAL;
}
return OK;
}
int esc_mods_find_pci_dev(struct file *pfile, MODS_FIND_PCI_DEVICE *p)
{
struct pci_dev *dev;
int index = 0;
mods_debug_printk(DEBUG_PCICFG, "find pci dev %04x:%04x, index %d\n",
(int) p->VendorId, (int) p->DeviceId, (int) p->Index);
dev = MODS_PCI_GET_DEVICE(p->VendorId, p->DeviceId, NULL);
while (dev)
{
if (index == p->Index)
{
p->BusNumber = MODS_PCI_BUS_NUMBER(dev);
p->DeviceNumber = MODS_PCI_SLOT_NUMBER(dev);
p->FunctionNumber = MODS_PCI_FUNCTION_NUMBER(dev);
//pci_dev_put(dev);
return OK;
}
dev = MODS_PCI_GET_DEVICE(p->VendorId, p->DeviceId, dev);
index++;
}
return -EINVAL;
}
int esc_mods_pci_write(struct file *pfile, MODS_PCI_WRITE *p)
{
struct pci_dev *dev;
unsigned int devfn;
mods_debug_printk(DEBUG_PCICFG, "pci write %x:%02x.%x, addr 0x%04x, size %d, data 0x%x\n",
(int) p->BusNumber, (int) p->DeviceNumber, (int) p->FunctionNumber,
(int) p->Address, (int) p->DataSize, (int) p->Data);
devfn = PCI_DEVFN(p->DeviceNumber, p->FunctionNumber);
dev = MODS_PCI_GET_SLOT(p->BusNumber, devfn);
if (dev == NULL)
{
mods_error_printk("pci write to %x:%02x.%x, addr 0x%04x, size %d failed\n",
(unsigned)p->BusNumber,
(unsigned)p->DeviceNumber,
(unsigned)p->FunctionNumber,
(unsigned)p->Address,
(int)p->DataSize);
return -EINVAL;
}
switch (p->DataSize)
{
case 1:
MODS_PCI_WRITE_CONFIG_BYTE(dev, p->Address, p->Data);
break;
case 2:
MODS_PCI_WRITE_CONFIG_WORD(dev, p->Address, p->Data);
break;
case 4:
MODS_PCI_WRITE_CONFIG_DWORD(dev, p->Address, p->Data);
break;
default:
return -EINVAL;
}
return OK;
}
static void mods_tegra_dc_set_windowattr_basic(struct tegra_dc_win *win,
const struct MODS_TEGRA_DC_WINDOW *mods_win)
{
win->global_alpha = 0;
win->z = 0;
win->stride = 0;
win->stride_uv = 0;
win->flags = TEGRA_WIN_FLAG_ENABLED;
if (mods_win->flags & MODS_TEGRA_DC_WINDOW_FLAG_TILED)
win->flags |= TEGRA_WIN_FLAG_TILED;
#if defined(CONFIG_TEGRA_DC_SCAN_COLUMN)
if (mods_win->flags & MODS_TEGRA_DC_WINDOW_FLAG_SCAN_COL)
win->flags |= TEGRA_WIN_FLAG_SCAN_COLUMN;
#endif
win->fmt = mods_win->pixformat;
win->x.full = mods_win->x;
win->y.full = mods_win->y;
win->w.full = mods_win->w;
win->h.full = mods_win->h;
/* XXX verify that this doesn't go outside display's active region */
win->out_x = mods_win->out_x;
win->out_y = mods_win->out_y;
win->out_w = mods_win->out_w;
win->out_h = mods_win->out_h;
mods_debug_printk(DEBUG_TEGRADC,
"mods_tegra_dc_set_windowattr_basic window %u:\n"
"\tflags : 0x%08x\n"
"\tfmt : %u\n"
"\tinput : (%u, %u, %u, %u)\n"
"\toutput: (%u, %u, %u, %u)\n",
win->idx, win->flags, win->fmt, dfixed_trunc(win->x),
dfixed_trunc(win->y), dfixed_trunc(win->w),
dfixed_trunc(win->h), win->out_x, win->out_y, win->out_w,
win->out_h);
}
/*********************
* MAPPING FUNCTIONS *
*********************/
static int mods_register_mapping(
struct file *fp,
struct SYS_MEM_MODS_INFO *p_mem_info,
NvU64 dma_addr,
NvU64 virtual_address,
NvU32 mapping_length)
{
struct SYS_MAP_MEMORY *p_map_mem;
MODS_PRIVATE_DATA(private_data, fp);
LOG_ENT();
mods_debug_printk(DEBUG_MEM_DETAILED,
"mapped dma 0x%llx, virt 0x%llx, size 0x%x\n",
dma_addr, virtual_address, mapping_length);
MODS_KMALLOC(p_map_mem, sizeof(*p_map_mem));
if (unlikely(!p_map_mem)) {
LOG_EXT();
return -ENOMEM;
}
memset(p_map_mem, 0, sizeof(*p_map_mem));
if (p_mem_info == NULL)
p_map_mem->contiguous = true;
else
p_map_mem->contiguous = false;
p_map_mem->dma_addr = dma_addr;
p_map_mem->virtual_addr = virtual_address;
p_map_mem->mapping_length = mapping_length;
p_map_mem->p_mem_info = p_mem_info;
list_add(&p_map_mem->list, private_data->mods_mapping_list);
LOG_EXT();
return OK;
}
int esc_mods_tegra_dc_config_possible(struct file *fp,
struct MODS_TEGRA_DC_CONFIG_POSSIBLE *args)
{
int i;
struct tegra_dc *dc = tegra_dc_get_dc(args->head);
struct tegra_dc_win *dc_wins[DC_N_WINDOWS];
#ifndef CONFIG_TEGRA_ISOMGR
struct clk *emc_clk = 0;
unsigned long max_bandwidth = 0;
unsigned long current_emc_freq = 0;
unsigned long max_available_bandwidth = 0;
#else
int ret = -EINVAL;
#endif
LOG_ENT();
BUG_ON(args->win_num > DC_N_WINDOWS);
if (!dc) {
LOG_EXT();
return -EINVAL;
}
for (i = 0; i < args->win_num; i++) {
int idx = args->windows[i].index;
if (args->windows[i].flags &
MODS_TEGRA_DC_WINDOW_FLAG_ENABLED) {
mods_tegra_dc_set_windowattr_basic(&dc->tmp_wins[idx],
&args->windows[i]);
} else {
dc->tmp_wins[idx].flags = 0;
}
dc_wins[i] = &dc->tmp_wins[idx];
mods_debug_printk(DEBUG_TEGRADC,
"esc_mods_tegra_dc_config_possible head %u, "
"using index %d for window %d\n",
args->head, i, idx);
}
mods_debug_printk(DEBUG_TEGRADC,
"esc_mods_tegra_dc_config_possible head %u, "
"dc->mode.pclk %u\n",
args->head, dc->mode.pclk);
#ifndef CONFIG_TEGRA_ISOMGR
max_bandwidth = tegra_dc_get_bandwidth(dc_wins, args->win_num);
emc_clk = clk_get_sys("tegra_emc", "emc");
if (IS_ERR(emc_clk)) {
mods_debug_printk(DEBUG_TEGRADC,
"esc_mods_tegra_dc_config_possible "
"invalid clock specified when fetching EMC clock\n");
} else {
current_emc_freq = clk_get_rate(emc_clk);
current_emc_freq /= 1000;
max_available_bandwidth =
8 * tegra_emc_freq_req_to_bw(current_emc_freq);
max_available_bandwidth = (max_available_bandwidth / 100) * 50;
}
mods_debug_printk(DEBUG_TEGRADC,
"esc_mods_tegra_dc_config_possible bandwidth needed = %lu,"
" bandwidth available = %lu\n",
max_bandwidth, max_available_bandwidth);
args->possible = (max_bandwidth <= max_available_bandwidth);
#else
ret = tegra_dc_bandwidth_negotiate_bw(dc, dc_wins, args->win_num);
args->possible = (ret == 0);
#endif
for (i = 0; i < args->win_num; i++) {
args->windows[i].bandwidth = dc_wins[i]->new_bandwidth;
mods_debug_printk(DEBUG_TEGRADC,
"esc_mods_tegra_dc_config_possible head %u, "
"window %d bandwidth %d\n",
args->head, dc_wins[i]->idx, dc_wins[i]->new_bandwidth);
}
LOG_EXT();
return 0;
}
