void __init setup_arch(char **cmdline_p)
{
extern void atlas_setup(void);
extern void decstation_setup(void);
extern void ip22_setup(void);
extern void ip27_setup(void);
extern void malta_setup(void);
extern void momenco_ocelot_setup(void);
extern void momenco_ocelot_g_setup(void);
extern void momenco_ocelot_c_setup(void);
extern void momenco_jaguar_atx_setup(void);
extern void sead_setup(void);
extern void swarm_setup(void);
extern void frame_info_init(void);
frame_info_init();
#ifdef CONFIG_MIPS_ATLAS
atlas_setup();
#endif
#ifdef CONFIG_DECSTATION
decstation_setup();
#endif
#ifdef CONFIG_PMC_YOSEMITE
pmc_yosemite_setup();
#endif
#ifdef CONFIG_SGI_IP22
ip22_setup();
#endif
#ifdef CONFIG_SGI_IP27
ip27_setup();
#endif
#ifdef CONFIG_SIBYTE_BOARD
swarm_setup();
#endif
#ifdef CONFIG_MIPS_MALTA
malta_setup();
#endif
#ifdef CONFIG_MIPS_SEAD
sead_setup();
#endif
#ifdef CONFIG_MOMENCO_OCELOT
momenco_ocelot_setup();
#endif
#ifdef CONFIG_MOMENCO_OCELOT_G
momenco_ocelot_g_setup();
#endif
#ifdef CONFIG_MOMENCO_OCELOT_C
momenco_ocelot_c_setup();
#endif
#ifdef CONFIG_MOMENCO_JAGUAR_ATX
momenco_jaguar_atx_setup();
#endif
strncpy(command_line, arcs_cmdline, CL_SIZE);
memcpy(saved_command_line, command_line, CL_SIZE);
saved_command_line[CL_SIZE-1] = '\0';
*cmdline_p = command_line;
parse_mem_cmdline();
bootmem_init();
paging_init();
resource_init();
}
void __init setup_arch(char **cmdline_p)
{
void atlas_setup(void);
void baget_setup(void);
void cobalt_setup(void);
void ddb_setup(void);
void decstation_setup(void);
void deskstation_setup(void);
void jazz_setup(void);
void sni_rm200_pci_setup(void);
void ip22_setup(void);
void ev96100_setup(void);
void malta_setup(void);
void ikos_setup(void);
void momenco_ocelot_setup(void);
void nino_setup(void);
void nec_osprey_setup(void);
void jmr3927_setup(void);
void it8172_setup(void);
void swarm_setup(void);
void hp_setup(void);
unsigned long bootmap_size;
unsigned long start_pfn, max_pfn, max_low_pfn, first_usable_pfn;
#ifdef CONFIG_BLK_DEV_INITRD
unsigned long tmp;
unsigned long* initrd_header;
#endif
int i;
#ifdef CONFIG_BLK_DEV_FD
fd_ops = &no_fd_ops;
#endif
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &no_ide_ops;
#endif
#ifdef CONFIG_PC_KEYB
kbd_ops = &no_kbd_ops;
#endif
rtc_ops = &no_rtc_ops;
switch(mips_machgroup)
{
#ifdef CONFIG_BAGET_MIPS
case MACH_GROUP_BAGET:
baget_setup();
break;
#endif
#ifdef CONFIG_MIPS_COBALT
case MACH_GROUP_COBALT:
cobalt_setup();
break;
#endif
#ifdef CONFIG_DECSTATION
case MACH_GROUP_DEC:
decstation_setup();
break;
#endif
#ifdef CONFIG_MIPS_ATLAS
case MACH_GROUP_UNKNOWN:
atlas_setup();
break;
#endif
#ifdef CONFIG_MIPS_JAZZ
case MACH_GROUP_JAZZ:
jazz_setup();
break;
#endif
#ifdef CONFIG_MIPS_MALTA
case MACH_GROUP_UNKNOWN:
malta_setup();
break;
#endif
#ifdef CONFIG_MOMENCO_OCELOT
case MACH_GROUP_MOMENCO:
momenco_ocelot_setup();
break;
#endif
#ifdef CONFIG_SGI_IP22
/* As of now this is only IP22. */
case MACH_GROUP_SGI:
ip22_setup();
break;
#endif
#ifdef CONFIG_SNI_RM200_PCI
case MACH_GROUP_SNI_RM:
sni_rm200_pci_setup();
break;
#endif
#ifdef CONFIG_DDB5074
case MACH_GROUP_NEC_DDB:
ddb_setup();
break;
#endif
#ifdef CONFIG_DDB5476
case MACH_GROUP_NEC_DDB:
ddb_setup();
break;
#endif
#ifdef CONFIG_DDB5477
case MACH_GROUP_NEC_DDB:
ddb_setup();
break;
#endif
#ifdef CONFIG_NEC_OSPREY
case MACH_GROUP_NEC_VR41XX:
nec_osprey_setup();
break;
#endif
#ifdef CONFIG_MIPS_EV96100
case MACH_GROUP_GALILEO:
ev96100_setup();
break;
#endif
#ifdef CONFIG_MIPS_EV64120
case MACH_GROUP_GALILEO:
ev64120_setup();
break;
#endif
#if defined(CONFIG_MIPS_IVR) || defined(CONFIG_MIPS_ITE8172)
case MACH_GROUP_ITE:
case MACH_GROUP_GLOBESPAN:
it8172_setup();
break;
#endif
#ifdef CONFIG_NINO
case MACH_GROUP_PHILIPS:
nino_setup();
break;
#endif
#ifdef CONFIG_MIPS_PB1000
case MACH_GROUP_ALCHEMY:
au1000_setup();
break;
#endif
#ifdef CONFIG_MIPS_PB1500
case MACH_GROUP_ALCHEMY:
au1500_setup();
break;
#endif
#ifdef CONFIG_TOSHIBA_JMR3927
case MACH_GROUP_TOSHIBA:
jmr3927_setup();
break;
#endif
#ifdef CONFIG_SIBYTE_SWARM
case MACH_GROUP_SIBYTE:
swarm_setup();
break;
#endif
#ifdef CONFIG_HP_LASERJET
case MACH_GROUP_HP_LJ:
hp_setup();
break;
#endif
default:
panic("Unsupported architecture");
}
strncpy(command_line, arcs_cmdline, sizeof command_line);
command_line[sizeof command_line - 1] = 0;
strcpy(saved_command_line, command_line);
*cmdline_p = command_line;
parse_mem_cmdline();
#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
#define PFN_PHYS(x) ((x) << PAGE_SHIFT)
#define MAXMEM HIGHMEM_START
#define MAXMEM_PFN PFN_DOWN(MAXMEM)
#ifdef CONFIG_BLK_DEV_INITRD
tmp = (((unsigned long)&_end + PAGE_SIZE-1) & PAGE_MASK) - 8;
if (tmp < (unsigned long)&_end)
tmp += PAGE_SIZE;
initrd_header = (unsigned long *)tmp;
if (initrd_header[0] == 0x494E5244) {
initrd_start = (unsigned long)&initrd_header[2];
initrd_end = initrd_start + initrd_header[1];
}
start_pfn = PFN_UP(__pa((&_end)+(initrd_end - initrd_start) + PAGE_SIZE));
#else
/*
* Partially used pages are not usable - thus
* we are rounding upwards.
*/
start_pfn = PFN_UP(__pa(&_end));
#endif /* CONFIG_BLK_DEV_INITRD */
/* Find the highest page frame number we have available. */
max_pfn = 0;
first_usable_pfn = -1UL;
for (i = 0; i < boot_mem_map.nr_map; i++) {
unsigned long start, end;
if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
continue;
start = PFN_UP(boot_mem_map.map[i].addr);
end = PFN_DOWN(boot_mem_map.map[i].addr
+ boot_mem_map.map[i].size);
if (start >= end)
continue;
if (end > max_pfn)
max_pfn = end;
if (start < first_usable_pfn) {
if (start > start_pfn) {
first_usable_pfn = start;
} else if (end > start_pfn) {
first_usable_pfn = start_pfn;
}
}
}
/*
* Determine low and high memory ranges
*/
max_low_pfn = max_pfn;
if (max_low_pfn > MAXMEM_PFN) {
max_low_pfn = MAXMEM_PFN;
#ifndef CONFIG_HIGHMEM
/* Maximum memory usable is what is directly addressable */
printk(KERN_WARNING "Warning only %ldMB will be used.\n",
MAXMEM>>20);
printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
#endif
}
