void gendmtc1(void) { #ifdef INTERPRET_DMTC1 gencallinterp((unsigned int)DMTC1, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned int*)dst->f.r.rt); mov_reg32_m32(EBX, ((unsigned int*)dst->f.r.rt)+1); mov_reg32_m32(EDX, (unsigned int*)(®_cop1_double[dst->f.r.nrd])); mov_preg32_reg32(EDX, EAX); mov_preg32pimm32_reg32(EDX, 4, EBX); #endif }
void genmov_d(usf_state_t * state) { #ifdef INTERPRET_MOV_D gencallinterp(state, (unsigned int)state->current_instruction_table.MOV_D, 0); #else gencheck_cop1_unusable(state); mov_eax_memoffs32(state, (unsigned int *)(&state->reg_cop1_double[state->dst->f.cf.fs])); mov_reg32_preg32(state, EBX, EAX); mov_reg32_preg32pimm32(state, ECX, EAX, 4); mov_eax_memoffs32(state, (unsigned int *)(&state->reg_cop1_double[state->dst->f.cf.fd])); mov_preg32_reg32(state, EAX, EBX); mov_preg32pimm32_reg32(state, EAX, 4, ECX); #endif }
void genmov_d() { #ifdef INTERPRET_MOV_D gencallinterp((unsigned long)MOV_D, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned long *)(®_cop1_double[dst->f.cf.fs])); mov_reg32_preg32(EBX, EAX); mov_reg32_preg32pimm32(ECX, EAX, 4); mov_eax_memoffs32((unsigned long *)(®_cop1_double[dst->f.cf.fd])); mov_preg32_reg32(EAX, EBX); mov_preg32pimm32_reg32(EAX, 4, ECX); #endif }
void gendmtc1(void) { #ifdef INTERPRET_DMTC1 gencallinterp((native_type)cached_interpreter_table.DMTC1, 0); #else gencheck_cop1_unusable(); #ifdef __x86_64__ mov_xreg32_m32rel(EAX, (unsigned int*)dst->f.r.rt); mov_xreg32_m32rel(EBX, ((unsigned int*)dst->f.r.rt)+1); mov_xreg64_m64rel(RDX, (unsigned long long *)(®_cop1_double[dst->f.r.nrd])); mov_preg64_reg32(RDX, EAX); mov_preg64pimm32_reg32(RDX, 4, EBX); #else mov_eax_memoffs32((unsigned int*)dst->f.r.rt); mov_reg32_m32(EBX, ((unsigned int*)dst->f.r.rt)+1); mov_reg32_m32(EDX, (unsigned int*)(®_cop1_double[dst->f.r.nrd])); mov_preg32_reg32(EDX, EAX); mov_preg32pimm32_reg32(EDX, 4, EBX); #endif #endif }