/**************************************************************************************************
* @fn MRFI_WakeUp
*
* @brief Wake up radio from sleep state.
*
* @param none
*
* @return none
**************************************************************************************************
*/
void MRFI_WakeUp(void)
{
/* if radio is already awake, just ignore wakeup request */
if (!mrfiRadioIsSleeping)
{
return;
}
/* drive CSn low to initiate wakeup */
MRFI_SPI_DRIVE_CSN_LOW();
/* wait for MISO to go high indicating the oscillator is stable */
while (MRFI_SPI_SO_IS_HIGH());
/* wakeup is complete, drive CSn high and continue */
MRFI_SPI_DRIVE_CSN_HIGH();
/*
* The test registers must be restored after sleep for the CC1100 and CC2500 radios.
* This is not required for the CC1101 radio.
*/
#ifndef MRFI_CC1101
mrfiSpiWriteReg( MRFI_CC2500_SPI_REG_TEST2, SMARTRF_SETTING_TEST2 );
mrfiSpiWriteReg( MRFI_CC2500_SPI_REG_TEST1, SMARTRF_SETTING_TEST1 );
mrfiSpiWriteReg( MRFI_CC2500_SPI_REG_TEST0, SMARTRF_SETTING_TEST0 );
#endif
/* clear any residual SYNC pin interrupt and then re-enable SYNC pin interrupts */
MRFI_CLEAR_SYNC_PIN_INT_FLAG();
MRFI_ENABLE_SYNC_PIN_INT();
/* clear sleep flag and enter receive mode */
mrfiRadioIsSleeping = 0;
mrfiSpiCmdStrobe(MRFI_CC2500_SPI_STROBE_SRX);
}
/**************************************************************************************************
* @fn MRFI_SetLogicalChannel
*
* @brief Set logical channel.
*
* @param chan - logical channel number
*
* @return none
**************************************************************************************************
*/
void MRFI_SetLogicalChannel(uint8_t chan)
{
uint8_t phyChannel;
/* logical channel is not valid */
MRFI_ASSERT( chan < MRFI_NUM_LOGICAL_CHANS );
/* make sure radio is off before changing channels */
Mrfi_RxModeOff();
/* convert logical channel number into physical channel number */
phyChannel = mrfiLogicalChanTable[chan];
/* write frequency value of new channel */
mrfiSpiWriteReg(FREQCTRL, (FREQCTRL_BASE_VALUE + (FREQCTRL_FREQ_2405MHZ + 5 * ((phyChannel) - 11))));
/* remember this. need it when waking up. */
mrfiCurrentLogicalChannel = chan;
/* Put the radio back in RX state, if it was in RX before channel change */
if(mrfiRadioState == MRFI_RADIO_STATE_RX)
{
Mrfi_RxModeOn();
}
}
/**************************************************************************************************
* @fn MRFI_DisableRxAddrFilter
*
* @brief Disable received packet filtering.
*
* @param none
*
* @return none
**************************************************************************************************
*/
void MRFI_DisableRxAddrFilter(void)
{
/* clear flag that indicates filtering is enabled */
mrfiRxFilterEnabled = 0;
/* disable hardware filtering on the radio */
mrfiSpiWriteReg( MRFI_CC2500_SPI_REG_PKTCTRL1, MRFI_SETTING_PKTCTRL1_ADDR_FILTER_OFF );
}
/**************************************************************************************************
* @fn MRFI_EnableRxAddrFilter
*
* @brief Enable received packet filtering.
*
* @param none
*
* @return none
**************************************************************************************************
*/
void MRFI_EnableRxAddrFilter(void)
{
/* set flag to indicate filtering is enabled */
mrfiRxFilterEnabled = 1;
/* enable hardware filtering on the radio */
mrfiSpiWriteReg( MRFI_CC2500_SPI_REG_PKTCTRL1, MRFI_SETTING_PKTCTRL1_ADDR_FILTER_ON );
}
int main(void)
{
BSP_Init();
P2DIR |= 0x04;
MRFI_Init();
//mrfiSpiWriteReg(PATABLE,0x50);// -30dBm Tx power
//mrfiSpiWriteReg(PATABLE,0x84);// -24dBm Tx power
//mrfiSpiWriteReg(PATABLE,0x46);// -20dBm Tx power
//mrfiSpiWriteReg(PATABLE,0x55);// -16dBm Tx power
//mrfiSpiWriteReg(PATABLE,0x8D);// -14dBm Tx power
//mrfiSpiWriteReg(PATABLE,0xC6);// -12dBm Tx power
//mrfiSpiWriteReg(PATABLE,0x97);// -10dBm Tx power
//mrfiSpiWriteReg(PATABLE,0x6E);// -8 dBm Tx power
//mrfiSpiWriteReg(PATABLE,0x7F);// -6 dBm Tx power
//mrfiSpiWriteReg(PATABLE,0xA9);// -4 dBm Tx power
//mrfiSpiWriteReg(PATABLE,0xBB);// -2 dBm Tx power
mrfiSpiWriteReg(PATABLE,0xFE);// 0dBm Tx power
mrfiSpiWriteReg(MDMCFG1,0x23);
mrfiSpiWriteReg(MDMCFG0,0xF8);// 400kHz channel spacing
mrfiSpiWriteReg(FREQ2,0x5C);
mrfiSpiWriteReg(FREQ1,0x80);
mrfiSpiWriteReg(FREQ0,0x00); // 2.405GHz base frequency
mrfiSpiWriteReg(CHANNR,0xBC); // channel 26
MRFI_WakeUp();
MRFI_RxOn();
__bis_SR_register(GIE+LPM3_bits);
}
//=============================================
void gradient_Init(uint8_t is_sink)
{
P1OUT &= ~0x03;
print_debug("\r\nRESTART",9);
//serial communication
P3SEL |= 0x30; // P3.4,5 = USCI_A0 TXD/RXD
UCA0CTL1 = UCSSEL_2; // SMCLK
UCA0BR0 = 0x41; // 9600 from 8Mhz
UCA0BR1 = 0x3;
UCA0MCTL = UCBRS_2;
UCA0CTL1 &= ~UCSWRST; // Initialize USCI state machine
IE2 |= UCA0RXIE; // Enable USCI_A0 RX interrupt
__enable_interrupt();
//button
P1DIR &= ~0x04; // P1.3 input
P1OUT = 0x04;
P1REN |= 0x04; // P1.3 pullup
P1IE |= 0x04; // P1.3 interrupt enabled
P1IES |= 0x04; // P1.3 Hi/lo edge
P1IFG &= ~0x04; // P1.3 IFG cleared
//extension pins used for debugging
P4SEL &= ~0x20; // P4.5 generic I/O pin
P2DIR |= 0x02; // P2.1 output @ extension pin P4
P2DIR |= 0x08; // P2.3 output @ extension pin P6
P4DIR |= 0x08; // P4.3 output @ extension pin P8
P4DIR |= 0x20; // P4.5 output @ extension pin P10
//set myAddr
if(Flash_Addr == 0xFF) // no address set before
{
myAddr = MRFI_RandomByte();
FCTL2 = FWKEY + FSSEL0 + FN1; // MCLK/3 for Flash Timing Generator
FCTL3 = FWKEY + LOCKA; // Clear LOCK & LOCKA bits
FCTL1 = FWKEY + WRT; // Set WRT bit for write operation
Flash_Addr = myAddr;
FCTL1 = FWKEY; // Clear WRT bit
FCTL3 = FWKEY + LOCKA + LOCK; // Set LOCK & LOCKA bit
} else {
myAddr=Flash_Addr;
}
//set height and start clock
if (is_sink) {
myHeight = 0;
BSP_TOGGLE_LED1();
} else {
myHeight = 255;
//timer A
BCSCTL3 |= LFXT1S_2; // LFXT1 = VLO
TACCTL0 = CCIE; // TACCR0 interrupt enabled
TACCR0 = 1500*WAKEUP_PERIOD_S_FIXED; // 1500=1 second
TACTL = TASSEL_1 + MC_1 + ID_3; // ACLK/8, upmode
}
gradient_set_state(GRADIENT_IDLE);
mrfiSpiWriteReg(PATABLE, TX_POWER);
print_cc2500_registers();
MRFI_WakeUp();
wor_start(IS_SINK_NODE);
}
/**************************************************************************************************
* @fn MRFI_SetRxAddrFilter
*
* @brief Set the address used for filtering received packets.
*
* @param pAddr - pointer to address to use for filtering
*
* @return none
**************************************************************************************************
*/
void MRFI_SetRxAddrFilter(uint8_t * pAddr)
{
/*
* Set the hardware address register. The hardware address filtering only recognizes
* a single byte but this does provide at least some automatic hardware filtering.
*/
mrfiSpiWriteReg( MRFI_CC2500_SPI_REG_ADDR, pAddr[0] );
/* save a copy of the filter address */
memcpy(&mrfiRxFilterAddr[0], pAddr, MRFI_ADDR_SIZE);
}
void ReadChannelsAndSendRSSI()
{
uint8_t channel;
int8_t rssi;
for (channel=0;channel<255;channel++)
{
MRFI_RxIdle();
mrfiSpiWriteReg(CHANNR,channel);
MRFI_RxOn();
rssi=MRFI_Rssi();
print_rssi(rssi);
}
}
__interrupt void Timer_A (void)
{
P2OUT |= 0x04;
uint16_t i;
/* stop timer */
TACTL=MC_0;
TACCTL0=0;
/* send probe packet */
for (i=0;i<1000;i++) {
P1OUT |= 0x01;
packet.frame[0]=8+20;
MRFI_Transmit(&packet, MRFI_TX_TYPE_FORCED);
P1OUT &= ~0x01;
}
/* return to Rx mode on channel 26 */
MRFI_RxIdle();
mrfiSpiWriteReg(CHANNR,0xBC); // channel 26
MRFI_RxOn();
P2OUT &= ~0x04;
}
/**************************************************************************************************
* @fn MRFI_SetRFPwr
*
* @brief Set RF power level.
*
* @param idx - index into power level table
*
* @return none
**************************************************************************************************
*/
void MRFI_SetRFPwr(uint8_t idx)
{
/* is power level specified valid? */
MRFI_ASSERT( idx < MRFI_NUM_POWER_SETTINGS );
/* make sure radio is off before changing power level */
Mrfi_RxModeOff();
/* write value of new power level */
mrfiSpiWriteReg(TXPOWER, mrfiRFPowerTable[idx]);
/* remember this. need it when waking up. */
mrfiCurrentPowerLevel = idx;
/* Put the radio back in RX state, if it was in RX before change */
if(mrfiRadioState == MRFI_RADIO_STATE_RX)
{
Mrfi_RxModeOn();
}
}
void MRFI_RxCompleteISR()
{
P1OUT |= 0x02;
P2OUT |= 0x04;
uint8_t erase_me=0;
uint8_t channel;
MRFI_Receive(&packet);
channel = (uint8_t)((packet.frame[9]-'0')*10+(packet.frame[10]-'0'));
erase_me++;
if (channel>=11 && channel<=26) {
/* set timer */
BCSCTL3 |= LFXT1S_2;
TACCR0=1000; //~.1sec
TACTL=TASSEL_1+MC_1;
TACCTL0=CCIE;
/* set frequency */
MRFI_RxIdle();
switch(channel) {
case 11: mrfiSpiWriteReg(CHANNR,0x00); break;
case 12: mrfiSpiWriteReg(CHANNR,0x0D); break;
case 13: mrfiSpiWriteReg(CHANNR,0x19); break;
case 14: mrfiSpiWriteReg(CHANNR,0x26); break;
case 15: mrfiSpiWriteReg(CHANNR,0x32); break;
case 16: mrfiSpiWriteReg(CHANNR,0x3F); break;
case 17: mrfiSpiWriteReg(CHANNR,0x4B); break;
case 18: mrfiSpiWriteReg(CHANNR,0x58); break;
case 19: mrfiSpiWriteReg(CHANNR,0x64); break;
case 20: mrfiSpiWriteReg(CHANNR,0x71); break;
case 21: mrfiSpiWriteReg(CHANNR,0x7D); break;
case 22: mrfiSpiWriteReg(CHANNR,0x8A); break;
case 23: mrfiSpiWriteReg(CHANNR,0x96); break;
case 24: mrfiSpiWriteReg(CHANNR,0xA3); break;
case 25: mrfiSpiWriteReg(CHANNR,0xAF); break;
case 26: mrfiSpiWriteReg(CHANNR,0xBC); break;
}
}
P2OUT &= ~0x04;
P1OUT &= ~0x02;
}
void SetBaseFrequencyRegisters(uint8_t range)
{
MRFI_RxIdle();
//if Channel spacing = 25.390625 (min)
switch(range)
{
// 2399.999634
case 1:
mrfiSpiWriteReg(FREQ0,0xC4);
mrfiSpiWriteReg(FREQ1,0x4E);
mrfiSpiWriteReg(FREQ2,0x5C);
break;
//needed 2406.474243
//seted 2406.473846
case 2:
mrfiSpiWriteReg(FREQ0,0x83);
mrfiSpiWriteReg(FREQ1,0x8E);
mrfiSpiWriteReg(FREQ2,0x5C);
break;
//needed 2412.948456
//seted 2412.948456
case 3:
mrfiSpiWriteReg(FREQ0,0x43);
mrfiSpiWriteReg(FREQ1,0xCE);
mrfiSpiWriteReg(FREQ2,0x5C);
break;
//needed 2419.423065
//seted 2419.423065
case 4:
mrfiSpiWriteReg(FREQ0,0x03);
mrfiSpiWriteReg(FREQ1,0x0E);
mrfiSpiWriteReg(FREQ2,0x5D);
break;
//needed 2425.897675
//seted 2425.897675
case 5:
mrfiSpiWriteReg(FREQ0,0xC3);
mrfiSpiWriteReg(FREQ1,0x4D);
mrfiSpiWriteReg(FREQ2,0x5D);
break;
//needed 2432.372284
//seted 2432.372284
case 6:
mrfiSpiWriteReg(FREQ0,0x83);
mrfiSpiWriteReg(FREQ1,0x8D);
mrfiSpiWriteReg(FREQ2,0x5D);
break;
//needed 2438.846893
//seted 2438.846893
case 7:
mrfiSpiWriteReg(FREQ0,0x43);
mrfiSpiWriteReg(FREQ1,0xCD);
mrfiSpiWriteReg(FREQ2,0x5D);
break;
//needed 2445.321503
//seted 2445.321503
case 8:
mrfiSpiWriteReg(FREQ0,0x03);
mrfiSpiWriteReg(FREQ1,0x0D);
mrfiSpiWriteReg(FREQ2,0x5E);
break;
//needed 2451.796112
//seted 2451.796112
case 9:
mrfiSpiWriteReg(FREQ0,0xC3);
mrfiSpiWriteReg(FREQ1,0x4C);
mrfiSpiWriteReg(FREQ2,0x5E);
break;
//needed 2458.270721
//seted 2458.270721
case 10:
mrfiSpiWriteReg(FREQ0,0x83);
mrfiSpiWriteReg(FREQ1,0x8C);
mrfiSpiWriteReg(FREQ2,0x5E);
break;
//needed 2464.745331
//seted 2464.745331
case 11:
mrfiSpiWriteReg(FREQ0,0x43);
mrfiSpiWriteReg(FREQ1,0xCC);
mrfiSpiWriteReg(FREQ2,0x5E);
break;
//needed 2471.219940
//seted 2471.219940
case 12:
mrfiSpiWriteReg(FREQ0,0x03);
mrfiSpiWriteReg(FREQ1,0x0C);
mrfiSpiWriteReg(FREQ2,0x5F);
break;
//needed 2477.694550
//seted 2477.694550
//with chanell 228 carrier freq = 2483.483612 (max)
case 13:
mrfiSpiWriteReg(FREQ0,0xC3);
mrfiSpiWriteReg(FREQ1,0x4B);
mrfiSpiWriteReg(FREQ2,0x5F);
break;
// 2399.999634
default:
mrfiSpiWriteReg(FREQ0,0xC4);
mrfiSpiWriteReg(FREQ1,0x4E);
mrfiSpiWriteReg(FREQ2,0x5C);
break;
}
}
void SetBaseFrequencyRegisters(uint8_t range)
{
MRFI_RxIdle();
//if Channel spacing = 25.390625 (min)
switch(range)
{
// 2399.999634
case 1:
mrfiSpiWriteReg(FREQ0,0xC4);
mrfiSpiWriteReg(FREQ1,0x4E);
mrfiSpiWriteReg(FREQ2,0x5C);
break;
//needed 2406.474243
//seted 2406.473846
case 2:
mrfiSpiWriteReg(FREQ0,0x83);
mrfiSpiWriteReg(FREQ1,0x8E);
mrfiSpiWriteReg(FREQ2,0x5C);
break;
//needed 2412.948456
//seted 2412.948456
case 3:
mrfiSpiWriteReg(FREQ0,0x43);
mrfiSpiWriteReg(FREQ1,0xCE);
mrfiSpiWriteReg(FREQ2,0x5C);
break;
//needed 2419.423065
//seted 2419.423065
case 4:
mrfiSpiWriteReg(FREQ0,0x03);
mrfiSpiWriteReg(FREQ1,0x0E);
mrfiSpiWriteReg(FREQ2,0x5D);
break;
//needed 2425.897675
//seted 2425.897675
case 5:
mrfiSpiWriteReg(FREQ0,0xC3);
mrfiSpiWriteReg(FREQ1,0x4D);
mrfiSpiWriteReg(FREQ2,0x5D);
break;
//needed 2432.372284
//seted 2432.372284
case 6:
mrfiSpiWriteReg(FREQ0,0x83);
mrfiSpiWriteReg(FREQ1,0x8D);
mrfiSpiWriteReg(FREQ2,0x5D);
break;
//needed 2438.846893
//seted 2438.846893
case 7:
mrfiSpiWriteReg(FREQ0,0x43);
mrfiSpiWriteReg(FREQ1,0xCD);
mrfiSpiWriteReg(FREQ2,0x5D);
break;
//needed 2445.321503
//seted 2445.321503
case 8:
mrfiSpiWriteReg(FREQ0,0x03);
mrfiSpiWriteReg(FREQ1,0x0D);
mrfiSpiWriteReg(FREQ2,0x5E);
break;
// 2399.999634
default:
mrfiSpiWriteReg(FREQ0,0xC4);
mrfiSpiWriteReg(FREQ1,0x4E);
mrfiSpiWriteReg(FREQ2,0x5C);
break;
}
}
/**************************************************************************************************
* @fn MRFI_WakeUp
*
* @brief Wake up radio from off/sleep state.
*
* @param none
*
* @return none
**************************************************************************************************
*/
void MRFI_WakeUp(void)
{
/* if radio is asleep, wake it up */
if(mrfiRadioState == MRFI_RADIO_STATE_OFF)
{
/* enter idle mode */
mrfiRadioState = MRFI_RADIO_STATE_IDLE;
/* turn on radio power */
Mrfi_TurnOnRadioPower();
/* Configure the radio registers. All radio settings that are lost
* on MRFI_Sleep() call must be restored here. Since we are putting the
* radio in LPM2 power mode, all register and memory values that are
* different from reset must be restored.
*/
MRFI_BOARD_CONFIG_RADIO_GPIO();
#ifdef MRFI_PA_LNA_ENABLED
/* Init ports */
MRFI_BOARD_PA_LNA_CONFIG_PORTS();
if(mrfiLnaHighGainMode)
{
/* Set LNA to High Gain Mode */
MRFI_BOARD_PA_LNA_HGM();
}
else
{
/* Set LNA to Low Gain Mode */
MRFI_BOARD_PA_LNA_LGM();
}
#endif
/* Set FIFO_P threshold to max (127). Thus a FIFO_P signal is set whenever
* a full frame is received.
*/
mrfiSpiWriteReg(FIFOPCTRL, 0x7F);
/* Accept only DATA frames. Reject CMD/BECAON/ACK frames. */
mrfiSpiWriteReg(FRMFILT1, 0x10);
/* Restore the address filter settings */
if(mrfiAddrFilterStatus & MRFI_FILTER_ADDRESS_SET)
{
MRFI_SetRxAddrFilter(mrfiFilterAddr);
}
if(mrfiAddrFilterStatus & MRFI_FILTER_ADDRESS_ENABLED)
{
MRFI_EnableRxAddrFilter();
}
else
{
MRFI_DisableRxAddrFilter();
}
/* Following values need to be changed from their reset value.
* See Table-21 CC2520 datasheet.
*/
#ifdef MRFI_PA_LNA_ENABLED
/* This value is not in datasheet yet. */
mrfiSpiWriteReg(TXPOWER, 0xE1);
#else
mrfiSpiWriteReg(TXPOWER, 0x32);
#endif
mrfiSpiWriteReg(CCACTRL0, 0xF8);
mrfiSpiWriteReg(MDMCTRL0, 0x85);
mrfiSpiWriteReg(MDMCTRL1, 0x14);
mrfiSpiWriteReg(RXCTRL, 0x3F);
mrfiSpiWriteReg(FSCTRL, 0x5A);
mrfiSpiWriteReg(FSCAL1, 0x2B);
mrfiSpiWriteReg(AGCCTRL1, 0x11);
mrfiSpiWriteReg(ADCTEST0, 0x10);
mrfiSpiWriteReg(ADCTEST1, 0x0E);
mrfiSpiWriteReg(ADCTEST2, 0x03);
/* set default channel */
MRFI_SetLogicalChannel(mrfiCurrentLogicalChannel);
}
}
/**************************************************************************************************
* @fn MRFI_Init
*
* @brief Initialize MRFI.
*
* @param none
*
* @return none
**************************************************************************************************
*/
void MRFI_Init(void)
{
/* Configure Output lines */
MRFI_CONFIG_RESETN_PIN_AS_OUTPUT();
MRFI_CONFIG_VREG_EN_PIN_AS_OUTPUT();
/* Configure Input lines */
MRFI_CONFIG_TX_FRAME_DONE_AS_INPUT();
MRFI_CONFIG_FIFO_AS_INPUT();
MRFI_CONFIG_FIFOP_AS_INPUT();
/* Initialize SPI */
mrfiSpiInit();
/* Power up the radio chip */
Mrfi_TurnOnRadioPower();
/* Confirm that we are talking to the right hardware */
MRFI_ASSERT(mrfiSpiReadReg(CHIPID) == MRFI_RADIO_PARTNUM);
/* Random Number Generator:
* The seed value for the randon number generator logic
* is derived from the radio.
*/
/* Set radio in rx mode, but with symbol search disabled. Used for RSSI
* measurments or when we don't care about the received frames.
*/
mrfiSpiWriteReg(FRMCTRL0, FRMCTRL0_RESET_VALUE | RX_MODE_RSSI_ONLY);
/* Turn on the receiver */
mrfiSpiCmdStrobe(SRXON);
/*
* Wait for RSSI to be valid. RANDOM command strobe can be used
* to generate random number only after this.
*/
MRFI_RSSI_VALID_WAIT();
/* Get random byte from the radio */
mrfiRndSeed = mrfiSpiRandomByte();
/*
* The seed value must not be zero. If it is, the pseudo random sequence
* will be always be zero. There is an extremely small chance this seed could
* randomly be zero (more likely some type of hardware problem would cause
* this). If it is zero, initialize it to something.
*/
if(mrfiRndSeed == 0)
{
mrfiRndSeed = 0x80;
}
/* Random number initialization is done. Turn the radio off */
Mrfi_TurnOffRadioPower();
/* Initial radio state is - OFF state */
mrfiRadioState = MRFI_RADIO_STATE_OFF;
/**********************************************************************************
* Compute reply delay scalar
*
* The IEEE radio has a fixed data rate of 250 Kbps. Data rate inference
* from radio regsiters is not necessary for this radio.
*
* The maximum delay needed depends on the MAX_APP_PAYLOAD parameter. Figure
* out how many bits that will be when overhead is included. Bits/bits-per-second
* is seconds to transmit (or receive) the maximum frame. We multiply this number
* by 1000 to find the time in milliseconds. We then additionally multiply by
* 10 so we can add 5 and divide by 10 later, thus rounding up to the number of
* milliseconds. This last won't matter for slow transmissions but for faster ones
* we want to err on the side of being conservative and making sure the radio is on
* to receive the reply. The semaphore monitor will shut it down. The delay adds in
* a fudge factor that includes processing time on peer plus lags in Rx and processing
* time on receiver's side.
*
* **********************************************************************************
*/
#define PLATFORM_FACTOR_CONSTANT 2
#define PHY_PREAMBLE_SYNC_BYTES 8
{
uint32_t bits, dataRate = 250000;
bits = ((uint32_t)((PHY_PREAMBLE_SYNC_BYTES + MRFI_MAX_FRAME_SIZE)*8))*10000;
/* processing on the peer + the Tx/Rx time plus more */
sReplyDelayScalar = PLATFORM_FACTOR_CONSTANT + (((bits/dataRate)+5)/10);
}
/* Random delay: This prevents devices on the same power source from repeated
* transmit collisions on power up.
*/
Mrfi_RandomBackoffDelay();
BSP_ENABLE_INTERRUPTS();
}
/**************************************************************************************************
* @fn MRFI_Init
*
* @brief Initialize MRFI.
*
* @param none
*
* @return none
**************************************************************************************************
*/
void MRFI_Init(void)
{
/* ------------------------------------------------------------------
* Initialization
* -----------------
*/
/* initialize radio state variables */
mrfiRxFilterEnabled = 0;
mrfiRadioIsSleeping = 0;
mrfiTxActive = 0;
mrfiRxActive = 0;
/* initialize GPIO pins */
MRFI_CONFIG_GDO0_PIN_AS_INPUT();
MRFI_CONFIG_GDO2_PIN_AS_INPUT();
/* initialize SPI */
mrfiSpiInit();
/* ------------------------------------------------------------------
* Radio power-up reset
* ----------------------
*/
MRFI_ASSERT(MRFI_SPI_CSN_IS_HIGH());
/* pulse CSn low then high */
MRFI_SPI_DRIVE_CSN_LOW();
MRFI_DELAY(10);
MRFI_SPI_DRIVE_CSN_HIGH();
/* hold CSn high for at least 40 microseconds */
MRFI_DELAY(100);
/* pull CSn low and wait for SO to go low */
MRFI_SPI_DRIVE_CSN_LOW();
while (MRFI_SPI_SO_IS_HIGH());
/* directly send strobe command - cannot use function as it affects CSn pin */
MRFI_SPI_WRITE_BYTE(MRFI_CC2500_SPI_STROBE_SRES);
MRFI_SPI_WAIT_DONE();
/* wait for SO to go low again, reset is complete at that point */
while (MRFI_SPI_SO_IS_HIGH());
/* return CSn pin to its default high level */
MRFI_SPI_DRIVE_CSN_HIGH();
/* ------------------------------------------------------------------
* Run-time integrity checks
* ---------------------------
*/
/* verify that SPI is working */
#ifdef MRFI_ASSERTS_ARE_ON
#define TEST_VALUE 0xA5
mrfiSpiWriteReg( MRFI_CC2500_SPI_REG_PKTLEN, TEST_VALUE );
MRFI_ASSERT( mrfiSpiReadReg( MRFI_CC2500_SPI_REG_PKTLEN ) == TEST_VALUE ); /* SPI is not responding */
#endif
/* verify the correct radio is installed */
MRFI_ASSERT( mrfiSpiReadReg( MRFI_CC2500_SPI_REG_PARTNUM ) == MRFI_RADIO_PARTNUM); /* incorrect radio specified */
MRFI_ASSERT( mrfiSpiReadReg( MRFI_CC2500_SPI_REG_VERSION ) >= MRFI_RADIO_MIN_VERSION); /* obsolete radio specified */
/* ------------------------------------------------------------------
* Configure radio
* -----------------
*/
/* initialize radio registers */
{
uint8_t i;
for (i=0; i<(sizeof(mrfiRadioCfg)/sizeof(mrfiRadioCfg[0])); i++)
{
mrfiSpiWriteReg(mrfiRadioCfg[i][0], mrfiRadioCfg[i][1]);
}
}
/* send strobe to turn on receiver */
mrfiSpiCmdStrobe(MRFI_CC2500_SPI_STROBE_SRX);
/* ------------------------------------------------------------------
* Configure interrupts
* ----------------------
*/
/*
* Configure and enable the SYNC signal interrupt.
*
* This interrupt is used to indicate receive. The SYNC signal goes
* high when a receive OR a transmit begins. It goes high once the
* sync word is received or transmitted and then goes low again once
* the packet completes.
*/
MRFI_CONFIG_SYNC_PIN_FALLING_EDGE_INT();
MRFI_CLEAR_SYNC_PIN_INT_FLAG();
MRFI_ENABLE_SYNC_PIN_INT();
/* configure PA_PD signal interrupt */
MRFI_CONFIG_PAPD_FALLING_EDGE_INT();
/* enable global interrupts */
BSP_ENABLE_INTERRUPTS();
}
