Exemple #1
0
void msm_camio_camif_pad_reg_reset(void)
{
	uint32_t reg;
	uint32_t mask, value;

	/* select CLKRGM_VFE_SRC_CAM_VFE_SRC:  internal source */
	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL);

	reg = (readl(mdcbase)) & CAMIF_CFG_RMSK;

	mask = CAM_SEL_BMSK | CAM_PCLK_SRC_SEL_BMSK | CAM_PCLK_INVERT_BMSK;

	value = 1 << CAM_SEL_SHFT |
	    3 << CAM_PCLK_SRC_SEL_SHFT | 0 << CAM_PCLK_INVERT_SHFT;

	writel((reg & (~mask)) | (value & mask), mdcbase);
	mdelay(10);

	reg = (readl(mdcbase)) & CAMIF_CFG_RMSK;
	mask = CAM_PAD_REG_SW_RESET_BMSK;
	value = 1 << CAM_PAD_REG_SW_RESET_SHFT;
	writel((reg & (~mask)) | (value & mask), mdcbase);
	mdelay(10);

	reg = (readl(mdcbase)) & CAMIF_CFG_RMSK;
	mask = CAM_PAD_REG_SW_RESET_BMSK;
	value = 0 << CAM_PAD_REG_SW_RESET_SHFT;
	writel((reg & (~mask)) | (value & mask), mdcbase);
	mdelay(10);

	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_EXTERNAL);
	mdelay(10);
}
void msm_camio_disable(struct platform_device *pdev)
{
	struct msm_camera_sensor_info *sinfo = pdev->dev.platform_data;
	struct msm_camera_device_platform_data *camdev = sinfo->pdata;

	iounmap(mdcbase);
	release_mem_region(camio_ext.mdcphy, camio_ext.mdcsz);
	iounmap(appbase);
	release_mem_region(camio_ext.appphy, camio_ext.appsz);


        gpio_set_value(0, 0);//RESET    
        //gpio_set_value(1, 0);//STBY DOWN

	camdev->camera_gpio_off();

#if 1//PCAM temp
	printk("<=PCAM=> test code clk~~~~~~~~~\n");
	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL);
#endif//PCAM

	msm_camio_clk_disable(CAMIO_VFE_CLK);
	msm_camio_clk_disable(CAMIO_MDC_CLK);
	msm_camio_clk_disable(CAMIO_VFE_MDC_CLK);

        udelay(30);
        cam_pw(0);//PCAM


}
Exemple #3
0
void msm_camio_camif_pad_reg_reset(void)
{
	uint32_t reg;
	uint32_t mask, value;

	/* select CLKRGM_VFE_SRC_CAM_VFE_SRC:  internal source */
	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL);

	reg = (readl(mdcbase)) & CAMIF_CFG_RMSK;

	mask = CAM_SEL_BMSK |
		CAM_PCLK_SRC_SEL_BMSK |
		CAM_PCLK_INVERT_BMSK |
		EXT_CAM_HSYNC_POL_SEL_BMSK |
		EXT_CAM_VSYNC_POL_SEL_BMSK |
		MDDI_CLK_CHICKEN_BIT_BMSK;

	value = 1 << CAM_SEL_SHFT |
		3 << CAM_PCLK_SRC_SEL_SHFT |
		0 << CAM_PCLK_INVERT_SHFT |
		0 << EXT_CAM_HSYNC_POL_SEL_SHFT |
		0 << EXT_CAM_VSYNC_POL_SEL_SHFT |
		0 << MDDI_CLK_CHICKEN_BIT_SHFT;
	writel((reg & (~mask)) | (value & mask), mdcbase);
	msleep(10);

	reg = (readl(mdcbase)) & CAMIF_CFG_RMSK;
	mask = CAM_PAD_REG_SW_RESET_BMSK;
	value = 1 << CAM_PAD_REG_SW_RESET_SHFT;
	writel((reg & (~mask)) | (value & mask), mdcbase);
	msleep(10);

	reg = (readl(mdcbase)) & CAMIF_CFG_RMSK;
	mask = CAM_PAD_REG_SW_RESET_BMSK;
	value = 0 << CAM_PAD_REG_SW_RESET_SHFT;
	writel((reg & (~mask)) | (value & mask), mdcbase);
	msleep(10);

	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_EXTERNAL);

	msleep(10);

	/* todo: check return */
	if (camio_vfe_clk)
		clk_set_rate(camio_vfe_clk, 96000000);
}
Exemple #4
0
void msm_camio_disable(struct platform_device *pdev)
{
	iounmap(appbase);
	release_mem_region(camio_ext.appphy, camio_ext.appsz);

#if 1 //kk0704.park
	gpio_set_value(0, 0);//RESET    
	msleep(1);
	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL);
#endif
	msm_camio_clk_disable(CAMIO_VFE_CLK);
	msm_camio_clk_disable(CAMIO_MDC_CLK);
}
void msm_camio_disable(struct platform_device *pdev)
{
	struct msm_camera_sensor_info *sinfo = pdev->dev.platform_data;
	struct msm_camera_device_platform_data *camdev = sinfo->pdata;

	iounmap(mdcbase);
	release_mem_region(camio_ext.mdcphy, camio_ext.mdcsz);
	iounmap(appbase);
	release_mem_region(camio_ext.appphy, camio_ext.appsz);

	camdev->camera_gpio_off();
	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL);
	msm_camio_clk_disable(CAMIO_VFE_CLK);
	msm_camio_clk_disable(CAMIO_MDC_CLK);
	msm_camio_clk_disable(CAMIO_VFE_MDC_CLK);
}
void msm_camio_camif_pad_reg_reset(void)
{
	uint32_t reg;

	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL);
	msleep(10);

	reg = (msm_io_r(camifpadbase)) & CAMIF_CFG_RMSK;
	reg |= 0x3;
	msm_io_w(reg, camifpadbase);
	msleep(10);

	reg = (msm_io_r(camifpadbase)) & CAMIF_CFG_RMSK;
	reg |= 0x10;
	msm_io_w(reg, camifpadbase);
	msleep(10);

	reg = (msm_io_r(camifpadbase)) & CAMIF_CFG_RMSK;
	/* Need to be uninverted*/
	reg &= 0x03;
	msm_io_w(reg, camifpadbase);
	msleep(10);
}
void msm_camio_disable(struct platform_device *pdev)
{
#ifdef CONFIG_MACH_GIO
	struct msm_camera_sensor_info *sinfo = pdev->dev.platform_data;
	struct msm_camera_device_platform_data *camdev = sinfo->pdata;
#endif
	iounmap(appbase);
	release_mem_region(camio_ext.appphy, camio_ext.appsz);
#ifdef CONFIG_MACH_GIO
	gpio_set_value(0, 0);//RESET

	camdev->camera_gpio_off();

	printk("<=PCAM=> test code clk~~~~~~~~~\n");
	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL);
#endif
	msm_camio_clk_disable(CAMIO_VFE_CLK);
	msm_camio_clk_disable(CAMIO_MDC_CLK);
#ifdef CONFIG_MACH_GIO
	udelay(30);
	cam_pw(0);
#endif
}
Exemple #8
0
void msm_camio_disable(struct platform_device *pdev)
{
	iounmap(appbase);
	release_mem_region(camio_ext.appphy, camio_ext.appsz);
	gpio_set_value(0, 0);//RESET	
#if defined(CONFIG_MACH_RANT3) || defined(CONFIG_MACH_VINO)|| defined(CONFIG_MACH_GIOS)
	mdelay(10);

    msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL); //0412
#else
	mdelay(1);
#endif

	msm_camio_clk_disable(CAMIO_VFE_CLK);
	msm_camio_clk_disable(CAMIO_MDC_CLK);
	mdelay(1);

	gpio_set_value(1, 0);//STBY
	mdelay(1);
#if !(defined(CONFIG_MACH_RANT3) || defined(CONFIG_MACH_VINO)|| defined(CONFIG_MACH_GIOS))
	cam_pw(0);
#endif
}
Exemple #9
0
void msm_camio_disable(struct platform_device *pdev)
{
	struct msm_camera_device_platform_data *camdev =
		pdev->dev.platform_data;

	iounmap(mdcbase);
	release_mem_region(camio_ext.mdcphy, camio_ext.mdcsz);
	iounmap(appbase);
	release_mem_region(camio_ext.appphy, camio_ext.appsz);

	camdev->camera_gpio_off();

	gpio_direction_output(17, 0); //RESET

	msm_camio_clk_disable(CAMIO_VFE_CLK);
	msm_camio_clk_disable(CAMIO_MDC_CLK);
	msm_camio_clk_disable(CAMIO_VFE_MDC_CLK);
	
	gpio_direction_output(76, 0); //CAM ON

	msm_camio_clk_sel(MSM_CAMIO_CLK_SRC_INTERNAL);

	cpufreq_set_policy(0, "ondemand"); 
}