static int msm_xusb_init_phy(struct msmusb_hcd *mhcd)
{
int ret = -ENODEV;
struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
struct msm_usb_host_platform_data *pdata = mhcd->pdata;
switch (PHY_TYPE(pdata->phy_info)) {
case USB_PHY_INTEGRATED:
ret = 0;
case USB_PHY_SERIAL_PMIC:
msm_xusb_enable_clks(mhcd);
writel(0, USB_USBINTR);
#if 0
ret = msm_fsusb_rpc_init(&mhcd->otg_ops);
if (!ret)
msm_fsusb_init_phy();
#endif
msm_xusb_disable_clks(mhcd);
break;
default:
pr_err("%s: undefined phy type ( %X ) \n", __func__,
pdata->phy_info);
}
return ret;
}
static int msm_xusb_init_phy(struct msmusb_hcd *mhcd)
{
int ret = -ENODEV;
struct usb_hcd *hcd = mhcd_to_hcd(mhcd);
struct msm_usb_host_platform_data *pdata = mhcd->pdata;
unsigned temp;
switch (PHY_TYPE(pdata->phy_info)) {
case USB_PHY_INTEGRATED:
msm_hsusb_rpc_connect();
/* VBUS might be present. Turn off vbus */
if (pdata->vbus_power)
pdata->vbus_power(pdata->phy_info, 0);
msm_xusb_enable_clks(mhcd);
clk_enable(mhcd->clk);
if (pdata->phy_reset)
ret = pdata->phy_reset(hcd->regs);
else
ret = msm_hsusb_phy_reset();
if (ret)
break;
/* Give some delay to settle phy after reset */
msleep(100);
/* Disable VbusValid and SessionEnd comparators */
ulpi_write(hcd, ULPI_VBUS_VALID
| ULPI_SESS_END, ULPI_INT_RISE_CLR);
ulpi_write(hcd, ULPI_VBUS_VALID
| ULPI_SESS_END, ULPI_INT_FALL_CLR);
/* set hs driver amplitude to max
* to avoid eye diagram failures
*/
temp = ulpi_read(hcd, ULPI_CONFIG_REG);
temp |= ULPI_AMPLITUDE_MAX;
ulpi_write(hcd, temp, ULPI_CONFIG_REG);
/* Disable all interrupts */
writel(0, USB_USBINTR);
writel(readl(USB_OTGSC) & ~OTGSC_INTR_MASK, USB_OTGSC);
msm_xusb_disable_clks(mhcd);
clk_disable(mhcd->clk);
break;
case USB_PHY_SERIAL_PMIC:
msm_xusb_enable_clks(mhcd);
writel(0, USB_USBINTR);
ret = msm_fsusb_rpc_init(&mhcd->otg_ops);
if (!ret)
msm_fsusb_init_phy();
msm_xusb_disable_clks(mhcd);
break;
default:
pr_err("%s: undefined phy type ( %X ) \n", __func__,
pdata->phy_info);
}
return ret;
}
