static void spm_trigger_wfi_for_sleep(struct pwr_ctrl *pwrctrl) { // sync_hw_gating_value(); /* for Vcore DVFS */ if (is_cpu_pdn(pwrctrl->pcm_flags)) { spm_dormant_sta = mt_cpu_dormant(CPU_SHUTDOWN_MODE/* | DORMANT_SKIP_WFI*/); switch (spm_dormant_sta) { case MT_CPU_DORMANT_RESET: break; case MT_CPU_DORMANT_ABORT: break; case MT_CPU_DORMANT_BREAK: break; case MT_CPU_DORMANT_BYPASS: break; } } else { spm_dormant_sta = -1; spm_write(CA7_BUS_CONFIG, spm_read(CA7_BUS_CONFIG) | 0x10); wfi_with_sync(); spm_write(CA7_BUS_CONFIG, spm_read(CA7_BUS_CONFIG) & ~0x10); } if (is_infra_pdn(pwrctrl->pcm_flags)) mtk_uart_restore(); }
static void spm_trigger_wfi_for_sodi(struct pwr_ctrl *pwrctrl) { if (is_cpu_pdn(pwrctrl->pcm_flags)) { //sodi_debug("enter mt_cpu_dormant(CPU_SODI_MODE)\n"); mt_cpu_dormant(CPU_SODI_MODE); //sodi_debug("exit mt_cpu_dormant(CPU_SODI_MODE)\n"); } else { u32 val = 0; //backup MP0_AXI_CONFIG val = reg_read(MP0_AXI_CONFIG); //disable snoop function MCUSYS_SMC_WRITE(MP0_AXI_CONFIG, val | ACINACTM); sodi_debug("enter legacy WIFI, MP0_AXI_CONFIG=0x%x\n", reg_read(MP0_AXI_CONFIG)); //enter WFI wfi_with_sync(); //restore MP0_AXI_CONFIG MCUSYS_SMC_WRITE(MP0_AXI_CONFIG, val); sodi_debug("exit legacy WIFI, MP0_AXI_CONFIG=0x%x\n", reg_read(MP0_AXI_CONFIG)); } }
static void spm_trigger_wfi_for_sleep(struct pwr_ctrl *pwrctrl) { //FIXME: for K2 fpga early porting #if 0 sync_hw_gating_value(); /* for Vcore DVFS */ #endif if (is_cpu_pdn(pwrctrl->pcm_flags)) { spm_dormant_sta = mt_cpu_dormant(CPU_SHUTDOWN_MODE/* | DORMANT_SKIP_WFI*/); switch (spm_dormant_sta) { case MT_CPU_DORMANT_RESET: break; case MT_CPU_DORMANT_ABORT: break; case MT_CPU_DORMANT_BREAK: break; case MT_CPU_DORMANT_BYPASS: break; } } else { spm_dormant_sta = -1; //spm_write(MP0_AXI_CONFIG, spm_read(MP0_AXI_CONFIG) | ACINACTM); wfi_with_sync(); // spm_write(MP0_AXI_CONFIG, spm_read(MP0_AXI_CONFIG) & ~ACINACTM); } if (is_infra_pdn(pwrctrl->pcm_flags)) mtk_uart_restore(); }
static void spm_trigger_wfi_for_dpidle(struct pwr_ctrl *pwrctrl) { if (is_cpu_pdn(pwrctrl->pcm_flags)) { mt_cpu_dormant(CPU_DEEPIDLE_MODE); } else { wfi_with_sync(); } }
static void spm_trigger_wfi_for_dpidle(struct pwr_ctrl *pwrctrl) { if (is_cpu_pdn(pwrctrl->pcm_flags)) { mt_cpu_dormant(CPU_DEEPIDLE_MODE); } else { //Mp0_axi_config[4] is one by default. No need to program it before entering suspend. wfi_with_sync(); } }
static void spm_trigger_wfi_for_sodi(struct pwr_ctrl *pwrctrl) { //sync_hw_gating_value(); /* for Vcore DVFS */ if (is_cpu_pdn(pwrctrl->pcm_flags)) { mt_cpu_dormant(CPU_SODI_MODE); } else { // spm_write(CA7_BUS_CONFIG, spm_read(CA7_BUS_CONFIG) | 0x10); wfi_with_sync(); // spm_write(CA7_BUS_CONFIG, spm_read(CA7_BUS_CONFIG) & ~0x10); } }
static void spm_trigger_wfi_for_sodi(struct pwr_ctrl *pwrctrl) { if (is_cpu_pdn(pwrctrl->pcm_flags)) { //sodi_debug("enter mt_cpu_dormant(CPU_SODI_MODE)\n"); mt_cpu_dormant(CPU_SODI_MODE); //sodi_debug("exit mt_cpu_dormant(CPU_SODI_MODE)\n"); } else { sodi_debug("enter legacy WIFI\n"); //enter WFI wfi_with_sync(); sodi_debug("exit legacy WIFI\n"); } }
static void spm_trigger_wfi_for_dpidle(struct pwr_ctrl *pwrctrl) { //sync_hw_gating_value(); /* for Vcore DVFS */ #if 0 //deepidle no need, vproc(ext buck) can't set to 0v, because SRAM perpheral control from vproc spm_i2c_control(mt6333_BUSNUM, 1); #endif if (is_cpu_pdn(pwrctrl->pcm_flags)) { mt_cpu_dormant(CPU_DEEPIDLE_MODE); } else { wfi_with_sync(); } #if 0 //deepidle no need, vproc(ext buck) can't set to 0v, because SRAM perpheral control from vproc spm_i2c_control(mt6333_BUSNUM, 0); /* restore I2C1 power */ #endif }
static void spm_trigger_wfi_for_dpidle(struct pwr_ctrl *pwrctrl) { u32 v0, v1; if (is_cpu_pdn(pwrctrl->pcm_flags)) { mt_cpu_dormant(CPU_DEEPIDLE_MODE); } else { //Mp0_axi_config[4] is one by default. No need to program it before entering suspend. //backup MPx_AXI_CONFIG v0 = reg_read(MP0_AXI_CONFIG); v1 = reg_read(MP1_AXI_CONFIG); //disable snoop function MCUSYS_SMC_WRITE(MP0_AXI_CONFIG, v0 | ACINACTM); MCUSYS_SMC_WRITE(MP1_AXI_CONFIG, v1 | ACINACTM); wfi_with_sync(); //restore MP0_AXI_CONFIG MCUSYS_SMC_WRITE(MP0_AXI_CONFIG, v0); MCUSYS_SMC_WRITE(MP1_AXI_CONFIG, v1); } }