/*
* Return the current station MAC address.
* Note that the passed-in value must already be in network byte order.
*/
int netxen_niu_xg_macaddr_get(struct netxen_adapter *adapter, int phy,
netxen_ethernet_macaddr_t * addr)
{
u32 stationhigh;
u32 stationlow;
u8 val[8];
if (addr == NULL)
return -EINVAL;
if (phy != 0)
return -EINVAL;
if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI,
&stationhigh, 4))
return -EIO;
if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1,
&stationlow, 4))
return -EIO;
((__le32 *)val)[1] = cpu_to_le32(stationhigh);
((__le32 *)val)[0] = cpu_to_le32(stationlow);
memcpy(addr, val + 2, 6);
return 0;
}
/*
* Return the current station MAC address.
* Note that the passed-in value must already be in network byte order.
*/
static int netxen_niu_macaddr_get(struct netxen_adapter *adapter,
netxen_ethernet_macaddr_t * addr)
{
u32 stationhigh;
u32 stationlow;
int phy = adapter->physical_port;
u8 val[8];
if (addr == NULL)
return -EINVAL;
if ((phy < 0) || (phy > 3))
return -EINVAL;
if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy),
&stationhigh, 4))
return -EIO;
if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy),
&stationlow, 4))
return -EIO;
((__le32 *)val)[1] = cpu_to_le32(stationhigh);
((__le32 *)val)[0] = cpu_to_le32(stationlow);
memcpy(addr, val + 2, 6);
return 0;
}
/* Set promiscuous mode for a GbE interface */
int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
netxen_niu_prom_mode_t mode)
{
__u32 reg;
u32 port = adapter->physical_port;
if (port > NETXEN_NIU_MAX_GBE_PORTS)
return -EINVAL;
/* save previous contents */
if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
®, 4))
return -EIO;
if (mode == NETXEN_NIU_PROMISC_MODE) {
switch (port) {
case 0:
netxen_clear_gb_drop_gb0(reg);
break;
case 1:
netxen_clear_gb_drop_gb1(reg);
break;
case 2:
netxen_clear_gb_drop_gb2(reg);
break;
case 3:
netxen_clear_gb_drop_gb3(reg);
break;
default:
return -EIO;
}
} else {
switch (port) {
case 0:
netxen_set_gb_drop_gb0(reg);
break;
case 1:
netxen_set_gb_drop_gb1(reg);
break;
case 2:
netxen_set_gb_drop_gb2(reg);
break;
case 3:
netxen_set_gb_drop_gb3(reg);
break;
default:
return -EIO;
}
}
if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
®, 4))
return -EIO;
return 0;
}
int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
{
u32 reg = 0, ret = 0;
if (adapter->ahw.boardcfg.board_type == NETXEN_BRDTYPE_P2_SB31_10G_IMEZ) {
netxen_crb_writelit_adapter(adapter,
NETXEN_NIU_XG1_CONFIG_0, 0x5);
/* XXX hack for Mez cards: both ports in promisc mode */
netxen_nic_hw_read_wx(adapter,
NETXEN_NIU_XGE_CONFIG_1, ®, 4);
reg = (reg | 0x2000UL);
netxen_crb_writelit_adapter(adapter,
NETXEN_NIU_XGE_CONFIG_1, reg);
reg = 0;
netxen_nic_hw_read_wx(adapter,
NETXEN_NIU_XG1_CONFIG_1, ®, 4);
reg = (reg | 0x2000UL);
netxen_crb_writelit_adapter(adapter,
NETXEN_NIU_XG1_CONFIG_1, reg);
}
return ret;
}
int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
int port, netxen_niu_prom_mode_t mode)
{
__u32 reg;
if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
return -EINVAL;
if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_XGE_CONFIG_1, ®, 4))
return -EIO;
if (mode == NETXEN_NIU_PROMISC_MODE)
reg = (reg | 0x2000UL);
else
reg = (reg & ~0x2000UL);
netxen_crb_writelit_adapter(adapter, NETXEN_NIU_XGE_CONFIG_1, reg);
return 0;
}
int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
netxen_niu_prom_mode_t mode)
{
__u32 reg;
u32 port = adapter->physical_port;
if (port > NETXEN_NIU_MAX_XG_PORTS)
return -EINVAL;
if (netxen_nic_hw_read_wx(adapter,
NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), ®, 4))
return -EIO;
if (mode == NETXEN_NIU_PROMISC_MODE)
reg = (reg | 0x2000UL);
else
reg = (reg & ~0x2000UL);
netxen_crb_writelit_adapter(adapter,
NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
return 0;
}
/*
* netxen_niu_gbe_phy_read - read a register from the GbE PHY via
* mii management interface.
*
* Note: The MII management interface goes through port 0.
* Individual phys are addressed as follows:
* @param phy [15:8] phy id
* @param reg [7:0] register number
*
* @returns 0 on success
* -1 on error
*
*/
int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long phy,
long reg, __u32 * readval)
{
long timeout = 0;
long result = 0;
long restore = 0;
__u32 address;
__u32 command;
__u32 status;
__u32 mac_cfg0;
if (phy_lock(adapter) != 0) {
return -1;
}
/*
* MII mgmt all goes through port 0 MAC interface,
* so it cannot be in reset
*/
if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
&mac_cfg0, 4))
return -EIO;
if (netxen_gb_get_soft_reset(mac_cfg0)) {
__u32 temp;
temp = 0;
netxen_gb_tx_reset_pb(temp);
netxen_gb_rx_reset_pb(temp);
netxen_gb_tx_reset_mac(temp);
netxen_gb_rx_reset_mac(temp);
if (netxen_nic_hw_write_wx(adapter,
NETXEN_NIU_GB_MAC_CONFIG_0(0),
&temp, 4))
return -EIO;
restore = 1;
}
address = 0;
netxen_gb_mii_mgmt_reg_addr(address, reg);
netxen_gb_mii_mgmt_phy_addr(address, phy);
if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
&address, 4))
return -EIO;
command = 0; /* turn off any prior activity */
if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
&command, 4))
return -EIO;
/* send read command */
netxen_gb_mii_mgmt_set_read_cycle(command);
if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
&command, 4))
return -EIO;
status = 0;
do {
if (netxen_nic_hw_read_wx(adapter,
NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
&status, 4))
return -EIO;
timeout++;
} while ((netxen_get_gb_mii_mgmt_busy(status)
|| netxen_get_gb_mii_mgmt_notvalid(status))
&& (timeout++ < NETXEN_NIU_PHY_WAITMAX));
if (timeout < NETXEN_NIU_PHY_WAITMAX) {
if (netxen_nic_hw_read_wx(adapter,
NETXEN_NIU_GB_MII_MGMT_STATUS(0),
readval, 4))
return -EIO;
result = 0;
} else
result = -1;
if (restore)
if (netxen_nic_hw_write_wx(adapter,
NETXEN_NIU_GB_MAC_CONFIG_0(0),
&mac_cfg0, 4))
return -EIO;
phy_unlock(adapter);
return result;
}
/*
* netxen_niu_gbe_phy_write - write a register to the GbE PHY via
* mii management interface.
*
* Note: The MII management interface goes through port 0.
* Individual phys are addressed as follows:
* @param phy [15:8] phy id
* @param reg [7:0] register number
*
* @returns 0 on success
* -1 on error
*
*/
int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter,
long phy, long reg, __u32 val)
{
long timeout = 0;
long result = 0;
long restore = 0;
__u32 address;
__u32 command;
__u32 status;
__u32 mac_cfg0;
/*
* MII mgmt all goes through port 0 MAC interface, so it
* cannot be in reset
*/
if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
&mac_cfg0, 4))
return -EIO;
if (netxen_gb_get_soft_reset(mac_cfg0)) {
__u32 temp;
temp = 0;
netxen_gb_tx_reset_pb(temp);
netxen_gb_rx_reset_pb(temp);
netxen_gb_tx_reset_mac(temp);
netxen_gb_rx_reset_mac(temp);
if (netxen_nic_hw_write_wx(adapter,
NETXEN_NIU_GB_MAC_CONFIG_0(0),
&temp, 4))
return -EIO;
restore = 1;
}
command = 0; /* turn off any prior activity */
if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
&command, 4))
return -EIO;
address = 0;
netxen_gb_mii_mgmt_reg_addr(address, reg);
netxen_gb_mii_mgmt_phy_addr(address, phy);
if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
&address, 4))
return -EIO;
if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0),
&val, 4))
return -EIO;
status = 0;
do {
if (netxen_nic_hw_read_wx(adapter,
NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
&status, 4))
return -EIO;
timeout++;
} while ((netxen_get_gb_mii_mgmt_busy(status))
&& (timeout++ < NETXEN_NIU_PHY_WAITMAX));
if (timeout < NETXEN_NIU_PHY_WAITMAX)
result = 0;
else
result = -EIO;
/* restore the state of port 0 MAC in case we tampered with it */
if (restore)
if (netxen_nic_hw_write_wx(adapter,
NETXEN_NIU_GB_MAC_CONFIG_0(0),
&mac_cfg0, 4))
return -EIO;
return result;
}
