static int __init nlm_uart_init(void) { unsigned long uartbase; uartbase = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET); xlr_uart_data[0].membase = (void __iomem *)uartbase; xlr_uart_data[0].mapbase = CPHYSADDR(uartbase); uartbase = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_1_OFFSET); xlr_uart_data[1].membase = (void __iomem *)uartbase; xlr_uart_data[1].mapbase = CPHYSADDR(uartbase); return platform_device_register(&uart_device); }
static void nlm_init_node(void) { struct nlm_soc_info *nodep; nodep = nlm_current_node(); nodep->picbase = nlm_mmio_base(NETLOGIC_IO_PIC_OFFSET); nodep->ebase = read_c0_ebase() & (~((1 << 12) - 1)); spin_lock_init(&nodep->piclock); }
static void nlm_linux_exit(void) { uint64_t gpiobase; gpiobase = nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET); /* trigger a chip reset by writing 1 to GPIO_SWRESET_REG */ nlm_write_reg(gpiobase, GPIO_SWRESET_REG, 1); for ( ; ; ) cpu_wait(); }
static int __init xlr_net_init(void) { gmac0_addr = ioremap(CPHYSADDR( nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), 0xfff); if (nlm_chip_is_xls()) xls_gmac_init(); else xlr_gmac_init(); return 0; }
void prom_putchar(char c) { uint64_t uartbase; #if defined(CONFIG_CPU_XLP) uartbase = nlm_get_uart_regbase(0, 0); #elif defined(CONFIG_CPU_XLR) uartbase = nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET); #endif while ((nlm_read_reg(uartbase, UART_LSR) & UART_LSR_THRE) == 0) ; nlm_write_reg(uartbase, UART_TX, c); }
static void net_device_init(int id, struct resource *res, int offset, int irq) { res[0].name = "gmac"; res[0].start = CPHYSADDR(nlm_mmio_base(offset)); res[0].end = res[0].start + 0xfff; res[0].flags = IORESOURCE_MEM; res[1].name = "gmac"; res[1].start = irq; res[1].end = irq; res[1].flags = IORESOURCE_IRQ; xlr_net_dev[id].name = "xlr-net"; xlr_net_dev[id].id = id; xlr_net_dev[id].num_resources = 2; xlr_net_dev[id].resource = res; xlr_net_dev[id].dev.platform_data = &ndata[id]; }
static void __init nlm_early_serial_setup(void) { struct uart_port s; unsigned long uart_base; uart_base = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET); memset(&s, 0, sizeof(s)); s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; s.iotype = UPIO_MEM32; s.regshift = 2; s.irq = PIC_UART_0_IRQ; s.uartclk = PIC_CLKS_PER_SEC; s.serial_in = nlm_xlr_uart_in; s.serial_out = nlm_xlr_uart_out; s.mapbase = uart_base; s.membase = (unsigned char __iomem *)uart_base; early_serial_setup(&s); }
void __init prom_init(void) { int *argv, *envp; /* passed as 32 bit ptrs */ struct psb_info *prom_infop; /* truncate to 32 bit and sign extend all args */ argv = (int *)(long)(int)fw_arg1; envp = (int *)(long)(int)fw_arg2; prom_infop = (struct psb_info *)(long)(int)fw_arg3; nlm_prom_info = *prom_infop; nlm_pic_base = nlm_mmio_base(NETLOGIC_IO_PIC_OFFSET); nlm_early_serial_setup(); build_arcs_cmdline(argv); nlm_common_ebase = read_c0_ebase() & (~((1 << 12) - 1)); prom_add_memory(); #ifdef CONFIG_SMP nlm_wakeup_secondary_cpus(nlm_prom_info.online_cpu_map); register_smp_ops(&nlm_smp_ops); #endif }
static void xls_gmac_init(void) { int mac; gmac4_addr = ioremap(CPHYSADDR( nlm_mmio_base(NETLOGIC_IO_GMAC_4_OFFSET)), 0xfff); /* Passing GPIO base for serdes init. Only needed on sgmii ports*/ gpio_addr = ioremap(CPHYSADDR( nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET)), 0xfff); switch (nlm_prom_info.board_major_version) { case 12: /* first block RGMII or XAUI, use RGMII */ config_mac(&ndata[0], PHY_INTERFACE_MODE_RGMII, gmac0_addr, /* serdes */ gmac0_addr, /* pcs */ FMN_STNID_GMACRFR_0, FMN_STNID_GMAC0_TX0, xlr_board_fmn_config.bucket_size, &xlr_board_fmn_config.gmac[0], 0); net_device_init(0, xlr_net_res[0], xlr_gmac_offsets[0], xlr_gmac_irqs[0]); platform_device_register(&xlr_net_dev[0]); /* second block is XAUI, not supported yet */ break; default: /* default XLS config, all ports SGMII */ for (mac = 0; mac < 4; mac++) { config_mac(&ndata[mac], PHY_INTERFACE_MODE_SGMII, gmac0_addr, /* serdes */ gmac0_addr, /* pcs */ FMN_STNID_GMACRFR_0, FMN_STNID_GMAC0_TX0 + mac, xlr_board_fmn_config.bucket_size, &xlr_board_fmn_config.gmac[0], /* PHY address according to chip/board */ mac + 0x10); net_device_init(mac, xlr_net_res[mac], xlr_gmac_offsets[mac], xlr_gmac_irqs[mac]); platform_device_register(&xlr_net_dev[mac]); } for (mac = 4; mac < MAX_NUM_XLS_GMAC; mac++) { config_mac(&ndata[mac], PHY_INTERFACE_MODE_SGMII, gmac4_addr, /* serdes */ gmac4_addr, /* pcs */ FMN_STNID_GMAC1_FR_0, FMN_STNID_GMAC1_TX0 + mac - 4, xlr_board_fmn_config.bucket_size, &xlr_board_fmn_config.gmac[1], /* PHY address according to chip/board */ mac + 0x10); net_device_init(mac, xlr_net_res[mac], xlr_gmac_offsets[mac], xlr_gmac_irqs[mac]); platform_device_register(&xlr_net_dev[mac]); } } }