/*
* Restore GPIO registers that might be modified
* for power save reasons.
*/
void context_gpio_restore(void)
{
int i;
u32 output_state;
u32 pull_up;
u32 pull_down;
u32 pull;
for (i = 0; i < GPIO_NUM_BANKS; i++) {
writel(gpio_save[i][2], gpio_bankaddr[i] + NMK_GPIO_PDIS);
writel(gpio_save[i][3], gpio_bankaddr[i] + NMK_GPIO_DIR);
/* Set the high outputs. outpute_state = GPIO_DIR & GPIO_DAT */
output_state = gpio_save[i][3] & gpio_save[i][4];
writel(output_state, gpio_bankaddr[i] + NMK_GPIO_DATS);
/*
* Set the low outputs.
* outpute_state = ~(GPIO_DIR & GPIO_DAT) & GPIO_DIR
*/
output_state = ~(gpio_save[i][3] & gpio_save[i][4]) &
gpio_save[i][3];
writel(output_state, gpio_bankaddr[i] + NMK_GPIO_DATC);
/*
* Restore pull up/down.
* Only write pull up/down settings on inputs where
* PDIS is not set.
* pull = (~GPIO_DIR & ~GPIO_PDIS)
*/
pull = (~gpio_save[i][3] & ~gpio_save[i][2]);
nmk_gpio_read_pull(i, &pull_up);
pull_down = pull & ~pull_up;
pull_up = pull & pull_up;
/* Set pull ups */
writel(pull_up, gpio_bankaddr[i] + NMK_GPIO_DATS);
/* Set pull downs */
writel(pull_down, gpio_bankaddr[i] + NMK_GPIO_DATC);
writel(gpio_save[i][6], gpio_bankaddr[i] + NMK_GPIO_SLPC);
}
}
/*
* Restore GPIO registers that might be modified
* for power save reasons.
*/
void context_gpio_restore(void)
{
int i;
u32 output_state;
u32 pull_up;
u32 pull_down;
u32 pull;
unsigned int rimsc, fimsc;
for (i = 0; i < GPIO_NUM_BANKS; i++) {
writel(gpio_save[i][2], gpio_bankaddr[i] + NMK_GPIO_PDIS);
writel(gpio_save[i][3], gpio_bankaddr[i] + NMK_GPIO_DIR);
/* Set the high outputs. outpute_state = GPIO_DIR & GPIO_DAT */
output_state = gpio_save[i][3] & gpio_save[i][4];
writel(output_state, gpio_bankaddr[i] + NMK_GPIO_DATS);
/*
* Set the low outputs.
* outpute_state = ~(GPIO_DIR & GPIO_DAT) & GPIO_DIR
*/
output_state = ~(gpio_save[i][3] & gpio_save[i][4]) &
gpio_save[i][3];
writel(output_state, gpio_bankaddr[i] + NMK_GPIO_DATC);
/*
* Restore pull up/down.
* Only write pull up/down settings on inputs where
* PDIS is not set.
* pull = (~GPIO_DIR & ~GPIO_PDIS)
*/
pull = (~gpio_save[i][3] & ~gpio_save[i][2]);
nmk_gpio_read_pull(i, &pull_up);
pull_down = pull & ~pull_up;
pull_up = pull & pull_up;
/* Set pull ups */
writel(pull_up, gpio_bankaddr[i] + NMK_GPIO_DATS);
/* Set pull downs */
writel(pull_down, gpio_bankaddr[i] + NMK_GPIO_DATC);
writel(gpio_save[i][6], gpio_bankaddr[i] + NMK_GPIO_SLPC);
}
/* Restore Masks for GPIO140 and GPIO32 which gives
* spurious interrupts during sleep
*/
rimsc = readl(gpio_bankaddr[4] + NMK_GPIO_RIMSC);
fimsc = readl(gpio_bankaddr[4] + NMK_GPIO_FIMSC);
rimsc |= (0x1 << 140 % NMK_GPIO_PER_CHIP);
fimsc |= (0x1 << 140 % NMK_GPIO_PER_CHIP);
writel(rimsc, gpio_bankaddr[4] + NMK_GPIO_RIMSC);
writel(fimsc, gpio_bankaddr[4] + NMK_GPIO_FIMSC);
rimsc = readl(gpio_bankaddr[1] + NMK_GPIO_RIMSC);
fimsc = readl(gpio_bankaddr[1] + NMK_GPIO_FIMSC);
rimsc |= 0x1;
fimsc |= 0x1;
writel(rimsc, gpio_bankaddr[1] + NMK_GPIO_RIMSC);
writel(fimsc, gpio_bankaddr[1] + NMK_GPIO_FIMSC);
}
