int nvbios_iccsense_parse(struct nvkm_bios *bios, struct nvbios_iccsense *iccsense) { struct nvkm_subdev *subdev = &bios->subdev; u8 ver, hdr, cnt, len, i; u16 table, entry; table = nvbios_iccsense_table(bios, &ver, &hdr, &cnt, &len); if (!table || !cnt) return -EINVAL; if (ver != 0x10 && ver != 0x20) { nvkm_error(subdev, "ICCSENSE version 0x%02x unknown\n", ver); return -EINVAL; } iccsense->nr_entry = cnt; iccsense->rail = kmalloc(sizeof(struct pwr_rail_t) * cnt, GFP_KERNEL); if (!iccsense->rail) return -ENOMEM; for (i = 0; i < cnt; ++i) { struct pwr_rail_t *rail = &iccsense->rail[i]; entry = table + hdr + i * len; switch(ver) { case 0x10: rail->mode = nvbios_rd08(bios, entry + 0x1); rail->extdev_id = nvbios_rd08(bios, entry + 0x2); rail->resistor_mohm = nvbios_rd08(bios, entry + 0x3); rail->rail = nvbios_rd08(bios, entry + 0x4); break; case 0x20: rail->mode = nvbios_rd08(bios, entry); rail->extdev_id = nvbios_rd08(bios, entry + 0x1); rail->resistor_mohm = nvbios_rd08(bios, entry + 0x5); rail->rail = nvbios_rd08(bios, entry + 0x6); break; }; } return 0; }
int nvbios_iccsense_parse(struct nvkm_bios *bios, struct nvbios_iccsense *iccsense) { struct nvkm_subdev *subdev = &bios->subdev; u8 ver, hdr, cnt, len, i; u32 table, entry; table = nvbios_iccsense_table(bios, &ver, &hdr, &cnt, &len); if (!table || !cnt) return -EINVAL; if (ver != 0x10 && ver != 0x20) { nvkm_error(subdev, "ICCSENSE version 0x%02x unknown\n", ver); return -EINVAL; } iccsense->nr_entry = cnt; iccsense->rail = kmalloc(sizeof(struct pwr_rail_t) * cnt, GFP_KERNEL); if (!iccsense->rail) return -ENOMEM; for (i = 0; i < cnt; ++i) { struct nvbios_extdev_func extdev; struct pwr_rail_t *rail = &iccsense->rail[i]; u8 res_start = 0; int r; entry = table + hdr + i * len; switch(ver) { case 0x10: rail->mode = nvbios_rd08(bios, entry + 0x1); rail->extdev_id = nvbios_rd08(bios, entry + 0x2); res_start = 0x3; break; case 0x20: rail->mode = nvbios_rd08(bios, entry); rail->extdev_id = nvbios_rd08(bios, entry + 0x1); res_start = 0x5; break; }; if (nvbios_extdev_parse(bios, rail->extdev_id, &extdev)) continue; switch (extdev.type) { case NVBIOS_EXTDEV_INA209: case NVBIOS_EXTDEV_INA219: rail->resistor_count = 1; break; case NVBIOS_EXTDEV_INA3221: rail->resistor_count = 3; break; default: rail->resistor_count = 0; break; }; for (r = 0; r < rail->resistor_count; ++r) { rail->resistors[r].mohm = nvbios_rd08(bios, entry + res_start + r * 2); rail->resistors[r].enabled = !(nvbios_rd08(bios, entry + res_start + r * 2 + 1) & 0x40); } rail->config = nvbios_rd16(bios, entry + res_start + rail->resistor_count * 2); } return 0; }