static int nv50_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_object **pobject) { struct nouveau_dmaeng *dmaeng = (void *)engine; union { struct nv50_dma_v0 v0; } *args; struct nv50_dmaobj_priv *priv; u32 user, part, comp, kind; int ret; ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &priv); *pobject = nv_object(priv); if (ret) return ret; args = data; nv_ioctl(parent, "create nv50 dma size %d\n", size); if (nvif_unpack(args->v0, 0, 0, false)) { nv_ioctl(parent, "create nv50 dma vers %d priv %d part %d " "comp %d kind %02x\n", args->v0.version, args->v0.priv, args->v0.part, args->v0.comp, args->v0.kind); user = args->v0.priv; part = args->v0.part; comp = args->v0.comp; kind = args->v0.kind; } else if (size == 0) { if (priv->base.target != NV_MEM_TARGET_VM) { user = NV50_DMA_V0_PRIV_US; part = NV50_DMA_V0_PART_256; comp = NV50_DMA_V0_COMP_NONE; kind = NV50_DMA_V0_KIND_PITCH; } else { user = NV50_DMA_V0_PRIV_VM; part = NV50_DMA_V0_PART_VM; comp = NV50_DMA_V0_COMP_VM; kind = NV50_DMA_V0_KIND_VM; } } else return ret; if (user > 2 || part > 2 || comp > 3 || kind > 0x7f) return -EINVAL; priv->flags0 = (comp << 29) | (kind << 22) | (user << 20); priv->flags5 = (part << 16); switch (priv->base.target) { case NV_MEM_TARGET_VM: priv->flags0 |= 0x00000000; break; case NV_MEM_TARGET_VRAM: priv->flags0 |= 0x00010000; break; case NV_MEM_TARGET_PCI: priv->flags0 |= 0x00020000; break; case NV_MEM_TARGET_PCI_NOSNOOP: priv->flags0 |= 0x00030000; break; default: return -EINVAL; } switch (priv->base.access) { case NV_MEM_ACCESS_VM: break; case NV_MEM_ACCESS_RO: priv->flags0 |= 0x00040000; break; case NV_MEM_ACCESS_WO: case NV_MEM_ACCESS_RW: priv->flags0 |= 0x00080000; break; default: return -EINVAL; } return dmaeng->bind(&priv->base, nv_object(priv), (void *)pobject); }
static int gf100_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_object **pobject) { struct nvkm_dmaeng *dmaeng = (void *)engine; union { struct gf100_dma_v0 v0; } *args; struct gf100_dmaobj_priv *priv; u32 kind, user, unkn; int ret; ret = nvkm_dmaobj_create(parent, engine, oclass, &data, &size, &priv); *pobject = nv_object(priv); if (ret) return ret; args = data; nv_ioctl(parent, "create gf100 dma size %d\n", size); if (nvif_unpack(args->v0, 0, 0, false)) { nv_ioctl(parent, "create gf100 dma vers %d priv %d kind %02x\n", args->v0.version, args->v0.priv, args->v0.kind); kind = args->v0.kind; user = args->v0.priv; unkn = 0; } else if (size == 0) { if (priv->base.target != NV_MEM_TARGET_VM) { kind = GF100_DMA_V0_KIND_PITCH; user = GF100_DMA_V0_PRIV_US; unkn = 2; } else { kind = GF100_DMA_V0_KIND_VM; user = GF100_DMA_V0_PRIV_VM; unkn = 0; } } else return ret; if (user > 2) return -EINVAL; priv->flags0 |= (kind << 22) | (user << 20); priv->flags5 |= (unkn << 16); switch (priv->base.target) { case NV_MEM_TARGET_VM: priv->flags0 |= 0x00000000; break; case NV_MEM_TARGET_VRAM: priv->flags0 |= 0x00010000; break; case NV_MEM_TARGET_PCI: priv->flags0 |= 0x00020000; break; case NV_MEM_TARGET_PCI_NOSNOOP: priv->flags0 |= 0x00030000; break; default: return -EINVAL; } switch (priv->base.access) { case NV_MEM_ACCESS_VM: break; case NV_MEM_ACCESS_RO: priv->flags0 |= 0x00040000; break; case NV_MEM_ACCESS_WO: case NV_MEM_ACCESS_RW: priv->flags0 |= 0x00080000; break; } return dmaeng->bind(&priv->base, nv_object(priv), (void *)pobject); }