/** * octeon_i2c_unblock - unblock the bus. * @i2c: The struct octeon_i2c. * * If there was a reset while a device was driving 0 to bus, * bus is blocked. We toggle it free manually by some clock * cycles and send a stop. */ static void octeon_i2c_unblock(struct octeon_i2c *i2c) { int i; dev_dbg(i2c->dev, "%s\n", __func__); for (i = 0; i < 9; i++) { octeon_i2c_write_int(i2c, 0x0); udelay(5); octeon_i2c_write_int(i2c, 0x200); udelay(5); } octeon_i2c_write_int(i2c, 0x300); udelay(5); octeon_i2c_write_int(i2c, 0x100); udelay(5); octeon_i2c_write_int(i2c, 0x0); }
/** * octeon_i2c_int_disable - disable the TS interrupt. * @i2c: The struct octeon_i2c. */ static void octeon_i2c_int_disable(struct octeon_i2c *i2c) { octeon_i2c_write_int(i2c, 0); }
/** * octeon_i2c_int_enable - enable the TS interrupt. * @i2c: The struct octeon_i2c. * * The interrupt will be asserted when there is non-STAT_IDLE state in * the SW_TWSI_EOP_TWSI_STAT register. */ static void octeon_i2c_int_enable(struct octeon_i2c *i2c) { octeon_i2c_write_int(i2c, 0x40); }
/* disable the CORE interrupt */ static void octeon_i2c_int_disable(struct octeon_i2c *i2c) { /* clear TS/ST/IFLG events */ octeon_i2c_write_int(i2c, 0); }
/** * octeon_i2c_int_enable - enable the CORE interrupt * @i2c: The struct octeon_i2c * * The interrupt will be asserted when there is non-STAT_IDLE state in * the SW_TWSI_EOP_TWSI_STAT register. */ static void octeon_i2c_int_enable(struct octeon_i2c *i2c) { octeon_i2c_write_int(i2c, TWSI_INT_CORE_EN); }
static void octeon_i2c_hlc_int_clear(struct octeon_i2c *i2c) { /* clear ST/TS events, listen for neither */ octeon_i2c_write_int(i2c, TWSI_INT_ST_INT | TWSI_INT_TS_INT); }