void odm_edca_turbo_init(void *dm_void)
{
struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
dm->dm_edca_table.is_current_turbo_edca = false;
dm->dm_edca_table.is_cur_rdl_state = false;
ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial VO PARAM: 0x%x\n",
odm_read_4byte(dm, ODM_EDCA_VO_PARAM));
ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial VI PARAM: 0x%x\n",
odm_read_4byte(dm, ODM_EDCA_VI_PARAM));
ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial BE PARAM: 0x%x\n",
odm_read_4byte(dm, ODM_EDCA_BE_PARAM));
ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial BK PARAM: 0x%x\n",
odm_read_4byte(dm, ODM_EDCA_BK_PARAM));
} /* ODM_InitEdcaTurbo */
void
odm_edca_turbo_init(
void *p_dm_void)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
struct _ADAPTER *adapter = NULL;
HAL_DATA_TYPE *p_hal_data = NULL;
if (p_dm_odm->adapter == NULL) {
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EdcaTurboInit fail!!!\n"));
return;
}
adapter = p_dm_odm->adapter;
p_hal_data = GET_HAL_DATA(adapter);
p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
p_dm_odm->dm_edca_table.is_cur_rdl_state = false;
p_hal_data->is_any_non_be_pkts = false;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
struct _ADAPTER *adapter = p_dm_odm->adapter;
p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
p_dm_odm->dm_edca_table.is_cur_rdl_state = false;
adapter->recvpriv.is_any_non_be_pkts = false;
#endif
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_VO_PARAM)));
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_VI_PARAM)));
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BE_PARAM)));
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BK_PARAM)));
} /* ODM_InitEdcaTurbo */
void
odm_edca_turbo_check_mp(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _ADAPTER *adapter = p_dm_odm->adapter;
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
struct _ADAPTER *p_default_adapter = get_default_adapter(adapter);
struct _ADAPTER *p_ext_adapter = get_first_ext_adapter(adapter); /* NULL; */
PMGNT_INFO p_mgnt_info = &adapter->MgntInfo;
PSTA_QOS p_sta_qos = adapter->MgntInfo.p_sta_qos;
/* [Win7 count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's adapter is always Default. 2009.08.20, by Bohn */
u64 ext_cur_tx_ok_cnt = 0;
u64 ext_cur_rx_ok_cnt = 0;
/* For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. */
u8 two_port_status = (u8)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
/* Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. */
u64 cur_tx_ok_cnt = 0;
u64 cur_rx_ok_cnt = 0;
u32 EDCA_BE_UL = 0x5ea42b;/* Parameter suggested by Scott */ /* edca_setting_UL[p_mgnt_info->iot_peer]; */
u32 EDCA_BE_DL = 0x5ea42b;/* Parameter suggested by Scott */ /* edca_setting_DL[p_mgnt_info->iot_peer]; */
u32 EDCA_BE = 0x5ea42b;
u8 iot_peer = 0;
boolean *p_is_cur_rdl_state = NULL;
boolean is_last_is_cur_rdl_state = false;
boolean is_bias_on_rx = false;
boolean is_edca_turbo_on = false;
u8 tx_rate = 0xFF;
u64 value64;
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_edca_turbo_check_mp========================>"));
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BE_PARAM)));
/* *******************************
* list paramter for different platform
* ******************************* */
is_last_is_cur_rdl_state = p_dm_odm->dm_edca_table.is_cur_rdl_state;
p_is_cur_rdl_state = &(p_dm_odm->dm_edca_table.is_cur_rdl_state);
/* 2012/09/14 MH Add */
if (p_mgnt_info->num_non_be_pkt > p_mgnt_info->reg_edca_thresh && !(adapter->MgntInfo.wifi_confg & RT_WIFI_LOGO))
p_hal_data->is_any_non_be_pkts = true;
p_mgnt_info->num_non_be_pkt = 0;
/* Caculate TX/RX TP: */
cur_tx_ok_cnt = p_dm_odm->cur_tx_ok_cnt;
cur_rx_ok_cnt = p_dm_odm->cur_rx_ok_cnt;
if (p_ext_adapter == NULL)
p_ext_adapter = p_default_adapter;
ext_cur_tx_ok_cnt = p_ext_adapter->tx_stats.num_tx_bytes_unicast - p_mgnt_info->ext_last_tx_ok_cnt;
ext_cur_rx_ok_cnt = p_ext_adapter->rx_stats.num_rx_bytes_unicast - p_mgnt_info->ext_last_rx_ok_cnt;
get_two_port_shared_resource(adapter, TWO_PORT_SHARED_OBJECT__STATUS, NULL, &two_port_status);
/* For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. */
if (two_port_status == TWO_PORT_STATUS__EXTENSION_ONLY) {
cur_tx_ok_cnt = ext_cur_tx_ok_cnt ;
cur_rx_ok_cnt = ext_cur_rx_ok_cnt ;
}
/* */
iot_peer = p_mgnt_info->iot_peer;
is_bias_on_rx = (p_mgnt_info->iot_action & HT_IOT_ACT_EDCA_BIAS_ON_RX) ? true : false;
is_edca_turbo_on = ((!p_hal_data->is_any_non_be_pkts)) ? true : false;
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("is_any_non_be_pkts : 0x%lx\n", p_hal_data->is_any_non_be_pkts));
/* *******************************
* check if edca turbo is disabled
* ******************************* */
if (odm_is_edca_turbo_disable(p_dm_odm)) {
p_hal_data->is_any_non_be_pkts = false;
p_mgnt_info->last_tx_ok_cnt = adapter->tx_stats.num_tx_bytes_unicast;
p_mgnt_info->last_rx_ok_cnt = adapter->rx_stats.num_rx_bytes_unicast;
p_mgnt_info->ext_last_tx_ok_cnt = p_ext_adapter->tx_stats.num_tx_bytes_unicast;
p_mgnt_info->ext_last_rx_ok_cnt = p_ext_adapter->rx_stats.num_rx_bytes_unicast;
}
/* *******************************
* remove iot case out
* ******************************* */
odm_edca_para_sel_by_iot(p_dm_odm, &EDCA_BE_UL, &EDCA_BE_DL);
/* *******************************
* Check if the status needs to be changed.
* ******************************* */
if (is_edca_turbo_on) {
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("is_edca_turbo_on : 0x%x is_bias_on_rx : 0x%x\n", is_edca_turbo_on, is_bias_on_rx));
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("cur_tx_ok_cnt : 0x%lx\n", cur_tx_ok_cnt));
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("cur_rx_ok_cnt : 0x%lx\n", cur_rx_ok_cnt));
if (is_bias_on_rx)
odm_edca_choose_traffic_idx(p_dm_odm, cur_tx_ok_cnt, cur_rx_ok_cnt, true, p_is_cur_rdl_state);
else
odm_edca_choose_traffic_idx(p_dm_odm, cur_tx_ok_cnt, cur_rx_ok_cnt, false, p_is_cur_rdl_state);
/* modify by Guo.Mingzhi 2011-12-29 */
if (adapter->AP_EDCA_PARAM[0] != EDCA_BE)
EDCA_BE = adapter->AP_EDCA_PARAM[0];
else
EDCA_BE = ((*p_is_cur_rdl_state) == true) ? EDCA_BE_DL : EDCA_BE_UL;
/*For TPLINK 8188EU test*/
if ((IS_HARDWARE_TYPE_8188EU(adapter)) && (p_hal_data->UndecoratedSmoothedPWDB < 28)) { /* Set to origimal EDCA 0x5EA42B now need to update.*/
} else { /*Use TPLINK preferred EDCA parameters.*/
EDCA_BE = p_mgnt_info->EDCABEPara;
}
if (IS_HARDWARE_TYPE_8821U(adapter)) {
if (p_mgnt_info->reg_tx_duty_enable) {
/* 2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) */
if (!p_mgnt_info->forced_data_rate) { /* auto rate */
if (p_dm_odm->tx_rate != 0xFF)
tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm_odm->tx_rate);
} else /* force rate */
tx_rate = (u8) p_mgnt_info->forced_data_rate;
value64 = (cur_rx_ok_cnt << 2);
if (cur_tx_ok_cnt < value64) /* Downlink */
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
else { /* Uplink */
/*dbg_print("p_rf_calibrate_info->thermal_value = 0x%X\n", p_rf_calibrate_info->thermal_value);*/
/*if(p_rf_calibrate_info->thermal_value < p_hal_data->eeprom_thermal_meter)*/
if ((p_dm_odm->rf_calibrate_info.thermal_value < 0x2c) || (*p_dm_odm->p_band_type == BAND_ON_2_4G))
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
else {
switch (tx_rate) {
case MGN_VHT1SS_MCS6:
case MGN_VHT1SS_MCS5:
case MGN_MCS6:
case MGN_MCS5:
case MGN_48M:
case MGN_54M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0x1ea42b);
break;
case MGN_VHT1SS_MCS4:
case MGN_MCS4:
case MGN_36M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa42b);
break;
case MGN_VHT1SS_MCS3:
case MGN_MCS3:
case MGN_24M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa47f);
break;
case MGN_VHT1SS_MCS2:
case MGN_MCS2:
case MGN_18M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa57f);
break;
case MGN_VHT1SS_MCS1:
case MGN_MCS1:
case MGN_9M:
case MGN_12M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa77f);
break;
case MGN_VHT1SS_MCS0:
case MGN_MCS0:
case MGN_6M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa87f);
break;
default:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
break;
}
}
}
} else
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
} else if (IS_HARDWARE_TYPE_8812AU(adapter)) {
if (p_mgnt_info->reg_tx_duty_enable) {
/* 2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) */
/* it;s the same issue as 8811AU */
if (!p_mgnt_info->forced_data_rate) { /* auto rate */
if (p_dm_odm->tx_rate != 0xFF)
tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm_odm->tx_rate);
} else /* force rate */
tx_rate = (u8) p_mgnt_info->forced_data_rate;
value64 = (cur_rx_ok_cnt << 2);
if (cur_tx_ok_cnt < value64) /* Downlink */
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
else { /* Uplink */
/*dbg_print("p_rf_calibrate_info->thermal_value = 0x%X\n", p_rf_calibrate_info->thermal_value);*/
/*if(p_rf_calibrate_info->thermal_value < p_hal_data->eeprom_thermal_meter)*/
if ((p_dm_odm->rf_calibrate_info.thermal_value < 0x2c) || (*p_dm_odm->p_band_type == BAND_ON_2_4G))
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
else {
switch (tx_rate) {
case MGN_VHT2SS_MCS9:
case MGN_VHT1SS_MCS9:
case MGN_VHT1SS_MCS8:
case MGN_MCS15:
case MGN_MCS7:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0x1ea44f);
case MGN_VHT2SS_MCS8:
case MGN_VHT1SS_MCS7:
case MGN_MCS14:
case MGN_MCS6:
case MGN_54M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa44f);
case MGN_VHT2SS_MCS7:
case MGN_VHT2SS_MCS6:
case MGN_VHT1SS_MCS6:
case MGN_VHT1SS_MCS5:
case MGN_MCS13:
case MGN_MCS5:
case MGN_48M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa630);
break;
case MGN_VHT2SS_MCS5:
case MGN_VHT2SS_MCS4:
case MGN_VHT1SS_MCS4:
case MGN_VHT1SS_MCS3:
case MGN_MCS12:
case MGN_MCS4:
case MGN_MCS3:
case MGN_36M:
case MGN_24M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa730);
break;
case MGN_VHT2SS_MCS3:
case MGN_VHT2SS_MCS2:
case MGN_VHT2SS_MCS1:
case MGN_VHT1SS_MCS2:
case MGN_VHT1SS_MCS1:
case MGN_MCS11:
case MGN_MCS10:
case MGN_MCS9:
case MGN_MCS2:
case MGN_MCS1:
case MGN_18M:
case MGN_12M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa830);
break;
case MGN_VHT2SS_MCS0:
case MGN_VHT1SS_MCS0:
case MGN_MCS0:
case MGN_MCS8:
case MGN_9M:
case MGN_6M:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa87f);
break;
default:
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
break;
}
}
}
} else
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
} else
odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EDCA Turbo on: EDCA_BE:0x%lx\n", EDCA_BE));
p_dm_odm->dm_edca_table.is_current_turbo_edca = true;
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx\n", EDCA_BE_DL, EDCA_BE_UL, EDCA_BE));
} else {
/* Turn Off EDCA turbo here. */
/* Restore original EDCA according to the declaration of AP. */
if (p_dm_odm->dm_edca_table.is_current_turbo_edca) {
phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(p_sta_qos->wmm_param_ele, AC0_BE));
p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Restore EDCA BE: 0x%lx\n", p_dm_odm->WMMEDCA_BE));
}
}
}
