static void *alloc_and_get_data_array(struct device_node *p_node, char *str, int *lenp)
{
int ret = 0, length = 0;
char *p = NULL;
if(of_find_property(p_node, str, &length) == NULL){
printk("DT of %s not found!\n", str);
goto exit;
}
printk("prop=%s,length=%d\n",str,length);
p = kzalloc(length * sizeof(char *), GFP_KERNEL);
if (p == NULL) {
printk("ERROR, NO enough mem for %s!\n", str);
length = 0;
goto exit;
}
ret = of_property_read_u8_array(p_node, str, p, length);
if (ret) {
printk("no of property %s!\n", str);
kfree(p);
p = NULL;
goto exit;
}
*lenp = length;
exit:
return p;
}
static int btmrvl_check_device_tree(struct btmrvl_private *priv)
{
struct device_node *dt_node;
struct btmrvl_sdio_card *card = priv->btmrvl_dev.card;
u8 cal_data[BT_CAL_HDR_LEN + BT_CAL_DATA_SIZE];
int ret = 0;
u16 gpio, gap;
if (card->plt_of_node) {
dt_node = card->plt_of_node;
ret = of_property_read_u16(dt_node, "marvell,wakeup-pin",
&gpio);
if (ret)
gpio = (priv->btmrvl_dev.gpio_gap & 0xff00) >> 8;
ret = of_property_read_u16(dt_node, "marvell,wakeup-gap-ms",
&gap);
if (ret)
gap = (u8)(priv->btmrvl_dev.gpio_gap & 0x00ff);
priv->btmrvl_dev.gpio_gap = (gpio << 8) + gap;
ret = of_property_read_u8_array(dt_node, "marvell,cal-data",
cal_data + BT_CAL_HDR_LEN,
BT_CAL_DATA_SIZE);
if (ret)
return ret;
BT_DBG("Use cal data from device tree");
ret = btmrvl_download_cal_data(priv, cal_data,
BT_CAL_DATA_SIZE);
if (ret)
BT_ERR("Fail to download calibrate data");
}
static int ath10k_download_cal_dt(struct ath10k *ar)
{
struct device_node *node;
int data_len;
void *data;
int ret;
node = ar->dev->of_node;
if (!node)
/* Device Tree is optional, don't print any warnings if
* there's no node for ath10k.
*/
return -ENOENT;
if (!of_get_property(node, "qcom,ath10k-calibration-data",
&data_len)) {
/* The calibration data node is optional */
return -ENOENT;
}
if (data_len != QCA988X_CAL_DATA_LEN) {
ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
data_len);
ret = -EMSGSIZE;
goto out;
}
data = kmalloc(data_len, GFP_KERNEL);
if (!data) {
ret = -ENOMEM;
goto out;
}
ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
data, data_len);
if (ret) {
ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
ret);
goto out_free;
}
ret = ath10k_download_board_data(ar, data, data_len);
if (ret) {
ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
ret);
goto out_free;
}
ret = 0;
out_free:
kfree(data);
out:
return ret;
}
/* set up */
static int ps2pi_probe(struct platform_device *pdev)
{
static uint32_t integer, fractional;
static int key, retval, i;
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
/* set up input event device */
of_property_read_u8_array(np, "translate", &translate[0], 256);
ps2=input_allocate_device();
ps2->name = "ps2pi";
ps2->phys = "ps2/input0";
ps2->id.bustype = BUS_HOST;
ps2->id.vendor = 0x0001;
ps2->id.product = 0x0001;
ps2->id.version = 0x0100;
ps2->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
ps2->keycode = translate;
ps2->keycodesize = sizeof(unsigned char);
ps2->keycodemax = ARRAY_SIZE(translate);
for (i = 1; i < 0x256; i++) set_bit(i,ps2->keybit);
retval = input_register_device(ps2);
/* numlock on because I like it that way */
input_report_key(ps2, KEY_NUMLOCK, 1); input_sync(ps2);
/* disable uart */
uart = ioremap(BASE + 0x201000, 60);
iowrite32(0, uart + 12);
mdelay(10);
/* set baud rate from device tree */
of_property_read_u32(np, "integer", &integer);
of_property_read_u32(np, "fractional", &fractional);
iowrite32(integer, uart + 9);
iowrite32(fractional, uart + 10);
/* set uart to receive 8 bit, 1 stop, odd parity, no fifo */
iowrite32(((3<<5) | (1<<1)), uart + 11);
/* flush buffer */
key = ioread32(uart);
/* interrupt on */
iowrite32((1<<4), uart + 14);
/* uart on */
retval = request_irq(83,(irq_handler_t)irq_handler,IRQF_SHARED,"ps2pi",(void *)irq_handler);
iowrite32((1<<9) | 1, uart + 12);
printk(KERN_INFO "ps2pi: divider integer %i fractional %i\n", integer, fractional);
return 0;
}
static int of_get_eq_pdata(struct tas57xx_platform_data *pdata, struct device_node* p_node)
{
int i, ret = 0, length = 0;
const char *str = NULL;
char *regs = NULL;
prob_priv.num_eq = of_property_count_strings(p_node,"eq_name");
if(prob_priv.num_eq <= 0){
printk("no of eq_name config\n");
ret = -ENODEV;
goto exit;
}
pdata->num_eq_cfgs = prob_priv.num_eq;
prob_priv.eq_configs = kzalloc(prob_priv.num_eq * sizeof(struct tas57xx_eq_cfg), GFP_KERNEL);
for(i = 0; i < prob_priv.num_eq; i++){
ret = of_property_read_string_index(p_node, "eq_name", i , &str);
if(of_find_property(p_node, "eq_table", &length) == NULL){
printk("%s fail to get of eq_table\n", __func__);
goto exit1;
}
regs = kzalloc(length * sizeof(char *), GFP_KERNEL);
if (!regs) {
printk("ERROR, NO enough mem for eq_table!\n");
return -ENOMEM;
}
ret = of_property_read_u8_array(p_node, "eq_table", regs, length);
strncpy(prob_priv.eq_configs[i].name, str, NAME_SIZE);
prob_priv.eq_configs[i].regs = regs;
}
pdata->eq_cfgs = prob_priv.eq_configs;
return 0;
exit1:
kfree(prob_priv.eq_configs);
exit:
return ret;
}
int get_hw_config_u8_array(const char *node_name,
const char *prop_name, u8 *pvalue,
size_t sz)
{
struct device_node *np;
int ret;
if(node_name == NULL ||
prop_name == NULL ||
pvalue == NULL) {
hwlog_err("Invalid Argument, NULL passed\n");
return -EINVAL;
}
np = of_find_node_by_name(NULL, node_name);
if (!np) {
hwlog_err("can not get device node with node_name: %s\n", node_name);
return -ENODEV;
}
if(0 == is_property_public(np, prop_name)) {
hwlog_err("property to read is not public, permission denied\n");
ret = -EACCES;
goto OUT;
}
ret = of_property_read_u8_array(np, prop_name, pvalue, sz);
if (ret != 0) {
hwlog_err("can not get prop values with prop_name: %s\n", prop_name);
goto OUT;
}
OUT:
of_node_put(np);
return ret;
}
void __init opal_sys_param_init(void)
{
struct device_node *sysparam;
struct param_attr *attr;
u32 *id, *size;
int count, i;
u8 *perm;
if (!opal_kobj) {
pr_warn("SYSPARAM: opal kobject is not available\n");
goto out;
}
sysparam_kobj = kobject_create_and_add("sysparams", opal_kobj);
if (!sysparam_kobj) {
pr_err("SYSPARAM: Failed to create sysparam kobject\n");
goto out;
}
/* Allocate big enough buffer for any get/set transactions */
param_data_buf = kzalloc(MAX_PARAM_DATA_LEN, GFP_KERNEL);
if (!param_data_buf) {
pr_err("SYSPARAM: Failed to allocate memory for param data "
"buf\n");
goto out_kobj_put;
}
sysparam = of_find_node_by_path("/ibm,opal/sysparams");
if (!sysparam) {
pr_err("SYSPARAM: Opal sysparam node not found\n");
goto out_param_buf;
}
if (!of_device_is_compatible(sysparam, "ibm,opal-sysparams")) {
pr_err("SYSPARAM: Opal sysparam node not compatible\n");
goto out_node_put;
}
/* Number of parameters exposed through DT */
count = of_property_count_strings(sysparam, "param-name");
if (count < 0) {
pr_err("SYSPARAM: No string found of property param-name in "
"the node %s\n", sysparam->name);
goto out_node_put;
}
id = kzalloc(sizeof(*id) * count, GFP_KERNEL);
if (!id) {
pr_err("SYSPARAM: Failed to allocate memory to read parameter "
"id\n");
goto out_node_put;
}
size = kzalloc(sizeof(*size) * count, GFP_KERNEL);
if (!size) {
pr_err("SYSPARAM: Failed to allocate memory to read parameter "
"size\n");
goto out_free_id;
}
perm = kzalloc(sizeof(*perm) * count, GFP_KERNEL);
if (!perm) {
pr_err("SYSPARAM: Failed to allocate memory to read supported "
"action on the parameter");
goto out_free_size;
}
if (of_property_read_u32_array(sysparam, "param-id", id, count)) {
pr_err("SYSPARAM: Missing property param-id in the DT\n");
goto out_free_perm;
}
if (of_property_read_u32_array(sysparam, "param-len", size, count)) {
pr_err("SYSPARAM: Missing propery param-len in the DT\n");
goto out_free_perm;
}
if (of_property_read_u8_array(sysparam, "param-perm", perm, count)) {
pr_err("SYSPARAM: Missing propery param-perm in the DT\n");
goto out_free_perm;
}
attr = kzalloc(sizeof(*attr) * count, GFP_KERNEL);
if (!attr) {
pr_err("SYSPARAM: Failed to allocate memory for parameter "
"attributes\n");
goto out_free_perm;
}
/* For each of the parameters, populate the parameter attributes */
for (i = 0; i < count; i++) {
sysfs_attr_init(&attr[i].kobj_attr.attr);
attr[i].param_id = id[i];
attr[i].param_size = size[i];
if (of_property_read_string_index(sysparam, "param-name", i,
&attr[i].kobj_attr.attr.name))
continue;
/* If the parameter is read-only or read-write */
switch (perm[i] & 3) {
case OPAL_SYSPARAM_READ:
attr[i].kobj_attr.attr.mode = S_IRUGO;
break;
case OPAL_SYSPARAM_WRITE:
attr[i].kobj_attr.attr.mode = S_IWUGO;
break;
case OPAL_SYSPARAM_RW:
attr[i].kobj_attr.attr.mode = S_IRUGO | S_IWUGO;
break;
default:
break;
}
attr[i].kobj_attr.show = sys_param_show;
attr[i].kobj_attr.store = sys_param_store;
if (sysfs_create_file(sysparam_kobj, &attr[i].kobj_attr.attr)) {
pr_err("SYSPARAM: Failed to create sysfs file %s\n",
attr[i].kobj_attr.attr.name);
goto out_free_attr;
}
}
kfree(perm);
kfree(size);
kfree(id);
of_node_put(sysparam);
return;
out_free_attr:
kfree(attr);
out_free_perm:
kfree(perm);
out_free_size:
kfree(size);
out_free_id:
kfree(id);
out_node_put:
of_node_put(sysparam);
out_param_buf:
kfree(param_data_buf);
out_kobj_put:
kobject_put(sysparam_kobj);
out:
return;
}
static int adau1701_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct adau1701 *adau1701;
struct device *dev = &client->dev;
int gpio_nreset = -EINVAL;
int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
int ret, i;
adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
if (!adau1701)
return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(supply_names); i++)
adau1701->supplies[i].supply = supply_names[i];
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
adau1701->supplies);
if (ret < 0) {
dev_err(dev, "Failed to get regulators: %d\n", ret);
return ret;
}
ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
adau1701->supplies);
if (ret < 0) {
dev_err(dev, "Failed to enable regulators: %d\n", ret);
return ret;
}
adau1701->client = client;
adau1701->regmap = devm_regmap_init(dev, NULL, client,
&adau1701_regmap);
if (IS_ERR(adau1701->regmap)) {
ret = PTR_ERR(adau1701->regmap);
goto exit_regulators_disable;
}
if (dev->of_node) {
gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
if (gpio_nreset < 0 && gpio_nreset != -ENOENT) {
ret = gpio_nreset;
goto exit_regulators_disable;
}
gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
"adi,pll-mode-gpios", 0);
if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT) {
ret = gpio_pll_mode[0];
goto exit_regulators_disable;
}
gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
"adi,pll-mode-gpios", 1);
if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT) {
ret = gpio_pll_mode[1];
goto exit_regulators_disable;
}
of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
&adau1701->pll_clkdiv);
of_property_read_u8_array(dev->of_node, "adi,pin-config",
adau1701->pin_config,
ARRAY_SIZE(adau1701->pin_config));
}
if (gpio_is_valid(gpio_nreset)) {
ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
"ADAU1701 Reset");
if (ret < 0)
goto exit_regulators_disable;
}
if (gpio_is_valid(gpio_pll_mode[0]) &&
gpio_is_valid(gpio_pll_mode[1])) {
ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
GPIOF_OUT_INIT_LOW,
"ADAU1701 PLL mode 0");
if (ret < 0)
goto exit_regulators_disable;
ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
GPIOF_OUT_INIT_LOW,
"ADAU1701 PLL mode 1");
if (ret < 0)
goto exit_regulators_disable;
}
adau1701->gpio_nreset = gpio_nreset;
adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
i2c_set_clientdata(client, adau1701);
adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
&adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
if (IS_ERR(adau1701->sigmadsp)) {
ret = PTR_ERR(adau1701->sigmadsp);
goto exit_regulators_disable;
}
ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
&adau1701_dai, 1);
exit_regulators_disable:
regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
return ret;
}
static int ceva_ahci_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct device *dev = &pdev->dev;
struct ahci_host_priv *hpriv;
struct ceva_ahci_priv *cevapriv;
enum dev_dma_attr attr;
int rc;
cevapriv = devm_kzalloc(dev, sizeof(*cevapriv), GFP_KERNEL);
if (!cevapriv)
return -ENOMEM;
cevapriv->ahci_pdev = pdev;
hpriv = ahci_platform_get_resources(pdev, 0);
if (IS_ERR(hpriv))
return PTR_ERR(hpriv);
rc = ahci_platform_enable_resources(hpriv);
if (rc)
return rc;
if (of_property_read_bool(np, "ceva,broken-gen2"))
cevapriv->flags = CEVA_FLAG_BROKEN_GEN2;
/* Read OOB timing value for COMINIT from device-tree */
if (of_property_read_u8_array(np, "ceva,p0-cominit-params",
(u8 *)&cevapriv->pp2c[0], 4) < 0) {
dev_warn(dev, "ceva,p0-cominit-params property not defined\n");
return -EINVAL;
}
if (of_property_read_u8_array(np, "ceva,p1-cominit-params",
(u8 *)&cevapriv->pp2c[1], 4) < 0) {
dev_warn(dev, "ceva,p1-cominit-params property not defined\n");
return -EINVAL;
}
/* Read OOB timing value for COMWAKE from device-tree*/
if (of_property_read_u8_array(np, "ceva,p0-comwake-params",
(u8 *)&cevapriv->pp3c[0], 4) < 0) {
dev_warn(dev, "ceva,p0-comwake-params property not defined\n");
return -EINVAL;
}
if (of_property_read_u8_array(np, "ceva,p1-comwake-params",
(u8 *)&cevapriv->pp3c[1], 4) < 0) {
dev_warn(dev, "ceva,p1-comwake-params property not defined\n");
return -EINVAL;
}
/* Read phy BURST timing value from device-tree */
if (of_property_read_u8_array(np, "ceva,p0-burst-params",
(u8 *)&cevapriv->pp4c[0], 4) < 0) {
dev_warn(dev, "ceva,p0-burst-params property not defined\n");
return -EINVAL;
}
if (of_property_read_u8_array(np, "ceva,p1-burst-params",
(u8 *)&cevapriv->pp4c[1], 4) < 0) {
dev_warn(dev, "ceva,p1-burst-params property not defined\n");
return -EINVAL;
}
/* Read phy RETRY interval timing value from device-tree */
if (of_property_read_u16_array(np, "ceva,p0-retry-params",
(u16 *)&cevapriv->pp5c[0], 2) < 0) {
dev_warn(dev, "ceva,p0-retry-params property not defined\n");
return -EINVAL;
}
if (of_property_read_u16_array(np, "ceva,p1-retry-params",
(u16 *)&cevapriv->pp5c[1], 2) < 0) {
dev_warn(dev, "ceva,p1-retry-params property not defined\n");
return -EINVAL;
}
/*
* Check if CCI is enabled for SATA. The DEV_DMA_COHERENT is returned
* if CCI is enabled, so check for DEV_DMA_COHERENT.
*/
attr = device_get_dma_attr(dev);
cevapriv->is_cci_enabled = (attr == DEV_DMA_COHERENT);
hpriv->plat_data = cevapriv;
/* CEVA specific initialization */
ahci_ceva_setup(hpriv);
rc = ahci_platform_init_host(pdev, hpriv, &ahci_ceva_port_info,
&ahci_platform_sht);
if (rc)
goto disable_resources;
return 0;
disable_resources:
ahci_platform_disable_resources(hpriv);
return rc;
}
static int ssp_parse_dt(struct device *dev,
struct ssp_data *data)
{
struct device_node *np = dev->of_node;
enum of_gpio_flags flags;
int errorno = 0;
/* gpio pins */
data->mcu_int1 = of_get_named_gpio_flags(np, "ssp,mcu_int1-gpio",
0, &flags);
if (data->mcu_int1 < 0) {
errorno = data->mcu_int1;
goto dt_exit;
}
data->mcu_int2 = of_get_named_gpio_flags(np, "ssp,mcu_int2-gpio",
0, &flags);
if (data->mcu_int2 < 0) {
errorno = data->mcu_int2;
goto dt_exit;
}
data->ap_int = of_get_named_gpio_flags(np, "ssp,ap_int-gpio",
0, &flags);
if (data->ap_int < 0) {
errorno = data->ap_int;
goto dt_exit;
}
data->rst = of_get_named_gpio_flags(np, "ssp,rst-gpio",
0, &flags);
if (data->rst < 0) {
errorno = data->rst;
goto dt_exit;
}
/* sensor positions */
if (of_property_read_u32(np, "ssp,acc-position", &data->accel_position))
data->accel_position = 0;
if (of_property_read_u32(np, "ssp,mag-position", &data->mag_position))
data->mag_position = 0;
ssp_info("acc-posi[%d] mag-posi[%d]",
data->accel_position, data->mag_position);
/* prox thresh */
if (of_property_read_u32(np, "ssp,prox-hi_thresh",
&data->uProxHiThresh_default))
data->uProxHiThresh_default = DEFUALT_HIGH_THRESHOLD;
if (of_property_read_u32(np, "ssp,prox-low_thresh",
&data->uProxLoThresh_default))
data->uProxLoThresh_default = DEFUALT_LOW_THRESHOLD;
ssp_info("hi-thresh[%u] low-thresh[%u]",
data->uProxHiThresh_default, data->uProxLoThresh_default);
#ifdef CONFIG_SENSORS_MULTIPLE_GLASS_TYPE
if (of_property_read_u32(np, "ssp-glass-type", &data->glass_type))
data->glass_type = 0;
#endif
/* mag matrix */
if (of_property_read_u8_array(np, "ssp,mag-array",
data->pdc_matrix, sizeof(data->pdc_matrix))) {
ssp_err("no mag-array, set as 0");
}
/* set off gpio pins */
errorno = gpio_request(data->mcu_int1, "mcu_ap_int1");
if (errorno) {
ssp_err("failed to request MCU_INT1 for SSP");
goto dt_exit;
}
errorno = gpio_direction_input(data->mcu_int1);
if (errorno) {
ssp_err("failed to set mcu_int1 as input");
goto dt_exit;
}
errorno = gpio_request(data->mcu_int2, "MCU_INT2");
if (errorno) {
ssp_err("failed to request MCU_INT2 for SSP");
goto dt_exit;
}
gpio_direction_input(data->mcu_int2);
errorno = gpio_request(data->ap_int, "AP_MCU_INT");
if (errorno) {
ssp_err("failed to request AP_INT for SSP");
goto dt_exit;
}
gpio_direction_output(data->ap_int, 1);
errorno = gpio_request(data->rst, "MCU_RST");
if (errorno) {
ssp_err("failed to request MCU_RST for SSP");
goto dt_exit;
}
gpio_direction_output(data->rst, 1);
dt_exit:
return errorno;
}
static int qcom_usb_hs_phy_probe(struct ulpi *ulpi)
{
struct qcom_usb_hs_phy *uphy;
struct phy_provider *p;
struct clk *clk;
struct regulator *reg;
struct reset_control *reset;
int size;
int ret;
uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
if (!uphy)
return -ENOMEM;
ulpi_set_drvdata(ulpi, uphy);
uphy->ulpi = ulpi;
size = of_property_count_u8_elems(ulpi->dev.of_node, "qcom,init-seq");
if (size < 0)
size = 0;
uphy->init_seq = devm_kmalloc_array(&ulpi->dev, (size / 2) + 1,
sizeof(*uphy->init_seq), GFP_KERNEL);
if (!uphy->init_seq)
return -ENOMEM;
ret = of_property_read_u8_array(ulpi->dev.of_node, "qcom,init-seq",
(u8 *)uphy->init_seq, size);
if (ret && size)
return ret;
/* NUL terminate */
uphy->init_seq[size / 2].addr = uphy->init_seq[size / 2].val = 0;
uphy->ref_clk = clk = devm_clk_get(&ulpi->dev, "ref");
if (IS_ERR(clk))
return PTR_ERR(clk);
uphy->sleep_clk = clk = devm_clk_get(&ulpi->dev, "sleep");
if (IS_ERR(clk))
return PTR_ERR(clk);
uphy->v1p8 = reg = devm_regulator_get(&ulpi->dev, "v1p8");
if (IS_ERR(reg))
return PTR_ERR(reg);
uphy->v3p3 = reg = devm_regulator_get(&ulpi->dev, "v3p3");
if (IS_ERR(reg))
return PTR_ERR(reg);
uphy->reset = reset = devm_reset_control_get(&ulpi->dev, "por");
if (IS_ERR(reset)) {
if (PTR_ERR(reset) == -EPROBE_DEFER)
return PTR_ERR(reset);
uphy->reset = NULL;
}
uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
&qcom_usb_hs_phy_ops);
if (IS_ERR(uphy->phy))
return PTR_ERR(uphy->phy);
uphy->vbus_edev = extcon_get_edev_by_phandle(&ulpi->dev, 0);
if (IS_ERR(uphy->vbus_edev)) {
if (PTR_ERR(uphy->vbus_edev) != -ENODEV)
return PTR_ERR(uphy->vbus_edev);
uphy->vbus_edev = NULL;
}
uphy->vbus_notify.notifier_call = qcom_usb_hs_phy_vbus_notifier;
phy_set_drvdata(uphy->phy, uphy);
p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
return PTR_ERR_OR_ZERO(p);
}
static int malidp_bind(struct device *dev)
{
struct resource *res;
struct drm_device *drm;
struct device_node *ep;
struct malidp_drm *malidp;
struct malidp_hw_device *hwdev;
struct platform_device *pdev = to_platform_device(dev);
/* number of lines for the R, G and B output */
u8 output_width[MAX_OUTPUT_CHANNELS];
int ret = 0, i;
u32 version, out_depth = 0;
malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
if (!malidp)
return -ENOMEM;
hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);
if (!hwdev)
return -ENOMEM;
/*
* copy the associated data from malidp_drm_of_match to avoid
* having to keep a reference to the OF node after binding
*/
memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev));
malidp->dev = hwdev;
INIT_LIST_HEAD(&malidp->event_list);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
hwdev->regs = devm_ioremap_resource(dev, res);
if (IS_ERR(hwdev->regs))
return PTR_ERR(hwdev->regs);
hwdev->pclk = devm_clk_get(dev, "pclk");
if (IS_ERR(hwdev->pclk))
return PTR_ERR(hwdev->pclk);
hwdev->aclk = devm_clk_get(dev, "aclk");
if (IS_ERR(hwdev->aclk))
return PTR_ERR(hwdev->aclk);
hwdev->mclk = devm_clk_get(dev, "mclk");
if (IS_ERR(hwdev->mclk))
return PTR_ERR(hwdev->mclk);
hwdev->pxlclk = devm_clk_get(dev, "pxlclk");
if (IS_ERR(hwdev->pxlclk))
return PTR_ERR(hwdev->pxlclk);
/* Get the optional framebuffer memory resource */
ret = of_reserved_mem_device_init(dev);
if (ret && ret != -ENODEV)
return ret;
drm = drm_dev_alloc(&malidp_driver, dev);
if (IS_ERR(drm)) {
ret = PTR_ERR(drm);
goto alloc_fail;
}
/* Enable APB clock in order to get access to the registers */
clk_prepare_enable(hwdev->pclk);
/*
* Enable AXI clock and main clock so that prefetch can start once
* the registers are set
*/
clk_prepare_enable(hwdev->aclk);
clk_prepare_enable(hwdev->mclk);
ret = hwdev->query_hw(hwdev);
if (ret) {
DRM_ERROR("Invalid HW configuration\n");
goto query_hw_fail;
}
version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID);
DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16,
(version >> 12) & 0xf, (version >> 8) & 0xf);
/* set the number of lines used for output of RGB data */
ret = of_property_read_u8_array(dev->of_node,
"arm,malidp-output-port-lines",
output_width, MAX_OUTPUT_CHANNELS);
if (ret)
goto query_hw_fail;
for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
out_depth = (out_depth << 8) | (output_width[i] & 0xf);
malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base);
drm->dev_private = malidp;
dev_set_drvdata(dev, drm);
atomic_set(&malidp->config_valid, 0);
init_waitqueue_head(&malidp->wq);
ret = malidp_init(drm);
if (ret < 0)
goto init_fail;
ret = drm_dev_register(drm, 0);
if (ret)
goto register_fail;
/* Set the CRTC's port so that the encoder component can find it */
ep = of_graph_get_next_endpoint(dev->of_node, NULL);
if (!ep) {
ret = -EINVAL;
goto port_fail;
}
malidp->crtc.port = of_get_next_parent(ep);
ret = component_bind_all(dev, drm);
if (ret) {
DRM_ERROR("Failed to bind all components\n");
goto bind_fail;
}
ret = malidp_irq_init(pdev);
if (ret < 0)
goto irq_init_fail;
ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
if (ret < 0) {
DRM_ERROR("failed to initialise vblank\n");
goto vblank_fail;
}
drm_mode_config_reset(drm);
malidp->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
drm->mode_config.num_connector);
if (IS_ERR(malidp->fbdev)) {
ret = PTR_ERR(malidp->fbdev);
malidp->fbdev = NULL;
goto fbdev_fail;
}
drm_kms_helper_poll_init(drm);
return 0;
fbdev_fail:
drm_vblank_cleanup(drm);
vblank_fail:
malidp_se_irq_fini(drm);
malidp_de_irq_fini(drm);
irq_init_fail:
component_unbind_all(dev, drm);
bind_fail:
of_node_put(malidp->crtc.port);
malidp->crtc.port = NULL;
port_fail:
drm_dev_unregister(drm);
register_fail:
malidp_de_planes_destroy(drm);
drm_mode_config_cleanup(drm);
init_fail:
drm->dev_private = NULL;
dev_set_drvdata(dev, NULL);
query_hw_fail:
clk_disable_unprepare(hwdev->mclk);
clk_disable_unprepare(hwdev->aclk);
clk_disable_unprepare(hwdev->pclk);
drm_dev_unref(drm);
alloc_fail:
of_reserved_mem_device_release(dev);
return ret;
}
static int hw_lm3642_get_dt_data(struct hw_flash_ctrl_t *flash_ctrl)
{
struct hw_lm3642_private_data_t *pdata;
struct device_node *of_node;
int i;
int rc = -1;
cam_debug("%s enter.\n", __func__);
if (NULL == flash_ctrl) {
cam_err("%s flash_ctrl is NULL.", __func__);
return rc;
}
pdata = (struct hw_lm3642_private_data_t *)flash_ctrl->pdata;
of_node = flash_ctrl->dev->of_node;
rc = of_property_read_u32(of_node, "huawei,flash-pin",
&pdata->strobe);
cam_info("%s hisi,flash-pin %d, rc %d\n", __func__,
pdata->strobe, rc);
if (rc < 0) {
cam_err("%s failed %d\n", __func__, __LINE__);
return rc;
}
rc = of_property_read_u32(of_node, "huawei,flash-chipid",
&pdata->chipid);
cam_info("%s hisi,chipid 0x%x, rc %d\n", __func__,
pdata->chipid, rc);
if (rc < 0) {
cam_err("%s failed %d\n", __func__, __LINE__);
return rc;
}
rc = of_property_read_u32(of_node, "huawei,flash_led_num",
&pdata->flash_led_num);
cam_info("%s hisi,flash_led_num %d, rc %d\n", __func__,
pdata->flash_led_num, rc);
if (rc < 0) {
cam_err("%s failed %d\n", __func__, __LINE__);
return rc;
}
rc = of_property_read_u32(of_node, "huawei,torch_led_num",
&pdata->torch_led_num);
cam_info("%s hisi,torch_led_num %d, rc %d\n", __func__,
pdata->torch_led_num, rc);
if (rc < 0) {
cam_err("%s failed %d\n", __func__, __LINE__);
return rc;
}
rc = of_property_read_u8_array(of_node, "huawei,flash_led",
pdata->flash_led, pdata->flash_led_num);
if (rc < 0) {
cam_err("%s failed line %d\n", __func__, __LINE__);
return rc;
} else {
for (i=0; i< pdata->flash_led_num; i++) {
cam_debug("%s flash_led[%d]=%d.\n", __func__, i,
pdata->flash_led[i]);
}
}
rc = of_property_read_u8_array(of_node, "huawei,torch_led",
pdata->torch_led, pdata->torch_led_num);
if (rc < 0) {
cam_err("%s failed line %d\n", __func__, __LINE__);
return rc;
} else {
for (i=0; i< pdata->torch_led_num; i++) {
cam_debug("%s torch_led[%d]=%d.\n", __func__, i,
pdata->torch_led[i]);
}
}
return rc;
}
static int adau1701_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct adau1701 *adau1701;
struct device *dev = &client->dev;
int gpio_nreset = -EINVAL;
int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
int ret;
adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
if (!adau1701)
return -ENOMEM;
adau1701->regmap = devm_regmap_init(dev, NULL, client,
&adau1701_regmap);
if (IS_ERR(adau1701->regmap))
return PTR_ERR(adau1701->regmap);
if (dev->of_node) {
gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
if (gpio_nreset < 0 && gpio_nreset != -ENOENT)
return gpio_nreset;
gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
"adi,pll-mode-gpios", 0);
if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT)
return gpio_pll_mode[0];
gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
"adi,pll-mode-gpios", 1);
if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT)
return gpio_pll_mode[1];
of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
&adau1701->pll_clkdiv);
of_property_read_u8_array(dev->of_node, "adi,pin-config",
adau1701->pin_config,
ARRAY_SIZE(adau1701->pin_config));
}
if (gpio_is_valid(gpio_nreset)) {
ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
"ADAU1701 Reset");
if (ret < 0)
return ret;
}
if (gpio_is_valid(gpio_pll_mode[0]) &&
gpio_is_valid(gpio_pll_mode[1])) {
ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
GPIOF_OUT_INIT_LOW,
"ADAU1701 PLL mode 0");
if (ret < 0)
return ret;
ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
GPIOF_OUT_INIT_LOW,
"ADAU1701 PLL mode 1");
if (ret < 0)
return ret;
}
adau1701->gpio_nreset = gpio_nreset;
adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
i2c_set_clientdata(client, adau1701);
ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
&adau1701_dai, 1);
return ret;
}
int32 get_cust_conf_string(int32 modu, int8 * puc_var, int8* puc_value, uint32 size)
{
int32 ret = 0;
#ifdef INI_KO_MODULE
struct device_node *np;
int32 len;
int8 out_str[HISI_CUST_NVRAM_LEN] = {0};
#endif
switch (modu)
{
#ifdef INI_KO_MODULE
case CUST_MODU_DTS:
{
np = of_find_compatible_node(NULL, NULL, CUST_COMP_NODE);
if (NULL == np)
{
INI_ERROR("no compatible node found");
return INI_FAILED;
}
//ret = of_property_read_string(np, puc_var, (const char **)&out_str);
len = of_property_count_u8_elems(np, puc_var);
if (len < 0)
{
INI_ERROR("can't get len of value(%s)", puc_var);
return INI_FAILED;
}
len = INI_MIN(len, NUM_OF_NV_PARAMS);
INI_DEBUG("get len of value(%s), read len is %d", puc_var, len);
ret = of_property_read_u8_array(np, puc_var, out_str, len);
if (0 > ret)
{
INI_ERROR("conf str:%s property is not found", puc_var);
return INI_FAILED;
}
//strncpy(puc_value, out_str, INI_FILE_PATH_LEN);
memcpy(puc_value, out_str, len);
INI_DEBUG("conf string:%s get value:%s", puc_var, puc_value);
return INI_SUCC;
}
#endif
case CUST_MODU_NVRAM:
#ifdef HISI_NVRAM_SUPPORT
ret = read_conf_from_nvram(puc_var, puc_value, size);
#else
ret = read_conf_from_file(puc_var, puc_value, size);
#endif
if (ret < 0)
{
INI_ERROR("read nv_conf failed, ret(%d)", ret);
return INI_FAILED;
}
return INI_SUCC;
default:
{
return ini_find_var_value(modu, puc_var, puc_value, size);
}
}
return INI_SUCC;
}