static int hist_buf_dma(struct ispstat *hist)
{
dma_addr_t dma_addr = hist->active_buf->dma_addr;
struct dma_async_tx_descriptor *tx;
struct dma_slave_config cfg;
dma_cookie_t cookie;
int ret;
if (unlikely(!dma_addr)) {
dev_dbg(hist->isp->dev, "hist: invalid DMA buffer address\n");
goto error;
}
isp_reg_writel(hist->isp, 0, OMAP3_ISP_IOMEM_HIST, ISPHIST_ADDR);
isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT,
ISPHIST_CNT_CLEAR);
omap3isp_flush(hist->isp);
memset(&cfg, 0, sizeof(cfg));
cfg.src_addr = hist->isp->mmio_hist_base_phys + ISPHIST_DATA;
cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
cfg.src_maxburst = hist->buf_size / 4;
ret = dmaengine_slave_config(hist->dma_ch, &cfg);
if (ret < 0) {
dev_dbg(hist->isp->dev,
"hist: DMA slave configuration failed\n");
goto error;
}
tx = dmaengine_prep_slave_single(hist->dma_ch, dma_addr,
hist->buf_size, DMA_DEV_TO_MEM,
DMA_CTRL_ACK);
if (tx == NULL) {
dev_dbg(hist->isp->dev,
"hist: DMA slave preparation failed\n");
goto error;
}
tx->callback = hist_dma_cb;
tx->callback_param = hist;
cookie = tx->tx_submit(tx);
if (dma_submit_error(cookie)) {
dev_dbg(hist->isp->dev, "hist: DMA submission failed\n");
goto error;
}
dma_async_issue_pending(hist->dma_ch);
return STAT_BUF_WAITING_DMA;
error:
hist_reset_mem(hist);
return STAT_NO_BUF;
}
static int hist_buf_dma(struct ispstat *hist)
{
dma_addr_t dma_addr = hist->active_buf->dma_addr;
if (unlikely(!dma_addr)) {
dev_dbg(hist->isp->dev, "hist: invalid DMA buffer address\n");
hist_reset_mem(hist);
return STAT_NO_BUF;
}
isp_reg_writel(hist->isp, 0, OMAP3_ISP_IOMEM_HIST, ISPHIST_ADDR);
isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_CNT,
ISPHIST_CNT_CLEAR);
omap3isp_flush(hist->isp);
hist->dma_config.dst_start = dma_addr;
hist->dma_config.elem_count = hist->buf_size / sizeof(u32);
omap_set_dma_params(hist->dma_ch, &hist->dma_config);
omap_start_dma(hist->dma_ch);
return STAT_BUF_WAITING_DMA;
}
/*
* isp_isr - Interrupt Service Routine for Camera ISP module.
* @irq: Not used currently.
* @_isp: Pointer to the OMAP3 ISP device
*
* Handles the corresponding callback if plugged in.
*
* Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
* IRQ wasn't handled.
*/
static irqreturn_t isp_isr(int irq, void *_isp)
{
static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
IRQ0STATUS_CCDC_LSC_DONE_IRQ |
IRQ0STATUS_CCDC_VD0_IRQ |
IRQ0STATUS_CCDC_VD1_IRQ |
IRQ0STATUS_HS_VS_IRQ;
struct isp_device *isp = _isp;
u32 irqstatus;
int ret;
irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
isp_isr_sbl(isp);
if (irqstatus & IRQ0STATUS_CSIA_IRQ) {
ret = omap3isp_csi2_isr(&isp->isp_csi2a);
if (ret)
isp->isp_ccdc.error = 1;
}
if (irqstatus & IRQ0STATUS_CSIB_IRQ) {
ret = omap3isp_ccp2_isr(&isp->isp_ccp2);
if (ret)
isp->isp_ccdc.error = 1;
}
if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
omap3isp_preview_isr_frame_sync(&isp->isp_prev);
if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
omap3isp_resizer_isr_frame_sync(&isp->isp_res);
omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
omap3isp_stat_isr_frame_sync(&isp->isp_af);
omap3isp_stat_isr_frame_sync(&isp->isp_hist);
}
if (irqstatus & ccdc_events)
omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
omap3isp_resizer_isr_frame_sync(&isp->isp_res);
omap3isp_preview_isr(&isp->isp_prev);
}
if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
omap3isp_resizer_isr(&isp->isp_res);
if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
omap3isp_stat_isr(&isp->isp_aewb);
if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
omap3isp_stat_isr(&isp->isp_af);
if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
omap3isp_stat_isr(&isp->isp_hist);
omap3isp_flush(isp);
#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
isp_isr_dbg(isp, irqstatus);
#endif
return IRQ_HANDLED;
}
