static void notrace dmtimer_update_sched_clock(void)
{
u32 cyc;
cyc = omap_dm_timer_read_counter(gpt_clocksource);
update_sched_clock(&cd, cyc, (u32)~0);
}
static irqreturn_t omap2_irblaster_timer_interrupt_carrier(void)
{
static int toggle=0;
static int next_cycle=0;
struct omap_dm_timer *timer_ctrl = gpt_pwm_list[ IRBLASTER_TIMER_CTRL].timer;
struct omap_dm_timer *timer_pwm = gpt_pwm_list[ IRBLASTER_PWM ].timer;
unsigned int timer_ctrl_period = gpt_pwm_list[ IRBLASTER_TIMER_CTRL].period;
const unsigned int counter_lim = 0xFFFFFFFF+1-(timer_ctrl_period/2)+1;
_gio_debug_clear();
omap_dm_timer_write_status(timer_ctrl, OMAP_TIMER_INT_MATCH);
next_cycle = *irq_irblaster_cycles;
if ( next_cycle ) {
irq_irblaster_cycles++;
gpt_set_new_cycle(timer_ctrl,timer_ctrl_period, next_cycle);
}
if (toggle) {
/* no trigger */
irq_irblaster_pwm_ctrl_reg &= ~(3<<10);
} else {
/* trigger on overflow and match */
/* output carrier */
irq_irblaster_pwm_ctrl_reg |= (2<<10);
}
toggle = (toggle+1)&0x1;
if ( !next_cycle ) {
/* stop timers */
omap_dm_timer_stop(timer_ctrl);
omap_dm_timer_stop(timer_pwm);
/* reset toogle */
toggle=0;
next_cycle=0;
irb_over = 1;
wake_up_interruptible(&irb_wait);
goto intr_end;
}
/* wait for overflow */
/* FIXME: try to find something that leaves cpu some ressources*/
while ( omap_dm_timer_read_counter(timer_ctrl) < counter_lim)
cpu_relax();
/* active/desactive pwm */
omap_dm_timer_write_reg(timer_pwm, OMAP_TIMER_CTRL_REG, irq_irblaster_pwm_ctrl_reg);
intr_end:
_gio_debug_set();
return IRQ_HANDLED;
}
static int pulse_timer_set_timeout(struct lirc_rx51 *lirc_rx51, int usec)
{
int counter;
BUG_ON(usec < 0);
if (lirc_rx51->match == 0)
counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer);
else
counter = lirc_rx51->match;
counter += (u32)(lirc_rx51->fclk_khz * usec / (1000));
omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter);
omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer,
OMAP_TIMER_INT_MATCH);
if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer),
counter)) {
return 1;
}
return 0;
}
/*
* Read from the timer
* For user space
* TESTED
* Returns the value in the timer
* TODO: change the return
*/
unsigned int HRTDriver_read_timer(struct file *file, unsigned int *buffer, size_t count) {
unsigned int time;
int res;
time = omap_dm_timer_read_counter(hrt_devp->gptimer);
res = copy_to_user((void __user *)buffer, (void *)time, 32);
return res;
}
static cycle_t clocksource_read_cycles(struct clocksource *cs)
{
return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource);
}
/*
* Get Time Stamp from the timer.
*/
int get_hrt_time_stamp(void)
{
return omap_dm_timer_read_counter(timer);
}
int request_gptimer12( struct gptimer12_timer *timer )
{
int loop_count;
int empty_slot = -1;
unsigned int next_time = 0;
unsigned int current_time = 0;
//unsigned int temp;
unsigned char update_flag = 0;
// printk("request_gptimer12 called \n");
if ( gptimer12_count >= MAX_GPTIMER12_INSTANCE )
{
printk( "Error... max gptimer12 instance" );
return -1;
}
//CM_ICLKEN_WKUP |= 1 << 1;
cm_val = cm_read_mod_reg( WKUP_MOD, CM_ICLKEN1 );
cm_val = cm_val | ( 1 << 1 );
cm_write_mod_reg( cm_val, WKUP_MOD, CM_ICLKEN1 );
//modify exist entry
for ( loop_count = 0; loop_count < MAX_GPTIMER12_INSTANCE; loop_count++ )
{
if ( timer_manager[loop_count].timer.name != NULL )
{
if( strcmp( timer_manager[loop_count].timer.name, timer->name ) == 0 )
{
//printk("timer update \n");
memcpy( &( timer_manager[loop_count].timer ), timer, sizeof( struct gptimer12_timer ) );
timer_manager[loop_count].remain_time = timer->expire_time;
update_flag = 1;
}
}
}
next_time = timer->expire_time;
if ( update_flag == 0 )
{
//add new entry
for ( loop_count = 0; loop_count < MAX_GPTIMER12_INSTANCE; loop_count++ )
{
if ( ( timer_manager[loop_count].timer.name ) == NULL )
{
empty_slot = loop_count;
break;
}
}
//printk("empty_slot : %d, loop_count : %d\n",empty_slot,loop_count);
if ( empty_slot == -1 )
{
printk("Error.. No empty slot ");
return -1;
}
gptimer12_count++;
memcpy(&(timer_manager[empty_slot].timer),timer, sizeof(struct gptimer12_timer));
timer_manager[empty_slot].remain_time = timer->expire_time;
// printk("test3 : gptimer12_count : %d\n",gptimer12_count);
if ( gptimer12_count == 1 )
{
omap_dm_timer_enable( battery_timer );
prcm_wakeup_event_control( PRCM_GPT12, PRCM_ENABLE );
omap_dm_timer_write_status( battery_timer, OMAP_TIMER_INT_OVERFLOW );
omap_dm_timer_set_int_enable( battery_timer, OMAP_TIMER_INT_OVERFLOW );
for ( loop_count = 0 ; loop_count < MAX_GPTIMER12_INSTANCE ; loop_count++ )
{
if ( timer_manager[loop_count].timer.name != NULL )
timer_manager[loop_count].remain_time -= next_time;
}
omap_dm_timer_set_load_start( battery_timer, 0, 0xffffffff - GP_TIMER12_SEC_TO_TICK(next_time) );
//CM_ICLKEN_WKUP &= ~(1 << 1);
#if 0
cm_val = cm_read_mod_reg(WKUP_MOD,CM_ICLKEN1);
cm_val = cm_val&~(1<<1);
cm_write_mod_reg(cm_val,WKUP_MOD,CM_ICLKEN1);
#endif
timer->active = true;
return 1;
}
}
omap_dm_timer_stop( battery_timer ); //:commented this
#if 1
current_time = GP_TIMER12_TICK_TO_SEC( 0xffffffff - omap_dm_timer_read_counter(battery_timer) );
#endif
for ( loop_count = 0; loop_count < MAX_GPTIMER12_INSTANCE; loop_count++ )
{
timer_manager[loop_count].remain_time += current_time;
#if 0
if((timer_manager[loop_count].timer.name) != 0)
{
if((timer_manager[loop_count].remain_time) == 0)
timer_manager[loop_count].remain_time = current_time;
}
#endif
}
for ( loop_count = 0 ; loop_count < MAX_GPTIMER12_INSTANCE ; loop_count++ )
{
if ( timer_manager[loop_count].timer.name != NULL )
{
next_time = timer_manager[loop_count].remain_time;
break;
}
}
for ( loop_count = 0 ; loop_count < MAX_GPTIMER12_INSTANCE ; loop_count++ )
{
if ( timer_manager[loop_count].timer.name != NULL )
{
if ( next_time > timer_manager[loop_count].remain_time )
next_time = timer_manager[loop_count].remain_time;
}
}
for ( loop_count = 0 ; loop_count < MAX_GPTIMER12_INSTANCE ; loop_count++ )
{
if ( timer_manager[loop_count].timer.name != NULL )
timer_manager[loop_count].remain_time -= next_time;
}
// timer
prcm_wakeup_event_control( PRCM_GPT12, PRCM_ENABLE );
omap_dm_timer_set_int_enable( battery_timer, OMAP_TIMER_INT_OVERFLOW );
omap_dm_timer_set_load_start( battery_timer, 0, 0xffffffff - GP_TIMER12_SEC_TO_TICK(next_time) );
//CM_ICLKEN_WKUP &= ~(1 << 1);
#if 0
cm_val = cm_read_mod_reg(WKUP_MOD,CM_ICLKEN1);
cm_val = cm_val&~(1<<1);
cm_write_mod_reg(cm_val,WKUP_MOD,CM_ICLKEN1);
// printk("requested gptimer12_count : %d \n",gptimer12_count);
#endif
timer->active = true;
return 1;
}
int release_gptimer12(struct gptimer12_timer *timer)
{
int loop_count;
int temp_count;
int slot = -1;
unsigned int next_time=0;
int current_time;
if ( gptimer12_count == 0 )
return -1;
//printk ("\ntest 1 timer_instance_count : %d \n",gptimer12_count);
for ( loop_count = 0; loop_count < MAX_GPTIMER12_INSTANCE ; loop_count++ )
{
if ( timer_manager[loop_count].timer.name != NULL)
{
if( strcmp( timer->name, timer_manager[loop_count].timer.name ) == 0 )
{
slot = loop_count;
break;
}
}
}
if ( slot == -1 )
return -1;
// case : delete current working timer
//CM_ICLKEN_WKUP |= 1 << 1;
cm_val = cm_read_mod_reg( WKUP_MOD, CM_ICLKEN1 );
cm_val = cm_val | ( 1 << 1 );
cm_write_mod_reg( cm_val, WKUP_MOD, CM_ICLKEN1 );
if ( timer_manager[slot].remain_time == 0 )
{
//current timer ..
omap_dm_timer_stop( battery_timer );
current_time = GP_TIMER12_TICK_TO_SEC( 0xffffffff - omap_dm_timer_read_counter( battery_timer ) );
//printk("test1 current_time : %d\n",current_time);
for ( loop_count = 0; loop_count < MAX_GPTIMER12_INSTANCE; loop_count++ )
{
timer_manager[loop_count].remain_time += current_time;
#if 0
if((timer_manager[loop_count].timer.name) != 0)
{
if((timer_manager[loop_count].remain_time) == 0)
timer_manager[loop_count].remain_time = current_time;
}
#endif
}
}
memset ( &( timer_manager[slot] ), 0, sizeof( struct gptimer12_manager ) );
gptimer12_count--;
if( gptimer12_count < 0 )
gptimer12_count = 0;
//printk("released : timer_instance_count : %d\n",gptimer12_count);
if ( gptimer12_count == 0 )
{
//printk("\n\n M timer empty .. \n");
prcm_wakeup_event_control( PRCM_GPT12, PRCM_DISABLE ); //egkim
finish_gptimer12(); //egkim
omap_dm_timer_disable( battery_timer );
//CM_ICLKEN_WKUP &= ~(1 << 1);
cm_val = cm_read_mod_reg( WKUP_MOD, CM_ICLKEN1 );
cm_val = cm_val & ~( 1 << 1 );
cm_write_mod_reg( cm_val, WKUP_MOD,CM_ICLKEN1 );
/* change active state. */
timer->active = false;
return 0;
}
for ( temp_count = 0 ; temp_count < MAX_GPTIMER12_INSTANCE ; temp_count++ )
{
if( timer_manager[temp_count].timer.name != NULL )
{
next_time = timer_manager[temp_count].remain_time;
break;
}
}
for ( temp_count = 0 ; temp_count < MAX_GPTIMER12_INSTANCE ; temp_count++ )
{
if ( timer_manager[temp_count].timer.name != NULL )
{
next_time = timer_manager[temp_count].remain_time;
break;
}
}
for ( loop_count = 0 ; loop_count < MAX_GPTIMER12_INSTANCE ; loop_count++ )
{
if( timer_manager[loop_count].timer.name != NULL )
{
if ( next_time > timer_manager[loop_count].remain_time )
next_time = timer_manager[loop_count].remain_time;
}
}
for ( loop_count = 0 ; loop_count < MAX_GPTIMER12_INSTANCE ; loop_count++ )
{
if( timer_manager[loop_count].timer.name != NULL )
timer_manager[loop_count].remain_time -= next_time;
}
printk( "\n\n\n next timeout : %d\n",next_time );
prcm_wakeup_event_control( PRCM_GPT12, PRCM_ENABLE );
omap_dm_timer_set_load_start( battery_timer, 0, 0xffffffff - GP_TIMER12_SEC_TO_TICK(next_time) );
//CM_ICLKEN_WKUP &= ~(1 << 1);
cm_val = cm_read_mod_reg( WKUP_MOD, CM_ICLKEN1 );
cm_val = cm_val & ~( 1 << 1 );
cm_write_mod_reg( cm_val, WKUP_MOD,CM_ICLKEN1 );
timer->active = false;
return 0;
}
/*
* Get timer value
* For kernel space
* Returns the value in the timer
*/
unsigned int HRTDriver_get_timer_value(void) {
return omap_dm_timer_read_counter(hrt_devp->gptimer);
}
