Exemple #1
0
static int __init omap2_common_pm_init(void)
{
	omap2_init_processor_devices();
	omap_pm_if_init();

	return 0;
}
Exemple #2
0
void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
				 struct omap_sdrc_params *sdrc_cs1,
				 struct omap_opp *mpu_opps,
				 struct omap_opp *dsp_opps,
				 struct omap_opp *l3_opps)
{
	struct omap_hwmod **hwmods = NULL;

	if (cpu_is_omap2420())
		hwmods = omap2420_hwmods;
	else if (cpu_is_omap2430())
		hwmods = omap2430_hwmods;
	else if (cpu_is_omap34xx())
		hwmods = omap34xx_hwmods;

#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
	/* The OPP tables have to be registered before a clk init */
	omap_hwmod_init(hwmods);
	omap2_mux_init();
	omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
	pwrdm_init(powerdomains_omap);
	clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
#endif
	omap2_clk_init();
	omap_serial_early_init();
#ifndef CONFIG_ARCH_OMAP4
	omap_hwmod_late_init();
	omap_pm_if_init();
	if (!cpu_is_omap3505() && !cpu_is_omap3517()) {
		omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
		_omap2_init_reprogram_sdrc();
	}
#endif
	gpmc_init();
}
Exemple #3
0
void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
                                 struct omap_sdrc_params *sdrc_cs1)
{
    struct omap_hwmod **hwmods = NULL;

    if (cpu_is_omap2420())
        hwmods = omap2420_hwmods;
    else if (cpu_is_omap2430())
        hwmods = omap2430_hwmods;
    else if (cpu_is_omap34xx())
        hwmods = omap34xx_hwmods;

#ifndef CONFIG_ARCH_OMAP4

    omap_hwmod_init(hwmods);
    omap2_mux_init();
    omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
    pwrdm_init(powerdomains_omap);
    clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
    omap2_clk_init();
#endif
    omap_serial_early_init();
#ifndef CONFIG_ARCH_OMAP4
    omap_hwmod_late_init();
    omap_pm_if_init();
    omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
    _omap2_init_reprogram_sdrc();
#endif
    gpmc_init();
}
Exemple #4
0
static int __init omap2_common_pm_init(void)
{
	if (!of_have_populated_dt())
		omap2_init_processor_devices();
	omap_pm_if_init();

	return 0;
}
static int __init omap2_common_pm_init(void)
{
	omap2_init_processor_devices();
	if (cpu_is_omap34xx())
		omap3_pm_init_opp_table();
	else if (cpu_is_omap44xx())
		omap4_pm_init_opp_table();

	omap_pm_if_init();

	return 0;
}
Exemple #6
0
static int __init omap2_common_pm_init(void)
{
	omap2_init_processor_devices();
	if (cpu_is_omap34xx())
		omap3_pm_init_opp_table();
	else if (cpu_is_omap44xx())
		omap4_pm_init_opp_table();

	omap_pm_if_init();

#ifdef CONFIG_OMAP_PM
	{
		int error = -EINVAL;

		error = sysfs_create_file(power_kobj, &dsp_freq_attr.attr);
		if (error) {
			printk(KERN_ERR "%s: sysfs_create_file(dsp_freq) failed %d\n", __func__, error);
			return error;
		}
		error = sysfs_create_file(power_kobj, &vdd1_opp_attr.attr);
		if (error) {
			printk(KERN_ERR "%s: sysfs_create_file(vdd1_opp) failed %d\n", __func__, error);
			return error;
		}
		error = sysfs_create_file(power_kobj, &vdd2_opp_attr.attr);
		if (error) {
			printk(KERN_ERR "%s: sysfs_create_file(vdd2_opp) failed %d\n", __func__, error);
			return error;
		}
		error = sysfs_create_file(power_kobj, &vdd1_lock_attr.attr);
		if (error) {
			printk(KERN_ERR "%s: sysfs_create_file(vdd1_lock) failed %d\n", __func__ ,error);
			return error;
		}
		error = sysfs_create_file(power_kobj, &vdd2_lock_attr.attr);
		if (error) {
			printk(KERN_ERR "%s: sysfs_create_file(vdd2_lock) failed %d\n", __func__, error);
			return error;
		}
        error = sysfs_create_file(power_kobj, &tick_control_attr.attr);
        if (error) {
            printk(KERN_ERR "%s: sysfs_create_file(tick_control) failed: %d\n", __func__, error);
            return error;
        }
	}
#endif

	return 0;
}
void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
				 struct omap_sdrc_params *sdrc_cs1)
{
	pwrdm_init(powerdomains_omap);
	clkdm_init(clockdomains_omap, clkdm_autodeps);
	if (cpu_is_omap242x())
		omap2420_hwmod_init();
	else if (cpu_is_omap243x())
		omap2430_hwmod_init();
	else if (cpu_is_omap34xx())
		omap3xxx_hwmod_init();
	omap2_mux_init();
	/* The OPP tables have to be registered before a clk init */
	omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);

	if (cpu_is_omap2420())
		omap2420_clk_init();
	else if (cpu_is_omap2430())
		omap2430_clk_init();
	else if (cpu_is_omap34xx())
		omap3xxx_clk_init();
	else if (cpu_is_omap44xx())
		omap4xxx_clk_init();
	else
		pr_err("Could not init clock framework - unknown CPU\n");

	omap_serial_early_init();
	if (cpu_is_omap24xx() || cpu_is_omap34xx())   /* FIXME: OMAP4 */
		omap_hwmod_late_init();
	omap_pm_if_init();
	if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
		omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
		_omap2_init_reprogram_sdrc();
	}
	gpmc_init();
}