Exemple #1
0
void m58846_device::execute_one()
{
	// handle one opcode
	switch (m_op & 0x1f0)
	{
		case 0x30: op_sey(); break;
		case 0x70: op_sp(); break;
		case 0xa0: op_a(); break;
		case 0xb0: op_la(); break;

		case 0xc0: case 0xd0: case 0xe0: case 0xf0: op_lxy(); break;

		default:
			switch (m_op & 0x1fc)
			{
		case 0x20: op_szb(); break;
		case 0x4c: op_sb(); break;
		case 0x58: op_szk(); break;
		case 0x5c: op_rb(); break;
		case 0x60: op_xam(); break;
		case 0x64: op_tam(); break;
		case 0x68: op_xamd(); break;
		case 0x6c: op_xami(); break;

		default:
			switch (m_op)
			{
		case 0x06: case 0x07: op_su(); break;
		case 0x40: case 0x41: op_lcps(); break;
		case 0x4a: case 0x4b: op_lz(); break;
		case 0x54: case 0x55: op_ias(); break;

		case 0x00: op_nop(); break;
		case 0x01: op_ba(); break;
		case 0x02: op_iny(); break;
		case 0x03: op_dey(); break;
		case 0x04: op_di(); break;
		case 0x05: op_ei(); break;
		case 0x09: op_tabe(); break; // undocumented
		case 0x0a: op_am(); break;
		case 0x0b: op_ose(); break;
		case 0x0c: op_tya(); break;
		case 0x0f: op_cma(); break;

		case 0x10: op_cls(); break;
		case 0x11: op_clds(); break;
		case 0x13: op_cld(); break;
		case 0x14: op_rd(); break;
		case 0x15: op_sd(); break;
		case 0x16: op_tepa(); break;
		case 0x17: op_ospa(); break;
		case 0x18: op_rl(); break; // undocumented
		case 0x19: op_rr(); break; // undocumented
		case 0x1a: op_teab(); break;
		case 0x1b: op_osab(); break;
		case 0x1c: op_tba(); break;
		case 0x1d: op_tay(); break;
		case 0x1e: op_tab(); break;

		case 0x26: op_seam(); break;
		case 0x2b: op_szd(); break;
		case 0x2f: op_szc(); break;

		case 0x43: op_amc(); break;
		case 0x44: op_rt(); break;
		case 0x45: op_rts(); break;
		case 0x46: op_rti(); break;
		case 0x48: op_rc(); break;
		case 0x49: op_sc(); break;

		case 0x53: op_amcs(); break;
		case 0x57: op_iak(); break;

		case 0x81: op_ofa(); break;
		case 0x82: op_snz1(); break;
		case 0x83: op_snz2(); break;
		case 0x84: op_oga(); break;
		case 0x85: op_t2ab(); break;
		case 0x86: op_tva(); break;
		case 0x8a: op_tab2(); break;
		case 0x8c: op_iaf(); break;

		default:
			melps4_cpu_device::execute_one();
			break;

			}
			break; // 0x1ff

			}
			break; // 0x1fc

	} // big switch
}
void opcode_jump (void)
{
	error = E_UNKNOWN_OPCODE;
	//fda group
	if (strcmp( (char *)token,"addwf")==0)		error = op_addwf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"addwfc")==0)		error = op_addwfc((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"andwf")==0)		error = op_andwf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"comf")==0)		error = op_comf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"decf")==0)		error = op_decf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"decfsz")==0)		error = op_decfsz((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"dcfsnz")==0)		error = op_dcfsnz((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"incf")==0)		error = op_incf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"incfsz")==0)		error = op_incfsz((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"infsnz")==0)		error = op_infsnz((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"iorwf")==0)		error = op_iorwf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"movf")==0)		error = op_movf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"rlcf")==0)		error = op_rlcf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"rlncf")==0)		error = op_rlncf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"rrcf")==0)		error = op_rrcf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"rrncf")==0)		error = op_rrncf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"subfwb")==0)		error = op_subfwb((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"subwf")==0)		error = op_subwf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"subwfb")==0)		error = op_subwfb((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"swapf")==0)		error = op_swapf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"xorwf")==0)		error = op_xorwf((unsigned char *) file_line,token_len);
	//fa group
	if (strcmp( (char *)token,"clrf")==0)		error = op_clrf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"cpfseq")==0)		error = op_cpfseq((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"cpfsgt")==0)		error = op_cpfsgt((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"cpfslt")==0)		error = op_cpfslt((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"movwf")==0)		error = op_movwf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"mulwf")==0)		error = op_mulwf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"negf")==0)		error = op_negf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"setf")==0)		error = op_setf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tstfsz")==0)		error = op_tstfsz((unsigned char *) file_line,token_len);
	//movff
	if (strcmp( (char *)token,"movff")==0)		error = op_movff((unsigned char *) file_line,token_len);
	//fba group
	if (strcmp( (char *)token,"bcf")==0)		error = op_bcf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"bsf")==0)		error = op_bsf((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"btfsc")==0)		error = op_btfsc((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"btfss")==0)		error = op_btfss((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"btg")==0)		error = op_btg((unsigned char *) file_line,token_len);
	//one byte (literal, control) group - decide if relative / absolute
	if (strcmp( (char *)token,"bc")==0)			error = op_bc((unsigned char *) file_line,token_len,addr,replaced);
	if (strcmp( (char *)token,"bn")==0)			error = op_bn((unsigned char *) file_line,token_len,addr,replaced);
	if (strcmp( (char *)token,"bnc")==0)		error = op_bnc((unsigned char *) file_line,token_len,addr,replaced);
	if (strcmp( (char *)token,"bnn")==0)		error = op_bnn((unsigned char *) file_line,token_len,addr,replaced);
	if (strcmp( (char *)token,"bnov")==0)		error = op_bnov((unsigned char *) file_line,token_len,addr,replaced);
	if (strcmp( (char *)token,"bnz")==0)		error = op_bnz((unsigned char *) file_line,token_len,addr,replaced);
	if (strcmp( (char *)token,"bov")==0)		error = op_bov((unsigned char *) file_line,token_len,addr,replaced);
	if (strcmp( (char *)token,"bz")==0)			error = op_bz((unsigned char *) file_line,token_len,addr,replaced);

	if (strcmp( (char *)token,"rcall")==0)		error = op_rcall((unsigned char *) file_line,token_len,addr,replaced);
	if (strcmp( (char *)token,"bra")==0)		error = op_bra((unsigned char *) file_line,token_len,addr,replaced);
	//no decision
	if (strcmp( (char *)token,"retlw")==0)		error = op_retlw((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"addlw")==0)		error = op_addlw((unsigned char *) file_line,token_len);	
	if (strcmp( (char *)token,"andlw")==0)		error = op_andlw((unsigned char *) file_line,token_len);	
	if (strcmp( (char *)token,"iorlw")==0)		error = op_iorlw((unsigned char *) file_line,token_len);	
	if (strcmp( (char *)token,"movlb")==0)		error = op_movlb((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"movlw")==0)		error = op_movlw((unsigned char *) file_line,token_len);	
	if (strcmp( (char *)token,"mullw")==0)		error = op_mullw((unsigned char *) file_line,token_len);	
	if (strcmp( (char *)token,"sublw")==0)		error = op_sublw((unsigned char *) file_line,token_len);	
	if (strcmp( (char *)token,"xorlw")==0)		error = op_xorlw((unsigned char *) file_line,token_len);	
	//goto/call - 2 byte with 16 bit variable
	if (strcmp( (char *)token,"call")==0)		error = op_call((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"goto")==0)		error = op_goto((unsigned char *) file_line,token_len);
	//lfsr
	if (strcmp( (char *)token,"lfsr")==0)		error = op_lfsr((unsigned char *) file_line,token_len);
	//no suffix after opcode
	if (strcmp( (char *)token,"clrwdt")==0)		error = op_clrwdt((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"daw")==0)		error = op_daw((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"nop")==0)		error = op_nop((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"pop")==0)		error = op_pop((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"push")==0)		error = op_push((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"reset")==0)		error = op_reset((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"retfie")==0)		error = op_retfie((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"return")==0)		error = op_return((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"sleep")==0)		error = op_sleep((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tblrd*")==0)		error = op_tblrd((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tblrd*+")==0)	error = op_tblrdpi((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tblrd*-")==0)	error = op_tblrdpd((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tblrd+*")==0)	error = op_tblrdip((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tblwt*")==0)		error = op_tblwt((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tblwt*+")==0)	error = op_tblwtpi((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tblwt*-")==0)	error = op_tblwtpd((unsigned char *) file_line,token_len);
	if (strcmp( (char *)token,"tblwt+*")==0)	error = op_tblwtip((unsigned char *) file_line,token_len);

}
Exemple #3
0
void CPU::op_exec() {
  uint8 opcode = op_readpci();
  switch(opcode) {
    case 0x00: return op_brk();
    case 0x01: return opi_read_indirect_zero_page_x<&CPU::opf_ora>();
  I case 0x04: return opill_nop_zero_page();
    case 0x05: return opi_read_zero_page<&CPU::opf_ora>();
    case 0x06: return opi_rmw_zero_page<&CPU::opf_asl>();
    case 0x08: return op_php();
    case 0x09: return opi_read_immediate<&CPU::opf_ora>();
    case 0x0a: return opi_shift<&CPU::opf_sla>();
  I case 0x0c: return opill_nop_absolute();
    case 0x0d: return opi_read_absolute<&CPU::opf_ora>();
    case 0x0e: return opi_rmw_absolute<&CPU::opf_asl>();
    case 0x10: return opi_branch(regs.p.n == 0);
    case 0x11: return opi_read_indirect_zero_page_y<&CPU::opf_ora>();
  I case 0x14: return opill_nop_zero_page_x();
    case 0x15: return opi_read_zero_page_x<&CPU::opf_ora>();
    case 0x16: return opi_rmw_zero_page_x<&CPU::opf_asl>();
    case 0x18: return opi_clear_flag(regs.p.c);
    case 0x19: return opi_read_absolute_y<&CPU::opf_ora>();
  I case 0x1a: return opill_nop_implied();
  I case 0x1c: return opill_nop_absolute_x();
    case 0x1d: return opi_read_absolute_x<&CPU::opf_ora>();
    case 0x1e: return opi_rmw_absolute_x<&CPU::opf_asl>();
    case 0x20: return op_jsr_absolute();
    case 0x21: return opi_read_indirect_zero_page_x<&CPU::opf_and>();
    case 0x24: return opi_read_zero_page<&CPU::opf_bit>();
    case 0x25: return opi_read_zero_page<&CPU::opf_and>();
    case 0x26: return opi_rmw_zero_page<&CPU::opf_rol>();
    case 0x28: return op_plp();
    case 0x29: return opi_read_immediate<&CPU::opf_and>();
    case 0x2a: return opi_shift<&CPU::opf_rla>();
    case 0x2c: return opi_read_absolute<&CPU::opf_bit>();
    case 0x2d: return opi_read_absolute<&CPU::opf_and>();
    case 0x2e: return opi_rmw_absolute<&CPU::opf_rol>();
    case 0x30: return opi_branch(regs.p.n == 1);
    case 0x31: return opi_read_indirect_zero_page_y<&CPU::opf_and>();
  I case 0x34: return opill_nop_zero_page_x();
    case 0x35: return opi_read_zero_page_x<&CPU::opf_and>();
    case 0x36: return opi_rmw_zero_page_x<&CPU::opf_rol>();
    case 0x38: return opi_set_flag(regs.p.c);
    case 0x39: return opi_read_absolute_y<&CPU::opf_and>();
  I case 0x3a: return opill_nop_implied();
  I case 0x3c: return opill_nop_absolute_x();
    case 0x3d: return opi_read_absolute_x<&CPU::opf_and>();
    case 0x3e: return opi_rmw_absolute_x<&CPU::opf_rol>();
    case 0x40: return op_rti();
    case 0x41: return opi_read_indirect_zero_page_x<&CPU::opf_eor>();
  I case 0x44: return opill_nop_zero_page();
    case 0x45: return opi_read_zero_page<&CPU::opf_eor>();
    case 0x46: return opi_rmw_zero_page<&CPU::opf_lsr>();
    case 0x48: return opi_push(regs.a);
    case 0x49: return opi_read_immediate<&CPU::opf_eor>();
    case 0x4a: return opi_shift<&CPU::opf_sra>();
    case 0x4c: return op_jmp_absolute();
    case 0x4d: return opi_read_absolute<&CPU::opf_eor>();
    case 0x4e: return opi_rmw_absolute<&CPU::opf_lsr>();
    case 0x50: return opi_branch(regs.p.v == 0);
    case 0x51: return opi_read_indirect_zero_page_y<&CPU::opf_eor>();
  I case 0x54: return opill_nop_zero_page_x();
    case 0x55: return opi_read_zero_page_x<&CPU::opf_eor>();
    case 0x56: return opi_rmw_zero_page_x<&CPU::opf_lsr>();
    case 0x58: return opi_clear_flag(regs.p.i);
    case 0x59: return opi_read_absolute_y<&CPU::opf_eor>();
  I case 0x5a: return opill_nop_implied();
  I case 0x5c: return opill_nop_absolute_x();
    case 0x5d: return opi_read_absolute_x<&CPU::opf_eor>();
    case 0x5e: return opi_rmw_absolute_x<&CPU::opf_lsr>();
    case 0x60: return op_rts();
    case 0x61: return opi_read_indirect_zero_page_x<&CPU::opf_adc>();
  I case 0x64: return opill_nop_zero_page();
    case 0x65: return opi_read_zero_page<&CPU::opf_adc>();
    case 0x66: return opi_rmw_zero_page<&CPU::opf_ror>();
    case 0x68: return opi_pull(regs.a);
    case 0x69: return opi_read_immediate<&CPU::opf_adc>();
    case 0x6a: return opi_shift<&CPU::opf_rra>();
  I case 0x6b: return opill_arr_immediate();
    case 0x6c: return op_jmp_indirect_absolute();
    case 0x6d: return opi_read_absolute<&CPU::opf_adc>();
    case 0x6e: return opi_rmw_absolute<&CPU::opf_ror>();
    case 0x70: return opi_branch(regs.p.v == 1);
  I case 0x74: return opill_nop_zero_page_x();
    case 0x71: return opi_read_indirect_zero_page_y<&CPU::opf_adc>();
    case 0x75: return opi_read_zero_page_x<&CPU::opf_adc>();
    case 0x76: return opi_rmw_zero_page_x<&CPU::opf_ror>();
    case 0x78: return opi_set_flag(regs.p.i);
    case 0x79: return opi_read_absolute_y<&CPU::opf_adc>();
  I case 0x7a: return opill_nop_implied();
  I case 0x7c: return opill_nop_absolute_x();
    case 0x7d: return opi_read_absolute_x<&CPU::opf_adc>();
    case 0x7e: return opi_rmw_absolute_x<&CPU::opf_ror>();
  I case 0x80: return opill_nop_absolute();
    case 0x81: return opi_store_indirect_zero_page_x(regs.a);
  I case 0x82: return opill_nop_immediate();
    case 0x84: return opi_store_zero_page(regs.y);
    case 0x85: return opi_store_zero_page(regs.a);
    case 0x86: return opi_store_zero_page(regs.x);
    case 0x88: return opi_decrement(regs.y);
  I case 0x89: return opill_nop_immediate();
    case 0x8a: return opi_transfer(regs.x, regs.a, 1);
    case 0x8c: return opi_store_absolute(regs.y);
    case 0x8d: return opi_store_absolute(regs.a);
    case 0x8e: return opi_store_absolute(regs.x);
    case 0x90: return opi_branch(regs.p.c == 0);
    case 0x91: return opi_store_indirect_zero_page_y(regs.a);
    case 0x94: return opi_store_zero_page_x(regs.y);
    case 0x95: return opi_store_zero_page_x(regs.a);
    case 0x96: return opi_store_zero_page_y(regs.x);
    case 0x98: return opi_transfer(regs.y, regs.a, 1);
    case 0x99: return opi_store_absolute_y(regs.a);
    case 0x9a: return opi_transfer(regs.x, regs.s, 0);
    case 0x9d: return opi_store_absolute_x(regs.a);
    case 0xa0: return opi_read_immediate<&CPU::opf_ldy>();
    case 0xa1: return opi_read_indirect_zero_page_x<&CPU::opf_lda>();
    case 0xa2: return opi_read_immediate<&CPU::opf_ldx>();
    case 0xa4: return opi_read_zero_page<&CPU::opf_ldy>();
    case 0xa5: return opi_read_zero_page<&CPU::opf_lda>();
    case 0xa6: return opi_read_zero_page<&CPU::opf_ldx>();
    case 0xa8: return opi_transfer(regs.a, regs.y, 1);
    case 0xa9: return opi_read_immediate<&CPU::opf_lda>();
    case 0xaa: return opi_transfer(regs.a, regs.x, 1);
    case 0xac: return opi_read_absolute<&CPU::opf_ldy>();
    case 0xad: return opi_read_absolute<&CPU::opf_lda>();
    case 0xae: return opi_read_absolute<&CPU::opf_ldx>();
    case 0xb0: return opi_branch(regs.p.c == 1);
    case 0xb1: return opi_read_indirect_zero_page_y<&CPU::opf_lda>();
    case 0xb4: return opi_read_zero_page_x<&CPU::opf_ldy>();
    case 0xb5: return opi_read_zero_page_x<&CPU::opf_lda>();
    case 0xb6: return opi_read_zero_page_y<&CPU::opf_ldx>();
    case 0xb8: return opi_clear_flag(regs.p.v);
    case 0xb9: return opi_read_absolute_y<&CPU::opf_lda>();
    case 0xba: return opi_transfer(regs.s, regs.x, 1);
    case 0xbc: return opi_read_absolute_x<&CPU::opf_ldy>();
    case 0xbd: return opi_read_absolute_x<&CPU::opf_lda>();
    case 0xbe: return opi_read_absolute_y<&CPU::opf_ldx>();
    case 0xc0: return opi_read_immediate<&CPU::opf_cpy>();
    case 0xc1: return opi_read_indirect_zero_page_x<&CPU::opf_cmp>();
  I case 0xc2: return opill_nop_immediate();
    case 0xc4: return opi_read_zero_page<&CPU::opf_cpy>();
    case 0xc5: return opi_read_zero_page<&CPU::opf_cmp>();
    case 0xc6: return opi_rmw_zero_page<&CPU::opf_dec>();
    case 0xc8: return opi_increment(regs.y);
    case 0xc9: return opi_read_immediate<&CPU::opf_cmp>();
    case 0xca: return opi_decrement(regs.x);
    case 0xcc: return opi_read_absolute<&CPU::opf_cpy>();
    case 0xcd: return opi_read_absolute<&CPU::opf_cmp>();
    case 0xce: return opi_rmw_absolute<&CPU::opf_dec>();
    case 0xd0: return opi_branch(regs.p.z == 0);
    case 0xd1: return opi_read_indirect_zero_page_y<&CPU::opf_cmp>();
  I case 0xd4: return opill_nop_zero_page_x();
    case 0xd5: return opi_read_zero_page_x<&CPU::opf_cmp>();
    case 0xd6: return opi_rmw_zero_page_x<&CPU::opf_dec>();
    case 0xd8: return opi_clear_flag(regs.p.d);
    case 0xd9: return opi_read_absolute_y<&CPU::opf_cmp>();
  I case 0xda: return opill_nop_implied();
  I case 0xdc: return opill_nop_absolute_x();
    case 0xdd: return opi_read_absolute_x<&CPU::opf_cmp>();
    case 0xde: return opi_rmw_absolute_x<&CPU::opf_dec>();
    case 0xe0: return opi_read_immediate<&CPU::opf_cpx>();
    case 0xe1: return opi_read_indirect_zero_page_x<&CPU::opf_sbc>();
  I case 0xe2: return opill_nop_immediate();
    case 0xe4: return opi_read_zero_page<&CPU::opf_cpx>();
    case 0xe5: return opi_read_zero_page<&CPU::opf_sbc>();
    case 0xe6: return opi_rmw_zero_page<&CPU::opf_inc>();
    case 0xe8: return opi_increment(regs.x);
    case 0xe9: return opi_read_immediate<&CPU::opf_sbc>();
    case 0xea: return op_nop();
  I case 0xeb: return opi_read_immediate<&CPU::opf_sbc>();
    case 0xec: return opi_read_absolute<&CPU::opf_cpx>();
    case 0xed: return opi_read_absolute<&CPU::opf_sbc>();
    case 0xee: return opi_rmw_absolute<&CPU::opf_inc>();
    case 0xf0: return opi_branch(regs.p.z == 1);
    case 0xf1: return opi_read_indirect_zero_page_y<&CPU::opf_sbc>();
  I case 0xf4: return opill_nop_zero_page_x();
    case 0xf5: return opi_read_zero_page_x<&CPU::opf_sbc>();
    case 0xf6: return opi_rmw_zero_page_x<&CPU::opf_inc>();
    case 0xf8: return opi_set_flag(regs.p.d);
    case 0xf9: return opi_read_absolute_y<&CPU::opf_sbc>();
  I case 0xfa: return opill_nop_implied();
  I case 0xfc: return opill_nop_absolute_x();
    case 0xfd: return opi_read_absolute_x<&CPU::opf_sbc>();
    case 0xfe: return opi_rmw_absolute_x<&CPU::opf_inc>();
  }

//return op_nop();

  regs.pc--;
  print("Unimplemented opcode: ", hex<4>(regs.pc), " = ", hex<2>(bus.read(regs.pc)), "\n");
  while(true) scheduler.exit(Scheduler::ExitReason::UnknownEvent);
}
Exemple #4
0
void amis2000_base_device::execute_run()
{
	while (m_icount > 0)
	{
		m_icount--;

		// remember previous opcode
		m_prev_op = m_op;

		debugger_instruction_hook(this, m_pc);
		m_op = m_program->read_byte(m_pc);
		m_pc = (m_pc + 1) & 0x1fff;

		if (m_skip)
		{
			// always skip over PP prefix
			m_skip = ((m_op & 0xf0) == 0x60);
			m_op = 0; // nop
		}

		switch (m_op & 0xf0)
		{
			case 0x50: op_adis(); break;
			case 0x60: op_pp(); break;
			case 0x70: op_lai(); break;

			case 0x80: case 0x90: case 0xa0: case 0xb0: op_jms(); break;
			case 0xc0: case 0xd0: case 0xe0: case 0xf0: op_jmp(); break;

			default:
				switch (m_op)
				{
			case 0x00: op_nop(); break;
			case 0x01: op_halt(); break;
			case 0x02: op_rt(); break;
			case 0x03: op_rts(); break;
			case 0x04: op_psh(); break;
			case 0x05: op_psl(); break;
			case 0x06: op_and(); break;
			case 0x07: op_sos(); break;
			case 0x08: op_sbe(); break;
			case 0x09: op_szc(); break;
			case 0x0a: op_stc(); break;
			case 0x0b: op_rsc(); break;
			case 0x0c: op_lae(); break;
			case 0x0d: op_xae(); break;
			case 0x0e: op_inp(); break;
			case 0x0f: op_eur(); break;
			case 0x10: op_cma(); break;
			case 0x11: op_xabu(); break;
			case 0x12: op_lab(); break;
			case 0x13: op_xab(); break;
			case 0x14: op_adcs(); break;
			case 0x15: op_xor(); break;
			case 0x16: op_add(); break;
			case 0x17: op_sam(); break;
			case 0x18: op_disb(); break;
			case 0x19: op_mvs(); break;
			case 0x1a: op_out(); break;
			case 0x1b: op_disn(); break;

			case 0x28: op_szk(); break;
			case 0x29: op_szi(); break;
			case 0x2a: op_rf1(); break;
			case 0x2b: op_sf1(); break;
			case 0x2c: op_rf2(); break;
			case 0x2d: op_sf2(); break;
			case 0x2e: op_tf1(); break;
			case 0x2f: op_tf2(); break;

			default:
				switch (m_op & 0xfc)
				{
			case 0x1c: op_szm(); break;
			case 0x20: op_stm(); break;
			case 0x24: op_rsm(); break;

			case 0x30: op_xci(); break;
			case 0x34: op_xcd(); break;
			case 0x38: op_xc(); break;
			case 0x3c: op_lam(); break;
			case 0x40: op_lbz(); break;
			case 0x44: op_lbf(); break;
			case 0x48: op_lbe(); break;
			case 0x4c: op_lbep(); break;
				}
				break; // 0xfc

				}
				break; // 0xff

		} // big switch
	}
}
Exemple #5
0
void ucom4_cpu_device::execute_run()
{
	while (m_icount > 0)
	{
		m_icount--;

		// remember previous opcode
		m_prev_op = m_op;

		// handle interrupt - it not accepted during LI($9x) or EI($31), or while skipping
		if (m_int_f && m_inte_f && (m_prev_op & 0xf0) != 0x90 && m_prev_op != 0x31 && !m_skip)
		{
			m_icount--;
			push_stack();
			m_pc = 0xf << 2;
			m_int_f = 0;
			m_inte_f = (m_family == NEC_UCOM43) ? 0 : 1;

			standard_irq_callback(0);
		}

		// fetch next opcode
		debugger_instruction_hook(this, m_pc);
		m_op = m_program->read_byte(m_pc);
		m_bitmask = 1 << (m_op & 0x03);
		increment_pc();
		fetch_arg();

		if (m_skip)
		{
			m_skip = false;
			m_op = 0; // nop
		}

		// handle opcode
		switch (m_op & 0xf0)
		{
			case 0x80: op_ldz(); break;
			case 0x90: op_li(); break;
			case 0xa0: op_jmpcal(); break;
			case 0xb0: op_czp(); break;

			case 0xc0: case 0xd0: case 0xe0: case 0xf0: op_jcp(); break;

			default:
				switch (m_op)
				{
			case 0x00: op_nop(); break;
			case 0x01: op_di(); break;
			case 0x02: op_s(); break;
			case 0x03: op_tit(); break;
			case 0x04: op_tc(); break;
			case 0x05: op_ttm(); break;
			case 0x06: op_daa(); break;
			case 0x07: op_tal(); break;
			case 0x08: op_ad(); break;
			case 0x09: op_ads(); break;
			case 0x0a: op_das(); break;
			case 0x0b: op_clc(); break;
			case 0x0c: op_cm(); break;
			case 0x0d: op_inc(); break;
			case 0x0e: op_op(); break;
			case 0x0f: op_dec(); break;
			case 0x10: op_cma(); break;
			case 0x11: op_cia(); break;
			case 0x12: op_tla(); break;
			case 0x13: op_ded(); break;
			case 0x14: op_stm(); break;
			case 0x15: op_ldi(); break;
			case 0x16: op_cli(); break;
			case 0x17: op_ci(); break;
			case 0x18: op_exl(); break;
			case 0x19: op_adc(); break;
			case 0x1a: op_xc(); break;
			case 0x1b: op_stc(); break;
			case 0x1c: op_illegal(); break;
			case 0x1d: op_inm(); break;
			case 0x1e: op_ocd(); break;
			case 0x1f: op_dem(); break;

			case 0x30: op_rar(); break;
			case 0x31: op_ei(); break;
			case 0x32: op_ip(); break;
			case 0x33: op_ind(); break;

			case 0x40: op_ia(); break;
			case 0x41: op_jpa(); break;
			case 0x42: op_taz(); break;
			case 0x43: op_taw(); break;
			case 0x44: op_oe(); break;
			case 0x45: op_illegal(); break;
			case 0x46: op_tly(); break;
			case 0x47: op_thx(); break;
			case 0x48: op_rt(); break;
			case 0x49: op_rts(); break;
			case 0x4a: op_xaz(); break;
			case 0x4b: op_xaw(); break;
			case 0x4c: op_xls(); break;
			case 0x4d: op_xhr(); break;
			case 0x4e: op_xly(); break;
			case 0x4f: op_xhx(); break;

			default:
				switch (m_op & 0xfc)
				{
			case 0x20: op_fbf(); break;
			case 0x24: op_tab(); break;
			case 0x28: op_xm(); break;
			case 0x2c: op_xmd(); break;

			case 0x34: op_cmb(); break;
			case 0x38: op_lm(); break;
			case 0x3c: op_xmi(); break;

			case 0x50: op_tpb(); break;
			case 0x54: op_tpa(); break;
			case 0x58: op_tmb(); break;
			case 0x5c: op_fbt(); break;
			case 0x60: op_rpb(); break;
			case 0x64: op_reb(); break;
			case 0x68: op_rmb(); break;
			case 0x6c: op_rfb(); break;
			case 0x70: op_spb(); break;
			case 0x74: op_seb(); break;
			case 0x78: op_smb(); break;
			case 0x7c: op_sfb(); break;
				}
				break; // 0xfc

				}
				break; // 0xff

		} // big switch
	}
}
Exemple #6
0
void Step()
{
	Opcodes OP = (Opcodes)Fetch8();
	//printf("%08X:%08X\n", Registers[sp], Registers[pc]);
	switch (OP)
	{
	case O_NOP:
		op_nop();
		break;
	case O_MOV:
		op_mov();
		break;
	case O_ADD:
		op_add();
		break;
	case O_SUB:
		op_sub();
		break;
	case O_MUL:
		op_mul();
		break;
	case O_DIV:
		op_div();
		break;
	case O_LI:
		op_li();
		break;
	case O_MOVF:
		op_movf();
		break;
	case O_ADDF:
		op_addf();
		break;
	case O_SUBF:
		op_subf();
		break;
	case O_MULF:
		op_mulf();
		break;
	case O_DIVF:
		op_divf();
		break;
	case O_LIF:
		op_lif();
		break;
	case O_XOR:
		op_xor();
		break;
	case O_AND:
		op_and();
		break;
	case O_MOD:
		op_mod();
		break;
	case O_OR:
		op_or();
		break;
	case O_NOT:
		op_not();
		break;
	case O_SHR:
		op_shr();
		break;
	case O_SHL:
		op_shl();
		break;
	case O_PUSH:
		op_push();
		break;
	case O_POP:
		op_pop();
		break;
	case O_STB:
		op_stb();
		break;
	case O_LDB:
		op_ldb();
		break;
	case O_STH:
		op_sth();
		break;
	case O_LDH:
		op_ldh();
		break;
	case O_STW:
		op_stw();
		break;
	case O_LDW:
		op_ldw();
		break;
	case O_LDF:
		op_ldf();
		break;
	case O_STF:
		op_stf();
		break;
	case O_CMP:
		op_cmp();
		break;
	case O_B:
		op_b(0);
		break;
	case O_BC:
		op_b(1);
		break;
	case O_BEQ:
		op_bcond(ctr0_eq);
		break;
	case O_BNE:
		op_bcond(ctr0_ne);
		break;
	case O_BGT:
		op_bcond(ctr0_gt);
		break;
	case O_BLT:
		op_bcond(ctr0_lt);
		break;
	case O_BTC:
		op_btc();
		break;
	case O_INC:
		op_inc();
		break;
	case O_DEC:
		op_dec();
		break;
	default:
		Error("Error: Unknown Opcode PC = %d OP = %08X\n", Registers[pc], OP);
	}

	Ticks++;
}
Exemple #7
0
void SMP::do_op(uint8 opv)
{
    switch(opv)
    {
    case 0x00:
        op_nop();
        break;
    case 0x01:
        op_tcall<0>();
        break;
    case 0x02:
        op_setbit_dp<1, 0x01>();
        break;
    case 0x03:
        op_bitbranch<0x01, true>();
        break;
    case 0x04:
        op_read_reg_dp<&SMP::op_or, A>();
        break;
    case 0x05:
        op_read_reg_addr<&SMP::op_or, A>();
        break;
    case 0x06:
        op_read_a_ix<&SMP::op_or>();
        break;
    case 0x07:
        op_read_a_idpx<&SMP::op_or>();
        break;
    case 0x08:
        op_read_reg_const<&SMP::op_or, A>();
        break;
    case 0x09:
        op_read_dp_dp<&SMP::op_or>();
        break;
    case 0x0a:
        op_or1_bit<0>();
        break;
    case 0x0b:
        op_adjust_dp<&SMP::op_asl>();
        break;
    case 0x0c:
        op_adjust_addr<&SMP::op_asl>();
        break;
    case 0x0d:
        op_push_p();
        break;
    case 0x0e:
        op_adjust_addr_a<1>();
        break;
    case 0x0f:
        op_brk();
        break;
    case 0x10:
        op_branch<0x80, false>();
        break;
    case 0x11:
        op_tcall<1>();
        break;
    case 0x12:
        op_setbit_dp<0, 0x01>();
        break;
    case 0x13:
        op_bitbranch<0x01, false>();
        break;
    case 0x14:
        op_read_a_dpx<&SMP::op_or>();
        break;
    case 0x15:
        op_read_a_addrr<&SMP::op_or, X>();
        break;
    case 0x16:
        op_read_a_addrr<&SMP::op_or, Y>();
        break;
    case 0x17:
        op_read_a_idpy<&SMP::op_or>();
        break;
    case 0x18:
        op_read_dp_const<&SMP::op_or>();
        break;
    case 0x19:
        op_read_ix_iy<&SMP::op_or>();
        break;
    case 0x1a:
        op_adjustw_dp<-1>();
        break;
    case 0x1b:
        op_adjust_dpx<&SMP::op_asl>();
        break;
    case 0x1c:
        op_adjust_reg<&SMP::op_asl, A>();
        break;
    case 0x1d:
        op_adjust_reg<&SMP::op_dec, X>();
        break;
    case 0x1e:
        op_read_reg_addr<&SMP::op_cmp, X>();
        break;
    case 0x1f:
        op_jmp_iaddrx();
        break;
    case 0x20:
        op_setbit<0x20, 0x00>();
        break;
    case 0x21:
        op_tcall<2>();
        break;
    case 0x22:
        op_setbit_dp<1, 0x02>();
        break;
    case 0x23:
        op_bitbranch<0x02, true>();
        break;
    case 0x24:
        op_read_reg_dp<&SMP::op_and, A>();
        break;
    case 0x25:
        op_read_reg_addr<&SMP::op_and, A>();
        break;
    case 0x26:
        op_read_a_ix<&SMP::op_and>();
        break;
    case 0x27:
        op_read_a_idpx<&SMP::op_and>();
        break;
    case 0x28:
        op_read_reg_const<&SMP::op_and, A>();
        break;
    case 0x29:
        op_read_dp_dp<&SMP::op_and>();
        break;
    case 0x2a:
        op_or1_bit<1>();
        break;
    case 0x2b:
        op_adjust_dp<&SMP::op_rol>();
        break;
    case 0x2c:
        op_adjust_addr<&SMP::op_rol>();
        break;
    case 0x2d:
        op_push_reg<A>();
        break;
    case 0x2e:
        op_cbne_dp();
        break;
    case 0x2f:
        op_bra();
        break;
    case 0x30:
        op_branch<0x80, true>();
        break;
    case 0x31:
        op_tcall<3>();
        break;
    case 0x32:
        op_setbit_dp<0, 0x02>();
        break;
    case 0x33:
        op_bitbranch<0x02, false>();
        break;
    case 0x34:
        op_read_a_dpx<&SMP::op_and>();
        break;
    case 0x35:
        op_read_a_addrr<&SMP::op_and, X>();
        break;
    case 0x36:
        op_read_a_addrr<&SMP::op_and, Y>();
        break;
    case 0x37:
        op_read_a_idpy<&SMP::op_and>();
        break;
    case 0x38:
        op_read_dp_const<&SMP::op_and>();
        break;
    case 0x39:
        op_read_ix_iy<&SMP::op_and>();
        break;
    case 0x3a:
        op_adjustw_dp<+1>();
        break;
    case 0x3b:
        op_adjust_dpx<&SMP::op_rol>();
        break;
    case 0x3c:
        op_adjust_reg<&SMP::op_rol, A>();
        break;
    case 0x3d:
        op_adjust_reg<&SMP::op_inc, X>();
        break;
    case 0x3e:
        op_read_reg_dp<&SMP::op_cmp, X>();
        break;
    case 0x3f:
        op_call();
        break;
    case 0x40:
        op_setbit<0x20, 0x20>();
        break;
    case 0x41:
        op_tcall<4>();
        break;
    case 0x42:
        op_setbit_dp<1, 0x04>();
        break;
    case 0x43:
        op_bitbranch<0x04, true>();
        break;
    case 0x44:
        op_read_reg_dp<&SMP::op_eor, A>();
        break;
    case 0x45:
        op_read_reg_addr<&SMP::op_eor, A>();
        break;
    case 0x46:
        op_read_a_ix<&SMP::op_eor>();
        break;
    case 0x47:
        op_read_a_idpx<&SMP::op_eor>();
        break;
    case 0x48:
        op_read_reg_const<&SMP::op_eor, A>();
        break;
    case 0x49:
        op_read_dp_dp<&SMP::op_eor>();
        break;
    case 0x4a:
        op_and1_bit<0>();
        break;
    case 0x4b:
        op_adjust_dp<&SMP::op_lsr>();
        break;
    case 0x4c:
        op_adjust_addr<&SMP::op_lsr>();
        break;
    case 0x4d:
        op_push_reg<X>();
        break;
    case 0x4e:
        op_adjust_addr_a<0>();
        break;
    case 0x4f:
        op_pcall();
        break;
    case 0x50:
        op_branch<0x40, false>();
        break;
    case 0x51:
        op_tcall<5>();
        break;
    case 0x52:
        op_setbit_dp<0, 0x04>();
        break;
    case 0x53:
        op_bitbranch<0x04, false>();
        break;
    case 0x54:
        op_read_a_dpx<&SMP::op_eor>();
        break;
    case 0x55:
        op_read_a_addrr<&SMP::op_eor, X>();
        break;
    case 0x56:
        op_read_a_addrr<&SMP::op_eor, Y>();
        break;
    case 0x57:
        op_read_a_idpy<&SMP::op_eor>();
        break;
    case 0x58:
        op_read_dp_const<&SMP::op_eor>();
        break;
    case 0x59:
        op_read_ix_iy<&SMP::op_eor>();
        break;
    case 0x5a:
        op_cmpw_ya_dp();
        break;
    case 0x5b:
        op_adjust_dpx<&SMP::op_lsr>();
        break;
    case 0x5c:
        op_adjust_reg<&SMP::op_lsr, A>();
        break;
    case 0x5d:
        op_mov_reg_reg<X, A>();
        break;
    case 0x5e:
        op_read_reg_addr<&SMP::op_cmp, Y>();
        break;
    case 0x5f:
        op_jmp_addr();
        break;
    case 0x60:
        op_setbit<0x01, 0x00>();
        break;
    case 0x61:
        op_tcall<6>();
        break;
    case 0x62:
        op_setbit_dp<1, 0x08>();
        break;
    case 0x63:
        op_bitbranch<0x08, true>();
        break;
    case 0x64:
        op_read_reg_dp<&SMP::op_cmp, A>();
        break;
    case 0x65:
        op_read_reg_addr<&SMP::op_cmp, A>();
        break;
    case 0x66:
        op_read_a_ix<&SMP::op_cmp>();
        break;
    case 0x67:
        op_read_a_idpx<&SMP::op_cmp>();
        break;
    case 0x68:
        op_read_reg_const<&SMP::op_cmp, A>();
        break;
    case 0x69:
        op_read_dp_dp<&SMP::op_cmp>();
        break;
    case 0x6a:
        op_and1_bit<1>();
        break;
    case 0x6b:
        op_adjust_dp<&SMP::op_ror>();
        break;
    case 0x6c:
        op_adjust_addr<&SMP::op_ror>();
        break;
    case 0x6d:
        op_push_reg<Y>();
        break;
    case 0x6e:
        op_dbnz_dp();
        break;
    case 0x6f:
        op_ret();
        break;
    case 0x70:
        op_branch<0x40, true>();
        break;
    case 0x71:
        op_tcall<7>();
        break;
    case 0x72:
        op_setbit_dp<0, 0x08>();
        break;
    case 0x73:
        op_bitbranch<0x08, false>();
        break;
    case 0x74:
        op_read_a_dpx<&SMP::op_cmp>();
        break;
    case 0x75:
        op_read_a_addrr<&SMP::op_cmp, X>();
        break;
    case 0x76:
        op_read_a_addrr<&SMP::op_cmp, Y>();
        break;
    case 0x77:
        op_read_a_idpy<&SMP::op_cmp>();
        break;
    case 0x78:
        op_read_dp_const<&SMP::op_cmp>();
        break;
    case 0x79:
        op_read_ix_iy<&SMP::op_cmp>();
        break;
    case 0x7a:
        op_read_ya_dp<&SMP::op_addw>();
        break;
    case 0x7b:
        op_adjust_dpx<&SMP::op_ror>();
        break;
    case 0x7c:
        op_adjust_reg<&SMP::op_ror, A>();
        break;
    case 0x7d:
        op_mov_reg_reg<A, X>();
        break;
    case 0x7e:
        op_read_reg_dp<&SMP::op_cmp, Y>();
        break;
    case 0x7f:
        op_reti();
        break;
    case 0x80:
        op_setbit<0x01, 0x01>();
        break;
    case 0x81:
        op_tcall<8>();
        break;
    case 0x82:
        op_setbit_dp<1, 0x10>();
        break;
    case 0x83:
        op_bitbranch<0x10, true>();
        break;
    case 0x84:
        op_read_reg_dp<&SMP::op_adc, A>();
        break;
    case 0x85:
        op_read_reg_addr<&SMP::op_adc, A>();
        break;
    case 0x86:
        op_read_a_ix<&SMP::op_adc>();
        break;
    case 0x87:
        op_read_a_idpx<&SMP::op_adc>();
        break;
    case 0x88:
        op_read_reg_const<&SMP::op_adc, A>();
        break;
    case 0x89:
        op_read_dp_dp<&SMP::op_adc>();
        break;
    case 0x8a:
        op_eor1_bit();
        break;
    case 0x8b:
        op_adjust_dp<&SMP::op_dec>();
        break;
    case 0x8c:
        op_adjust_addr<&SMP::op_dec>();
        break;
    case 0x8d:
        op_mov_reg_const<Y>();
        break;
    case 0x8e:
        op_pop_p();
        break;
    case 0x8f:
        op_mov_dp_const();
        break;
    case 0x90:
        op_branch<0x01, false>();
        break;
    case 0x91:
        op_tcall<9>();
        break;
    case 0x92:
        op_setbit_dp<0, 0x10>();
        break;
    case 0x93:
        op_bitbranch<0x10, false>();
        break;
    case 0x94:
        op_read_a_dpx<&SMP::op_adc>();
        break;
    case 0x95:
        op_read_a_addrr<&SMP::op_adc, X>();
        break;
    case 0x96:
        op_read_a_addrr<&SMP::op_adc, Y>();
        break;
    case 0x97:
        op_read_a_idpy<&SMP::op_adc>();
        break;
    case 0x98:
        op_read_dp_const<&SMP::op_adc>();
        break;
    case 0x99:
        op_read_ix_iy<&SMP::op_adc>();
        break;
    case 0x9a:
        op_read_ya_dp<&SMP::op_subw>();
        break;
    case 0x9b:
        op_adjust_dpx<&SMP::op_dec>();
        break;
    case 0x9c:
        op_adjust_reg<&SMP::op_dec, A>();
        break;
    case 0x9d:
        op_mov_reg_reg<X, SP>();
        break;
    case 0x9e:
        op_div_ya_x();
        break;
    case 0x9f:
        op_xcn();
        break;
    case 0xa0:
        op_seti<1>();
        break;
    case 0xa1:
        op_tcall<10>();
        break;
    case 0xa2:
        op_setbit_dp<1, 0x20>();
        break;
    case 0xa3:
        op_bitbranch<0x20, true>();
        break;
    case 0xa4:
        op_read_reg_dp<&SMP::op_sbc, A>();
        break;
    case 0xa5:
        op_read_reg_addr<&SMP::op_sbc, A>();
        break;
    case 0xa6:
        op_read_a_ix<&SMP::op_sbc>();
        break;
    case 0xa7:
        op_read_a_idpx<&SMP::op_sbc>();
        break;
    case 0xa8:
        op_read_reg_const<&SMP::op_sbc, A>();
        break;
    case 0xa9:
        op_read_dp_dp<&SMP::op_sbc>();
        break;
    case 0xaa:
        op_mov1_c_bit();
        break;
    case 0xab:
        op_adjust_dp<&SMP::op_inc>();
        break;
    case 0xac:
        op_adjust_addr<&SMP::op_inc>();
        break;
    case 0xad:
        op_read_reg_const<&SMP::op_cmp, Y>();
        break;
    case 0xae:
        op_pop_reg<A>();
        break;
    case 0xaf:
        op_mov_ixinc_a();
        break;
    case 0xb0:
        op_branch<0x01, true>();
        break;
    case 0xb1:
        op_tcall<11>();
        break;
    case 0xb2:
        op_setbit_dp<0, 0x20>();
        break;
    case 0xb3:
        op_bitbranch<0x20, false>();
        break;
    case 0xb4:
        op_read_a_dpx<&SMP::op_sbc>();
        break;
    case 0xb5:
        op_read_a_addrr<&SMP::op_sbc, X>();
        break;
    case 0xb6:
        op_read_a_addrr<&SMP::op_sbc, Y>();
        break;
    case 0xb7:
        op_read_a_idpy<&SMP::op_sbc>();
        break;
    case 0xb8:
        op_read_dp_const<&SMP::op_sbc>();
        break;
    case 0xb9:
        op_read_ix_iy<&SMP::op_sbc>();
        break;
    case 0xba:
        op_movw_ya_dp();
        break;
    case 0xbb:
        op_adjust_dpx<&SMP::op_inc>();
        break;
    case 0xbc:
        op_adjust_reg<&SMP::op_inc, A>();
        break;
    case 0xbd:
        op_mov_sp_x();
        break;
    case 0xbe:
        op_das();
        break;
    case 0xbf:
        op_mov_a_ixinc();
        break;
    case 0xc0:
        op_seti<0>();
        break;
    case 0xc1:
        op_tcall<12>();
        break;
    case 0xc2:
        op_setbit_dp<1, 0x40>();
        break;
    case 0xc3:
        op_bitbranch<0x40, true>();
        break;
    case 0xc4:
        op_mov_dp_reg<A>();
        break;
    case 0xc5:
        op_mov_addr_reg<A>();
        break;
    case 0xc6:
        op_mov_ix_a();
        break;
    case 0xc7:
        op_mov_idpx_a();
        break;
    case 0xc8:
        op_read_reg_const<&SMP::op_cmp, X>();
        break;
    case 0xc9:
        op_mov_addr_reg<X>();
        break;
    case 0xca:
        op_mov1_bit_c();
        break;
    case 0xcb:
        op_mov_dp_reg<Y>();
        break;
    case 0xcc:
        op_mov_addr_reg<Y>();
        break;
    case 0xcd:
        op_mov_reg_const<X>();
        break;
    case 0xce:
        op_pop_reg<X>();
        break;
    case 0xcf:
        op_mul_ya();
        break;
    case 0xd0:
        op_branch<0x02, false>();
        break;
    case 0xd1:
        op_tcall<13>();
        break;
    case 0xd2:
        op_setbit_dp<0, 0x40>();
        break;
    case 0xd3:
        op_bitbranch<0x40, false>();
        break;
    case 0xd4:
        op_mov_dpr_reg<A, X>();
        break;
    case 0xd5:
        op_mov_addrr_a<X>();
        break;
    case 0xd6:
        op_mov_addrr_a<Y>();
        break;
    case 0xd7:
        op_mov_idpy_a();
        break;
    case 0xd8:
        op_mov_dp_reg<X>();
        break;
    case 0xd9:
        op_mov_dpr_reg<X, Y>();
        break;
    case 0xda:
        op_movw_dp_ya();
        break;
    case 0xdb:
        op_mov_dpr_reg<Y, X>();
        break;
    case 0xdc:
        op_adjust_reg<&SMP::op_dec, Y>();
        break;
    case 0xdd:
        op_mov_reg_reg<A, Y>();
        break;
    case 0xde:
        op_cbne_dpx();
        break;
    case 0xdf:
        op_daa();
        break;
    case 0xe0:
        op_setbit<0x48, 0x00>();
        break;
    case 0xe1:
        op_tcall<14>();
        break;
    case 0xe2:
        op_setbit_dp<1, 0x80>();
        break;
    case 0xe3:
        op_bitbranch<0x80, true>();
        break;
    case 0xe4:
        op_mov_reg_dp<A>();
        break;
    case 0xe5:
        op_mov_reg_addr<A>();
        break;
    case 0xe6:
        op_mov_a_ix();
        break;
    case 0xe7:
        op_mov_a_idpx();
        break;
    case 0xe8:
        op_mov_reg_const<A>();
        break;
    case 0xe9:
        op_mov_reg_addr<X>();
        break;
    case 0xea:
        op_not1_bit();
        break;
    case 0xeb:
        op_mov_reg_dp<Y>();
        break;
    case 0xec:
        op_mov_reg_addr<Y>();
        break;
    case 0xed:
        op_notc();
        break;
    case 0xee:
        op_pop_reg<Y>();
        break;
    case 0xef:
        op_wait();
        break;
    case 0xf0:
        op_branch<0x02, true>();
        break;
    case 0xf1:
        op_tcall<15>();
        break;
    case 0xf2:
        op_setbit_dp<0, 0x80>();
        break;
    case 0xf3:
        op_bitbranch<0x80, false>();
        break;
    case 0xf4:
        op_mov_reg_dpr<A, X>();
        break;
    case 0xf5:
        op_mov_a_addrr<X>();
        break;
    case 0xf6:
        op_mov_a_addrr<Y>();
        break;
    case 0xf7:
        op_mov_a_idpy();
        break;
    case 0xf8:
        op_mov_reg_dp<X>();
        break;
    case 0xf9:
        op_mov_reg_dpr<X, Y>();
        break;
    case 0xfa:
        op_mov_dp_dp();
        break;
    case 0xfb:
        op_mov_reg_dpr<Y, X>();
        break;
    case 0xfc:
        op_adjust_reg<&SMP::op_inc, Y>();
        break;
    case 0xfd:
        op_mov_reg_reg<Y, A>();
        break;
    case 0xfe:
        op_dbnz_y();
        break;
    case 0xff:
        op_wait();
        break;
    }
}