void extIntHandler(void) { bool_t flag; volatile uint32_t status; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Read status register to clear interrupt status = AT91C_BASE_PIOE->PIO_ISR; //Ensure the PHY IRQ pin is asserted if(!(AT91C_BASE_PIOE->PIO_PDSR & AT91C_PIO_PE31)) { //Set event flag interface->phyEvent = TRUE; //Notify the TCP/IP stack of the event flag = osSetEventFromIsr(&netEvent); } //Write AIC_EOICR register before exiting AT91C_BASE_AIC->AIC_EOICR = 0; //Leave interrupt service routine osExitIsr(flag); }
void extIntHandler(void) { bool_t flag; volatile uint_t status; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Read status register to clear interrupt status = AT91C_BASE_PIOB->PIO_ISR; //Ensure the INT pin is asserted if(!(AT91C_BASE_PIOB->PIO_PDSR & AT91C_PIO_PB26)) { //A PHY event is pending... interface->phyEvent = TRUE; //Notify the user that the link state has changed flag = osSetEventFromIsr(&interface->nicRxEvent); } //Write AIC_EOICR register before exiting AT91C_BASE_AIC->AIC_EOICR = 0; //Leave interrupt service routine osExitIsr(flag); }
void extIntHandler(void) { bool_t flag; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Check interrupt status if(IFS0 & _IFS0_INT4IF_MASK) { //Clear interrupt flag IFS0CLR = _IFS0_INT4IF_MASK; //A PHY event is pending... interface->phyEvent = TRUE; //Notify the user that the link state has changed flag = osSetEventFromIsr(&interface->nicRxEvent); } //Leave interrupt service routine osExitIsr(flag); }
void PIOD_Handler(void) { bool_t flag; volatile uint_t status; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Read status register to clear interrupt status = PIOD->PIO_ISR; //Ensure the PHY IRQ pin is asserted if(!(PIOD->PIO_PDSR & PIO_PD28)) { //A PHY event is pending... interface->phyEvent = TRUE; //Notify the user that the link state has changed flag = osSetEventFromIsr(&interface->nicRxEvent); } //Leave interrupt service routine osExitIsr(flag); }
void extIntHandler(void) { bool_t flag; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Check interrupt status if(IFS0 & _IFS0_INT2IF_MASK) { //Clear interrupt flag IFS0CLR = _IFS0_INT2IF_MASK; //Call interrupt handler flag = enc624j600IrqHandler(interface); } //Leave interrupt service routine osExitIsr(flag); }
__attribute__((naked)) void avr32EthIrqWrapper(void) { //Enter interrupt service routine osEnterIsr(); //Call Ethernet MAC interrupt handler avr32EthIrqHandler(); //Leave interrupt service routine osExitIsr(flag); }
void sama5d3GigabitEthIrqHandler(void) { bool_t flag; volatile uint32_t isr; volatile uint32_t tsr; volatile uint32_t rsr; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[SAMA5D3_GIGABIT_ETH_INTERFACE_ID]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Each time the software reads GMAC_ISR, it has to check the //contents of GMAC_TSR, GMAC_RSR and GMAC_NSR isr = GMAC->GMAC_ISR; tsr = GMAC->GMAC_TSR; rsr = GMAC->GMAC_RSR; //A packet has been transmitted? if(tsr & (GMAC_TSR_HRESP | GMAC_TSR_UND | GMAC_TSR_TXCOMP | GMAC_TSR_TFC | GMAC_TSR_TXGO | GMAC_TSR_RLE | GMAC_TSR_COL | GMAC_TSR_UBR)) { //Only clear TSR flags that are currently set GMAC->GMAC_TSR = tsr; //Avoid DMA lockup by sending only one frame at a time (see errata 57.5.1) if((txBufferDesc[0].status & GMAC_TX_USED) && (txBufferDesc[1].status & GMAC_TX_USED)) { //Notify the user that the transmitter is ready to send flag |= osSetEventFromIsr(&interface->nicTxEvent); } } //A packet has been received? if(rsr & (GMAC_RSR_HNO | GMAC_RSR_RXOVR | GMAC_RSR_REC | GMAC_RSR_BNA)) { //Notify the user that a packet has been received flag |= osSetEventFromIsr(&interface->nicRxEvent); } //Write AIC_EOICR register before exiting AIC->AIC_EOICR = 0; //Leave interrupt service routine osExitIsr(flag); }
void sam9263EthIrqHandler(void) { bool_t flag; volatile uint32_t isr; volatile uint32_t tsr; volatile uint32_t rsr; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Each time the software reads EMAC_ISR, it has to check the //contents of EMAC_TSR, EMAC_RSR and EMAC_NSR isr = AT91C_BASE_EMAC->EMAC_ISR; tsr = AT91C_BASE_EMAC->EMAC_TSR; rsr = AT91C_BASE_EMAC->EMAC_RSR; //A packet has been transmitted? if(tsr & (AT91C_EMAC_UND | AT91C_EMAC_COMP | AT91C_EMAC_BEX | AT91C_EMAC_TGO | AT91C_EMAC_RLES | AT91C_EMAC_COL | AT91C_EMAC_UBR)) { //Only clear TSR flags that are currently set AT91C_BASE_EMAC->EMAC_TSR = tsr; //Check whether the TX buffer is available for writing if(txBufferDesc[txBufferIndex].status & AT91C_EMAC_TX_USED) { //Notify the user that the transmitter is ready to send flag |= osSetEventFromIsr(&interface->nicTxEvent); } } //A packet has been received? if(rsr & (AT91C_EMAC_OVR | AT91C_EMAC_REC | AT91C_EMAC_BNA)) { //Notify the user that a packet has been received flag |= osSetEventFromIsr(&interface->nicRxEvent); } //Write AIC_EOICR register before exiting AT91C_BASE_AIC->AIC_EOICR = 0; //Leave interrupt service routine osExitIsr(flag); }
void GMAC_Handler(void) { bool_t flag; volatile uint32_t isr; volatile uint32_t tsr; volatile uint32_t rsr; //Enter interrupt service routine osEnterIsr(); //This flag will be set if a higher priority task must be woken flag = FALSE; //Each time the software reads GMAC_ISR, it has to check the //contents of GMAC_TSR, GMAC_RSR and GMAC_NSR isr = GMAC->GMAC_ISRPQ[0]; isr = GMAC->GMAC_ISRPQ[1]; isr = GMAC->GMAC_ISRPQ[2]; isr = GMAC->GMAC_ISR; tsr = GMAC->GMAC_TSR; rsr = GMAC->GMAC_RSR; //A packet has been transmitted? if(tsr & (GMAC_TSR_HRESP | GMAC_TSR_TXCOMP | GMAC_TSR_TFC | GMAC_TSR_TXGO | GMAC_TSR_RLE | GMAC_TSR_COL | GMAC_TSR_UBR)) { //Only clear TSR flags that are currently set GMAC->GMAC_TSR = tsr; //Check whether the TX buffer is available for writing if(txBufferDesc[txBufferIndex].status & GMAC_TX_USED) { //Notify the user that the transmitter is ready to send flag |= osSetEventFromIsr(&nicDriverInterface->nicTxEvent); } } //A packet has been received? if(rsr & (GMAC_RSR_HNO | GMAC_RSR_RXOVR | GMAC_RSR_REC | GMAC_RSR_BNA)) { //Notify the user that a packet has been received flag |= osSetEventFromIsr(&nicDriverInterface->nicRxEvent); } //Leave interrupt service routine osExitIsr(flag); }
void EthernetMAC_IRQHandler(void) { bool_t flag; uint32_t status; //Enter interrupt service routine osEnterIsr(); //This flag will be set if a higher priority task must be woken flag = FALSE; //Read interrupt status register status = MAC->CSR5; //A packet has been transmitted? if(status & CSR5_TI_MASK) { //Clear TI interrupt flag MAC->CSR5 = CSR5_TI_MASK; //Check whether the TX buffer is available for writing if(!(txCurDmaDesc->tdes0 & TDES0_OWN)) { //Notify the TCP/IP stack that the transmitter is ready to send flag |= osSetEventFromIsr(&nicDriverInterface->nicTxEvent); } } //A packet has been received? if(status & CSR5_RI_MASK) { //Disable RIE interrupt MAC->CSR7 &= ~CSR7_RIE_MASK; //Set event flag nicDriverInterface->nicEvent = TRUE; //Notify the TCP/IP stack of the event flag |= osSetEventFromIsr(&netEvent); } //Clear NIS interrupt flag MAC->CSR5 = CSR5_NIS_MASK; //Leave interrupt service routine osExitIsr(flag); }
void ETH_IRQHandler(void) { bool_t flag; uint32_t status; //Enter interrupt service routine osEnterIsr(); //This flag will be set if a higher priority task must be woken flag = FALSE; //Read DMA status register status = ETH->DMASR; //A packet has been transmitted? if(status & ETH_DMASR_TS) { //Clear TS interrupt flag ETH->DMASR = ETH_DMASR_TS; //Check whether the TX buffer is available for writing if(!(txCurDmaDesc->tdes0 & ETH_TDES0_OWN)) { //Notify the TCP/IP stack that the transmitter is ready to send flag |= osSetEventFromIsr(&nicDriverInterface->nicTxEvent); } } //A packet has been received? if(status & ETH_DMASR_RS) { //Disable RIE interrupt ETH->DMAIER &= ~ETH_DMAIER_RIE; //Set event flag nicDriverInterface->nicEvent = TRUE; //Notify the TCP/IP stack of the event flag |= osSetEventFromIsr(&netEvent); } //Clear NIS interrupt flag ETH->DMASR = ETH_DMASR_NIS; //Leave interrupt service routine osExitIsr(flag); }
__interrupt void rx63nEthIrqHandler(void) { bool_t flag; uint32_t status; NetInterface *interface; //Allow nested interrupts __enable_interrupt(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Read interrupt status register status = EDMAC.EESR.LONG; //A packet has been transmitted? if(status & EDMAC_EESR_TWB) { //Clear TWB interrupt flag EDMAC.EESR.LONG = EDMAC_EESR_TWB; //Check whether the TX buffer is available for writing if(!(txDmaDesc[txIndex].td0 & EDMAC_TD0_TACT)) { //Notify the user that the transmitter is ready to send flag |= osSetEventFromIsr(&interface->nicTxEvent); } } //A packet has been received? if(status & EDMAC_EESR_FR) { //Disable FR interrupts EDMAC.EESIPR.BIT.FRIP = 0; //Notify the user that a packet has been received flag |= osSetEventFromIsr(&interface->nicRxEvent); } //Leave interrupt service routine osExitIsr(flag); }
void rza1EthIrqHandler(uint32_t intSense) { bool_t flag; uint32_t status; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Read interrupt status register status = ETHER.EESR0; //A packet has been transmitted? if(status & ETHER_EESR0_TWB) { //Clear TWB interrupt flag ETHER.EESR0 = ETHER_EESR0_TWB; //Check whether the TX buffer is available for writing if(!(txDmaDesc[txIndex].td0 & ETHER_TD0_TACT)) { //Notify the user that the transmitter is ready to send flag |= osSetEventFromIsr(&interface->nicTxEvent); } } //A packet has been received? if(status & ETHER_EESR0_FR) { //Disable FR interrupts ETHER.EESIPR0 &= ~ETHER_EESIPR0_FRIP; //Notify the user that a packet has been received flag |= osSetEventFromIsr(&interface->nicRxEvent); } //Leave interrupt service routine osExitIsr(flag); }
void EthernetMAC_IRQHandler(void) { bool_t flag; uint32_t status; NetInterface *interface; //Enter interrupt service routine osEnterIsr(); //Point to the structure describing the network interface interface = &netInterface[0]; //This flag will be set if a higher priority task must be woken flag = FALSE; //Read interrupt status register status = MAC->DMA_IRQ; //A packet has been transmitted? if(status & DMA_IRQ_TX_PKT_SENT) { //Clear TX interrupt flag MAC->DMA_TX_STATUS = DMA_TX_STATUS_TX_PKT_SENT; //Check whether the TX buffer is available for writing if(txCurDmaDesc->size & DMA_DESC_EMPTY_FLAG) { //Notify the user that the transmitter is ready to send flag |= osSetEventFromIsr(&interface->nicTxEvent); } } //A packet has been received? if(status & DMA_IRQ_RX_PKT_RECEIVED) { //Disable RX interrupt MAC->DMA_IRQ_MASK &= ~DMA_IRQ_MASK_RX_PKT_RECEIVED; //Notify the user that a packet has been received flag |= osSetEventFromIsr(&interface->nicRxEvent); } //Leave interrupt service routine osExitIsr(flag); }