void Compilation::install_code(int frame_size) { // frame_size is in 32-bit words so adjust it intptr_t words assert(frame_size == frame_map()->framesize(), "must match"); assert(in_bytes(frame_map()->framesize_in_bytes()) % sizeof(intptr_t) == 0, "must be at least pointer aligned"); _env->register_method( method(), osr_bci(), &_offsets, in_bytes(_frame_map->sp_offset_for_orig_pc()), code(), in_bytes(frame_map()->framesize_in_bytes()) / sizeof(intptr_t), debug_info_recorder()->_oopmaps, exception_handler_table(), implicit_exception_table(), compiler(), _env->comp_level(), needs_debug_information(), has_unsafe_access() ); }
bool is_osr_compile() const { return osr_bci() >= 0; }
void Compilation::build_hir() { CHECK_BAILOUT(); // setup ir _hir = new IR(this, method(), osr_bci()); if (!_hir->is_valid()) { bailout("invalid parsing"); return; } #ifndef PRODUCT if (PrintCFGToFile) { CFGPrinter::print_cfg(_hir, "After Generation of HIR", true, false); } #endif #ifndef PRODUCT if (PrintCFG || PrintCFG0) { tty->print_cr("CFG after parsing"); _hir->print(true); } if (PrintIR || PrintIR0 ) { tty->print_cr("IR after parsing"); _hir->print(false); } #endif _hir->verify(); if (UseC1Optimizations) { NEEDS_CLEANUP // optimization PhaseTraceTime timeit(_t_optimizeIR); _hir->optimize(); } _hir->verify(); _hir->split_critical_edges(); #ifndef PRODUCT if (PrintCFG || PrintCFG1) { tty->print_cr("CFG after optimizations"); _hir->print(true); } if (PrintIR || PrintIR1 ) { tty->print_cr("IR after optimizations"); _hir->print(false); } #endif _hir->verify(); // compute block ordering for code generation // the control flow must not be changed from here on _hir->compute_code(); if (UseGlobalValueNumbering) { ResourceMark rm; int instructions = Instruction::number_of_instructions(); GlobalValueNumbering gvn(_hir); assert(instructions == Instruction::number_of_instructions(), "shouldn't have created an instructions"); } // compute use counts after global value numbering _hir->compute_use_counts(); #ifndef PRODUCT if (PrintCFG || PrintCFG2) { tty->print_cr("CFG before code generation"); _hir->code()->print(true); } if (PrintIR || PrintIR2 ) { tty->print_cr("IR before code generation"); _hir->code()->print(false, true); } #endif _hir->verify(); }
void Compilation::build_hir() { CHECK_BAILOUT(); // setup ir CompileLog* log = this->log(); if (log != NULL) { log->begin_head("parse method='%d' ", log->identify(_method)); log->stamp(); log->end_head(); } _hir = new IR(this, method(), osr_bci()); if (log) log->done("parse"); if (!_hir->is_valid()) { bailout("invalid parsing"); return; } #ifndef PRODUCT if (PrintCFGToFile) { CFGPrinter::print_cfg(_hir, "After Generation of HIR", true, false); } #endif #ifndef PRODUCT if (PrintCFG || PrintCFG0) { tty->print_cr("CFG after parsing"); _hir->print(true); } if (PrintIR || PrintIR0 ) { tty->print_cr("IR after parsing"); _hir->print(false); } #endif _hir->verify(); if (UseC1Optimizations) { NEEDS_CLEANUP // optimization PhaseTraceTime timeit(_t_optimize_blocks); _hir->optimize_blocks(); } _hir->verify(); _hir->split_critical_edges(); #ifndef PRODUCT if (PrintCFG || PrintCFG1) { tty->print_cr("CFG after optimizations"); _hir->print(true); } if (PrintIR || PrintIR1 ) { tty->print_cr("IR after optimizations"); _hir->print(false); } #endif _hir->verify(); // compute block ordering for code generation // the control flow must not be changed from here on _hir->compute_code(); if (UseGlobalValueNumbering) { // No resource mark here! LoopInvariantCodeMotion can allocate ValueStack objects. int instructions = Instruction::number_of_instructions(); GlobalValueNumbering gvn(_hir); assert(instructions == Instruction::number_of_instructions(), "shouldn't have created an instructions"); } _hir->verify(); #ifndef PRODUCT if (PrintCFGToFile) { CFGPrinter::print_cfg(_hir, "Before RangeCheckElimination", true, false); } #endif if (RangeCheckElimination) { if (_hir->osr_entry() == NULL) { PhaseTraceTime timeit(_t_rangeCheckElimination); RangeCheckElimination::eliminate(_hir); } } #ifndef PRODUCT if (PrintCFGToFile) { CFGPrinter::print_cfg(_hir, "After RangeCheckElimination", true, false); } #endif if (UseC1Optimizations) { // loop invariant code motion reorders instructions and range // check elimination adds new instructions so do null check // elimination after. NEEDS_CLEANUP // optimization PhaseTraceTime timeit(_t_optimize_null_checks); _hir->eliminate_null_checks(); } _hir->verify(); // compute use counts after global value numbering _hir->compute_use_counts(); #ifndef PRODUCT if (PrintCFG || PrintCFG2) { tty->print_cr("CFG before code generation"); _hir->code()->print(true); } if (PrintIR || PrintIR2 ) { tty->print_cr("IR before code generation"); _hir->code()->print(false, true); } #endif _hir->verify(); }