static void grackle_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, u_int32_t val, int width) { struct grackle_softc *sc; vm_offset_t caoff; sc = device_get_softc(dev); caoff = sc->sc_data + (reg & 0x03); if (grackle_enable_config(sc, bus, slot, func, reg)) { switch (width) { case 1: out8rb(caoff, val); (void)in8rb(caoff); break; case 2: out16rb(caoff, val); (void)in16rb(caoff); break; case 4: out32rb(caoff, val); (void)in32rb(caoff); break; } } grackle_disable_config(sc); }
static status_t grackle_write_pci_config(void *cookie, uint8 bus, uint8 device, uint8 function, uint8 offset, uint8 size, uint32 value) { grackle_host_bridge *bridge = (grackle_host_bridge*)cookie; TRACE("grackle_write_pci_config(bus=%u, dev=%u, func=%u, offset=%u, " "size=%u, value=%lu)\n", (int)bus, (int)device, (int)function, (int)offset, (int)size, value); out32rb(bridge->address_registers, (1 << 31) | (bus << 16) | ((device & 0x1f) << 11) | ((function & 0x7) << 8) | (offset & 0xfc)); addr_t dataAddress = bridge->data_registers + (offset & 0x3); switch (size) { case 1: out8rb(dataAddress, (uint8)value); break; case 2: out16rb(dataAddress, (uint16)value); break; case 4: out32rb(dataAddress, value); break; } out32rb(bridge->address_registers, 0); return B_OK; }
static void uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, u_int32_t val, int width) { struct uninorth_softc *sc; vm_offset_t caoff; sc = device_get_softc(dev); caoff = sc->sc_data + (reg & 0x07); if (uninorth_enable_config(sc, bus, slot, func, reg)) { switch (width) { case 1: out8rb(caoff, val); break; case 2: out16rb(caoff, val); break; case 4: out32rb(caoff, val); break; } } }
void bmac_write_reg(struct bmac_softc *sc, int off, int val) { out16rb(sc->sc_regs + off, val); }