Exemple #1
0
static WRITE8_HANDLER( bankedram_w )
{
	if (videobank & 0x01)
	{
		if (videobank & 0x04)
			paletteram_xBBBBBGGGGGRRRRR_be_w(offset + 0x0800,data);
		else
			paletteram_xBBBBBGGGGGRRRRR_be_w(offset,data);
	}
	else
		ram[offset] = data;
}
Exemple #2
0
static WRITE8_HANDLER( bankedram_w )
{
	parodius_state *state = space->machine().driver_data<parodius_state>();

	if (state->m_videobank & 0x01)
	{
		if (state->m_videobank & 0x04)
			paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset + 0x0800, data);
		else
			paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset, data);
	}
	else
		state->m_ram[offset] = data;
}
Exemple #3
0
static WRITE8_HANDLER( bankedram_w )
{
	if (palette_selected)
		paletteram_xBBBBBGGGGGRRRRR_be_w(offset,data);
	else
		ram[offset] = data;
}
Exemple #4
0
static WRITE8_HANDLER( bankedram_w )
{
    surpratk_state *state = (surpratk_state *)space->machine->driver_data;

    if (state->videobank & 0x02)
    {
        if (state->videobank & 0x04)
            paletteram_xBBBBBGGGGGRRRRR_be_w(space,offset + 0x0800,data);
        else
            paletteram_xBBBBBGGGGGRRRRR_be_w(space,offset,data);
    }
    else if (state->videobank & 0x01)
        k053245_w(state->k053244, offset, data);
    else
        state->ram[offset] = data;
}
static WRITE8_HANDLER( scontra_bankedram_w )
{
	thunderx_state *state = (thunderx_state *)space->machine->driver_data;

	if (state->palette_selected)
		paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset, data);
	else
		state->ram[offset] = data;
}
Exemple #6
0
static WRITE8_HANDLER( bankedram_w )
{
	gbusters_state *state = space->machine->driver_data<gbusters_state>();

	if (state->palette_selected)
		paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset, data);
	else
		state->ram[offset] = data;
}
Exemple #7
0
static WRITE8_HANDLER( bankedram_w )
{
	aliens_state *state = space->machine().driver_data<aliens_state>();

	if (state->m_palette_selected)
		paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset, data);
	else
		state->m_ram[offset] = data;
}
Exemple #8
0
static WRITE8_HANDLER( bottom9_bankedram2_w )
{
	bottom9_state *state = space->machine().driver_data<bottom9_state>();

	if (state->m_k052109_selected)
		k052109_051960_w(space, offset + 0x2000, data);
	else
		paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset, data);
}
Exemple #9
0
static WRITE8_HANDLER( thunderx_bankedram_w )
{
	if (rambank & 0x01)
		ram[offset] = data;
	else if (rambank & 0x10)
	{
//          if (offset == 0x200)    debug_signal_breakpoint(1);
		if (pmcbank)
		{
			logerror("%04x pmcram %04x = %02x\n",cpu_get_pc(space->cpu),offset,data);
			pmcram[offset] = data;
		}
		else
			logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(space->cpu),offset,data);
	}
	else
		paletteram_xBBBBBGGGGGRRRRR_be_w(space,offset,data);
}
Exemple #10
0
static WRITE8_HANDLER( spy_bankedram1_w )
{
	if (rambank & 1)
	{
		paletteram_xBBBBBGGGGGRRRRR_be_w(offset,data);
	}
	else if (rambank & 2)
	{
		if (pmcbank)
		{
			/*logerror("%04x pmcram %04x = %02x\n",activecpu_get_pc(),offset,data); */
			pmcram[offset] = data;
		}
		/*else */
			/*logerror("%04x pmc internal ram %04x = %02x\n",activecpu_get_pc(),offset,data); */
	}
	else
		ram[offset] = data;
}
Exemple #11
0
static WRITE8_HANDLER( thunderx_bankedram_w )
{
	thunderx_state *state = (thunderx_state *)space->machine->driver_data;

	if (state->rambank & 0x01)
		state->ram[offset] = data;
	else if (state->rambank & 0x10)
	{
		if (state->pmcbank)
		{
			logerror("%04x pmcram %04x = %02x\n",cpu_get_pc(space->cpu),offset,data);
			state->pmcram[offset] = data;
		}
		else
			logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(space->cpu),offset,data);
	}
	else
		paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset, data);
}
Exemple #12
0
static WRITE8_HANDLER( spy_bankedram1_w )
{
	if (rambank & 1)
	{
		paletteram_xBBBBBGGGGGRRRRR_be_w(space,offset,data);
	}
	else if (rambank & 2)
	{
		if (pmcbank)
		{
			//logerror("%04x pmcram %04x = %02x\n",cpu_get_pc(space->cpu),offset,data);
			pmcram[offset] = data;
		}
		//else
			//logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(space->cpu),offset,data);
	}
	else
		ram[offset] = data;
}
Exemple #13
0
static WRITE8_HANDLER( spy_bankedram1_w )
{
	spy_state *state = space->machine->driver_data<spy_state>();

	if (state->rambank & 1)
	{
		paletteram_xBBBBBGGGGGRRRRR_be_w(space,offset,data);
	}
	else if (state->rambank & 2)
	{
		if (state->pmcbank)
		{
			//logerror("%04x pmcram %04x = %02x\n", cpu_get_pc(space->cpu), offset, data);
			state->pmcram[offset] = data;
		}
		//else
			//logerror("%04x pmc internal ram %04x = %02x\n", cpu_get_pc(space->cpu), offset, data);
	}
	else
		state->ram[offset] = data;
}
Exemple #14
0
// use one more palette entry for the BG color
static WRITE8_HANDLER( le_bgcolor_w )
{
	paletteram_xBBBBBGGGGGRRRRR_be_w(space, 0x3800 + offset, data);
}
Exemple #15
0
static WRITE8_HANDLER( le_4800_w )
{
	lethal_state *state = space->machine().driver_data<lethal_state>();

	if (state->m_cur_control2 & 0x10)	// RAM enable
	{
		paletteram_xBBBBBGGGGGRRRRR_be_w(space, offset, data);
	}
	else
	{
		if (offset < 0x0800)
		{
			switch (offset)
			{
				case 0xc6:
					sound_cmd_w(space, 0, data);
					break;

				case 0xc7:
					sound_irq_w(space, 0, data);
					break;

				case 0x40:
				case 0x41:
				case 0x42:
				case 0x43:
				case 0x44:
				case 0x45:
				case 0x46:
				case 0x47:
				case 0x48:
				case 0x49:
				case 0x4a:
				case 0x4b:
				case 0x4c:
				case 0x4d:
				case 0x4e:
				case 0x4f:
					k053244_w(state->m_k053244, offset - 0x40, data);
					break;

				case 0x80:
				case 0x81:
				case 0x82:
				case 0x83:
				case 0x84:
				case 0x85:
				case 0x86:
				case 0x87:
				case 0x88:
				case 0x89:
				case 0x8a:
				case 0x8b:
				case 0x8c:
				case 0x8d:
				case 0x8e:
				case 0x8f:
				case 0x90:
				case 0x91:
				case 0x92:
				case 0x93:
				case 0x94:
				case 0x95:
				case 0x96:
				case 0x97:
				case 0x98:
				case 0x99:
				case 0x9a:
				case 0x9b:
				case 0x9c:
				case 0x9d:
				case 0x9e:
				case 0x9f:
					k054000_w(state->m_k054000, offset - 0x80, data);
					break;

				default:
					logerror("Unknown LE 48xx register write: %x to %x (PC=%x)\n", data, offset, cpu_get_pc(&space->device()));
					break;
			}
		}
		else if (offset < 0x1800)
			k053245_w(state->m_k053244, (offset - 0x0800) & 0x07ff, data);
		else if (offset < 0x2000)
			k056832_ram_code_lo_w(state->m_k056832, offset - 0x1800, data);
		else if (offset < 0x2800)
			k056832_ram_code_hi_w(state->m_k056832, offset - 0x2000, data);
		else if (offset < 0x3000)
			k056832_ram_attr_lo_w(state->m_k056832, offset - 0x2800, data);
		else // (offset < 0x3800)
			k056832_ram_attr_hi_w(state->m_k056832, offset - 0x3000, data);
	}
}
Exemple #16
0
static WRITE8_HANDLER( le_4800_w )
{
	if (cur_control2 & 0x10)	// RAM enable
	{
		paletteram_xBBBBBGGGGGRRRRR_be_w(machine,offset,data);
	}
	else
	{
		if (offset < 0x0800)
		{
			switch (offset)
			{
				case 0xc6:
					sound_cmd_w(machine, 0, data);
					break;

				case 0xc7:
					sound_irq_w(machine, 0, data);
					break;

				case 0x40:
				case 0x41:
				case 0x42:
				case 0x43:
				case 0x44:
				case 0x45:
				case 0x46:
					K053244_w(machine, offset-0x40, data);
					break;

				case 0x80:
				case 0x81:
				case 0x82:
				case 0x83:
				case 0x84:
				case 0x85:
				case 0x86:
				case 0x87:
				case 0x88:
				case 0x89:
				case 0x8a:
				case 0x8b:
				case 0x8c:
				case 0x8d:
				case 0x8e:
				case 0x8f:
				case 0x90:
				case 0x91:
				case 0x92:
				case 0x93:
				case 0x94:
				case 0x95:
				case 0x96:
				case 0x97:
				case 0x98:
				case 0x99:
				case 0x9a:
				case 0x9b:
				case 0x9c:
				case 0x9d:
				case 0x9e:
				case 0x9f:
					K054000_w(machine, offset-0x80, data);
					break;

				default:
					logerror("Unknown LE 48xx register write: %x to %x (PC=%x)\n", data, offset, activecpu_get_pc());
					break;
			}
		}
		else if (offset < 0x1800)
		{
			K053245_w(machine, (offset - 0x0800) & 0x07ff, data);

		}
		else if (offset < 0x2000)
			K056832_ram_code_lo_w(machine, offset - 0x1800, data);
		else if (offset < 0x2800)
			K056832_ram_code_hi_w(machine, offset - 0x2000, data);
		else if (offset < 0x3000)
			K056832_ram_attr_lo_w(machine, offset - 0x2800, data);
		else // (offset < 0x3800)
			K056832_ram_attr_hi_w(machine, offset - 0x3000, data);
	}
}