void gd405ex_set_fpga_reset(unsigned state) { int legacy = get_fpga_state(0) & FPGA_STATE_PLATFORM; if (legacy) { if (state) { out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_RESET); out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_RESET); } else { out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_BOOT); out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_BOOT); } } else { pca9698_set_value(0x22, 39, state ? 0 : 1); } }
int pca9698_direction_output(u8 addr, unsigned gpio, int value) { u8 data[PCA9698_BUFFER_SIZE]; int res; res = pca9698_set_value(addr, gpio, value); if (res) return res; res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); if (res) return res; pca9698_set_bit(gpio, data, 0); return pca9698_write40(addr, PCA9698_REG_CONFIG, data); }
void mpc8308_set_fpga_reset(uint state) { pca9698_set_value(0x20, 4, state ? 0 : 1); }
void mpc8308_set_fpga_reset(unsigned state) { pca9698_set_value(0x20, 26, state ? 0 : 1); }