Exemple #1
0
u_int32_t
pmc_eeprom_read (long addr, long mem_offset)
{
    u_int32_t   data;           /* Data from chip */

    if (!ByteReverseBuilt)
        BuildByteReverse ();

    mem_offset = ByteReverse[0x7F & mem_offset];        /* Reverse address */
    /*
     * NOTE: The max offset address is 128 or half the reversal table. So the
     * LSB is always zero and counts as a built in shift of one bit.  So even
     * though we need to shift 3 bits to make room for the command, we only
     * need to shift twice more because of the built in shift.
     */
    mem_offset <<= 2;               /* Shift for command */
    mem_offset |= EPROM_READ;       /* Add command */

    eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP);   /* Output chip address */

    data = eeprom_get_byte (addr);  /* Read chip data */

    pci_write_32 ((u_int32_t *) addr, 0);       /* Remove Chip Select from
                                                 * EEPROM */

    return (data & 0x000000FF);
}
Exemple #2
0
/**
 ** Read some reserved location w/in the COMET chip as a usable
 ** VMETRO trigger point or other trace marking event.
 **/

#include "comet.h"

extern ci_t *CI;                /* dummy pointer to board ZERO's data */
void
VMETRO_TRACE (void *x)
{
    u_int32_t   y = (u_int32_t) x;

    pci_write_32 ((u_int32_t *) &CI->cpldbase->leds, y);
}
u_int32_t
pmc_eeprom_read (long addr, long mem_offset)
{
    u_int32_t   data;           /*                */

    if (!ByteReverseBuilt)
        BuildByteReverse ();

    mem_offset = ByteReverse[0x7F & mem_offset];        /*                 */
    /*
                                                                             
                                                                             
                                                                           
                                                              
     */
    mem_offset <<= 2;               /*                   */
    mem_offset |= EPROM_READ;       /*             */

    eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP);   /*                     */

    data = eeprom_get_byte (addr);  /*                */

    pci_write_32 ((u_int32_t *) addr, 0);       /*                        
                                                          */

    return (data & 0x000000FF);
}
STATIC void
enable_pmc_eeprom (long addr)
{
    eeprom_put_byte (addr, EPROM_EWEN, SIZE_ADDR_OP);

    pci_write_32 ((u_int32_t *) addr, 0);       
}
int
pmc_eeprom_write (long addr, long mem_offset, u_int32_t data)
{
    volatile u_int32_t temp;
    int         count;

    if (!ByteReverseBuilt)
        BuildByteReverse ();

    mem_offset = ByteReverse[0x7F & mem_offset];        
    mem_offset <<= 2;               
    mem_offset |= EPROM_WRITE;      

    eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP);   

    data = ByteReverse[0xFF & data];
    eeprom_put_byte (addr, data, NUM_OF_BITS);  

    pci_write_32 ((u_int32_t *) addr, 0);       

    pci_write_32 ((u_int32_t *) addr, EPROM_ENCS);      
    temp = pci_read_32 ((u_int32_t *) addr);    
    temp = pci_read_32 ((u_int32_t *) addr);
    if (temp & EPROM_ACTIVE_IN_BIT)
    {
        temp = pci_read_32 ((u_int32_t *) addr);
        if (temp & EPROM_ACTIVE_IN_BIT)
        {
            pci_write_32 ((u_int32_t *) addr, 0);       
            return (1);
        }
    }
    count = 1000;
    while (count--)
    {
        for (temp = 0; temp < 0x10; temp++)
            OS_uwait_dummy ();

        if (pci_read_32 ((u_int32_t *) addr) & EPROM_ACTIVE_IN_BIT)
            break;
    }

    if (count == -1)
        return (2);

    return (0);
}
Exemple #6
0
STATIC void
enable_pmc_eeprom (long addr)
{
    eeprom_put_byte (addr, EPROM_EWEN, SIZE_ADDR_OP);

    pci_write_32 ((u_int32_t *) addr, 0);       /* this removes Chip Select
                                                 * from EEPROM */
}
Exemple #7
0
void
eeprom_put_byte (long addr, long data, int count)
{
    u_int32_t output;

    while (--count >= 0)
    {
        output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0; /* Get next data bit */
        output |= EPROM_ENCS;       /* Add Chip Select */
        data >>= 1;

        eeprom_delay ();
        pci_write_32 ((u_int32_t *) addr, output);      /* Output it */
    }
}
void
eeprom_put_byte (long addr, long data, int count)
{
    u_int32_t output;

    while (--count >= 0)
    {
        output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0; 
        output |= EPROM_ENCS;       
        data >>= 1;

        eeprom_delay ();
        pci_write_32 ((u_int32_t *) addr, output);      
    }
}
Exemple #9
0
int
pmc_eeprom_write (long addr, long mem_offset, u_int32_t data)
{
    volatile u_int32_t temp;
    int         count;

    if (!ByteReverseBuilt)
        BuildByteReverse ();

    mem_offset = ByteReverse[0x7F & mem_offset];        /* Reverse address */
    /*
     * NOTE: The max offset address is 128 or half the reversal table. So the
     * LSB is always zero and counts as a built in shift of one bit.  So even
     * though we need to shift 3 bits to make room for the command, we only
     * need to shift twice more because of the built in shift.
     */
    mem_offset <<= 2;               /* Shift for command */
    mem_offset |= EPROM_WRITE;      /* Add command */

    eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP);   /* Output chip address */

    data = ByteReverse[0xFF & data];/* Reverse data */
    eeprom_put_byte (addr, data, NUM_OF_BITS);  /* Output chip data */

    pci_write_32 ((u_int32_t *) addr, 0);       /* Remove Chip Select from
                                                 * EEPROM */

/*
**  Must see Data In at a low state before completing this transaction.
**
**  Afterwards, the data bit will return to a high state, ~6 ms, terminating
**  the operation.
*/
    pci_write_32 ((u_int32_t *) addr, EPROM_ENCS);      /* Re-enable Chip Select */
    temp = pci_read_32 ((u_int32_t *) addr);    /* discard first read */
    temp = pci_read_32 ((u_int32_t *) addr);
    if (temp & EPROM_ACTIVE_IN_BIT)
    {
        temp = pci_read_32 ((u_int32_t *) addr);
        if (temp & EPROM_ACTIVE_IN_BIT)
        {
            pci_write_32 ((u_int32_t *) addr, 0);       /* Remove Chip Select
                                                         * from EEPROM */
            return (1);
        }
    }
    count = 1000;
    while (count--)
    {
        for (temp = 0; temp < 0x10; temp++)
            OS_uwait_dummy ();

        if (pci_read_32 ((u_int32_t *) addr) & EPROM_ACTIVE_IN_BIT)
            break;
    }

    if (count == -1)
        return (2);

    return (0);
}