/**
* \brief Callback function for PDCA interrupt.
*/
static void pdca_transfer_done(enum pdca_channel_status status)
{
/* Get PDCA RX channel status and check if PDCA transfer complete */
if (status == PDCA_CH_TRANSFER_COMPLETED) {
/* Configure PDCA for data transfer */
pdca_channel_write_load(CONFIG_ADC_PDCA_RX_CHANNEL, g_adc_sample_data, 2);
pdca_channel_write_load(CONFIG_ADC_PDCA_TX_CHANNEL, g_adc_cdma_first_cfg, 2);
g_uc_condone_flag = 1;
}
}
/**
* \brief Callback function for PDCA interrupt.
*/
static void pdca_transfer_done(enum pdca_channel_status status)
{
if (status == PDCA_CH_TRANSFER_COMPLETED) {
pdca_channel_write_load(CONFIG_ADC_PDCA_RX_CHANNEL,
g_adc_sample_data, 2);
pdca_channel_write_load(CONFIG_ADC_PDCA_TX_CHANNEL,
g_adc_cdma_first_cfg, 2);
pdca_channel_disable_interrupt(CONFIG_ADC_PDCA_RX_CHANNEL,
PDCA_IER_TRC);
pdca_channel_disable_interrupt(CONFIG_ADC_PDCA_TX_CHANNEL,
PDCA_IER_TRC);
}
}
/**
* \brief Interrupt handler for TC00. Record the number of bytes received,
* and then restart a read transfer on the USART if the transfer was stopped.
*/
void TC00_Handler(void)
{
uint32_t ul_status;
uint32_t ul_byte_total = 0;
/* Read TC0 Status. */
ul_status = tc_get_status(TC0, 0);
/* RC compare. */
if ((ul_status & TC_SR_CPCS) == TC_SR_CPCS) {
/* Flush PDC buffer. */
ul_byte_total = BUFFER_SIZE -
pdca_channel_read_load_size(PDCA_RX_CHANNEL);
if ((ul_byte_total != 0) && (ul_byte_total != BUFFER_SIZE)) {
/* Log current size. */
g_uc_transend_flag = 1;
if (pdca_channel_read_reload_size(PDCA_RX_CHANNEL) == 0) {
gs_ul_size_buffer = BUFFER_SIZE;
gs_ul_size_nextbuffer = ul_byte_total;
} else {
gs_ul_size_buffer = ul_byte_total;
gs_ul_size_nextbuffer = 0;
}
/* Trigger USART Receive Buffer Full Interrupt. */
/* Restart read on buffer. */
pdca_channel_write_reload(PDCA_RX_CHANNEL,
(void *)gs_puc_nextbuffer[gs_uc_buf_num], 0);
pdca_channel_write_load(PDCA_RX_CHANNEL,
(void *)gs_puc_buffer[gs_uc_buf_num], 0);
}
}
}
/**
* \brief Interrupt handler for USART. Echo the bytes received and start the
* next receive.
*/
void USART_Handler(void)
{
uint32_t ul_status;
/* Read USART Status. */
ul_status = usart_get_status(BOARD_USART);
/* Receive buffer is full. */
if (ul_status & US_CSR_RXBUFF) {
/* Disable timer. */
tc_stop(TC0, 0);
/* Echo back buffer. */
pdca_channel_write_load(PDCA_TX_CHANNEL,
(void *)gs_puc_buffer[gs_uc_buf_num],
gs_ul_size_buffer);
pdca_channel_write_reload(PDCA_TX_CHANNEL,
(void *)gs_puc_nextbuffer[gs_uc_buf_num],
gs_ul_size_nextbuffer);
if (g_uc_transend_flag) {
gs_ul_size_buffer = BUFFER_SIZE;
gs_ul_size_nextbuffer = BUFFER_SIZE;
g_uc_transend_flag = 0;
}
gs_uc_buf_num = MAX_BUF_NUM - gs_uc_buf_num;
/* Restart read on buffer. */
pdca_channel_write_load(PDCA_RX_CHANNEL,
(void *)gs_puc_buffer[gs_uc_buf_num], BUFFER_SIZE);
pdca_channel_write_reload(PDCA_RX_CHANNEL,
(void *)gs_puc_nextbuffer[gs_uc_buf_num], BUFFER_SIZE);
/* Restart timer. */
tc_start(TC0, 0);
}
}
/**
* \brief Application entry point for PARC example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint32_t uc_key;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
parc_port_source_simulation_config();
//! [parc_variables]
struct parc_module module_inst;
struct parc_config config;
//! [parc_variables]
/* Output example information. */
puts(STRING_HEADER);
/* Configure TC. */
configure_tc();
/* Start timer. */
tc_start(TC0, 0);
//! [parc_get_defaults]
// Get default configuration
parc_get_config_defaults(&config);
//! [parc_get_defaults]
printf("Press y to sample the data when both data enable pins are enabled.\r\n");
printf("Press n to sample the data, don't care the status of the data enable pins.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
usart_read(CONF_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample the data when both data enable pins are enabled. */
config.smode = PARC_SMODE_PCEN1_AND_PCEN2_H;
ioport_set_pin_level(PIN_PCEN1_INPUT, IOPORT_PIN_LEVEL_HIGH);
ioport_set_pin_level(PIN_PCEN2_INPUT, IOPORT_PIN_LEVEL_HIGH);
printf("Receive data when both data enable pins are enabled.\r\n");
} else {
/* Sample the data, don't care the status of the data enable pins. */
config.smode = PARC_SMODE_ALWAYS;
printf("Receive data, don't care the status of the data enable pins.\r\n");
}
printf("Press y to sample all the data.\r\n");
printf("Press n to sample the data only one out of two.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
usart_read(CONF_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample all the data. */
config.capture_mode = PARC_BOTH_CAPTURE;
printf("All data are sampled.\r\n");
} else {
/* Sample the data only one out of two. */
config.capture_mode = PARC_EVEN_CAPTURE;
printf("Only one out of two data is sampled, with an even index.\r\n");
}
//! [parc_init_enable_and_start]
//! [parc_init_enable_and_start_1]
// Initialize PARC.
parc_init(&module_inst, PARC, &config);
//! [parc_init_enable_and_start_1]
//! [parc_init_enable_and_start_2]
// Enable the PARC
parc_enable(&module_inst);
// Start capture.
parc_start_capture(&module_inst);
//! [parc_init_enable_and_start_2]
//! [parc_init_enable_and_start]
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PDCA_PARC_CHANNEL, &PDCA_PARC_OPTIONS);
/* Set callback for PDCA interrupt. */
pdca_channel_set_callback(PDCA_PARC_CHANNEL,
pdca_parc_callback,PDCA_0_IRQn,1,PDCA_IER_RCZ);
/* Enable PDCA channel, start receiving data. */
pdca_channel_enable(PDCA_PARC_CHANNEL);
/* Start read PARC data capture via PDCA. */
pdca_channel_write_load(PDCA_PARC_CHANNEL,
(void *)gs_puc_buffer, BUFFER_SIZE);
/* Main loop. */
while(1) {
}
}
/**
* \brief Test audio data transfer and receive.
*
* \param test Current test case.
*/
static void run_iis_test(const struct test_case *test)
{
uint32_t i;
struct iis_config config;
struct iis_dev_inst dev_inst;
struct genclk_config gencfg;
struct pll_config pcfg;
/* Set the GCLK according to the sample rate */
genclk_config_defaults(&gencfg, IISC_GCLK_NUM);
/* CPUCLK 48M */
pll_config_init(&pcfg, PLL_SRC_OSC0, 2, 96000000 /
BOARD_OSC0_HZ);
pll_enable(&pcfg, 0);
sysclk_set_prescalers(0, 0, 0, 0, 0);
pll_wait_for_lock(0);
sysclk_set_source(SYSCLK_SRC_PLL0);
/* GCLK according fs ratio */
genclk_enable_source(GENCLK_SRC_CLK_CPU);
genclk_config_set_source(&gencfg, GENCLK_SRC_CLK_CPU);
genclk_config_set_divider(&gencfg, 4);
genclk_enable(&gencfg, IISC_GCLK_NUM);
/* Set the configuration */
iis_get_config_defaults(&config);
config.data_format = IIS_DATE_16BIT_COMPACT;
config.slot_length = IIS_SLOT_LENGTH_16BIT;
config.fs_ratio = IIS_FS_RATE_256;
config.tx_channels = IIS_CHANNEL_STEREO;
config.rx_channels = IIS_CHANNEL_STEREO;
config.tx_dma = IIS_ONE_DMA_CHANNEL_FOR_BOTH_CHANNELS;
config.rx_dma = IIS_ONE_DMA_CHANNEL_FOR_BOTH_CHANNELS;
config.loopback = true;
iis_init(&dev_inst, IISC, &config);
/* Enable the IIS module. */
iis_enable(&dev_inst);
/* Config PDCA module */
pdca_enable(PDCA);
pdca_channel_set_config(PDCA_IISC_CHANNEL0, &pdca_iisc_config_tx);
pdca_channel_set_config(PDCA_IISC_CHANNEL1, &pdca_iisc_config_rx);
pdca_channel_write_load(PDCA_IISC_CHANNEL0,
(void *)output_samples, SOUND_SAMPLES / 2);
pdca_channel_write_load(PDCA_IISC_CHANNEL1,
(void *)input_samples, SOUND_SAMPLES / 2);
pdca_channel_enable(PDCA_IISC_CHANNEL0);
pdca_channel_enable(PDCA_IISC_CHANNEL1);
/* Enable the functions */
iis_enable_transmission(&dev_inst);
iis_enable_clocks(&dev_inst);
/**
* Since the transfer and receive timing is not under control, we
* need adjust here the enable sequence and add some delay
* functions if it's needed.
*/
delay_us(20);
iis_enable_reception(&dev_inst);
while (!(pdca_get_channel_status(PDCA_IISC_CHANNEL1)
== PDCA_CH_TRANSFER_COMPLETED)) {
}
/* Disable the PDCA module. */
pdca_channel_disable(PDCA_IISC_CHANNEL0);
pdca_channel_disable(PDCA_IISC_CHANNEL1);
pdca_disable(PDCA);
/* Disable the IISC module. */
iis_disable(&dev_inst);
for (i = 0; i < SOUND_SAMPLES; i++) {
if (input_samples[i] != output_samples[i]) {
flag = false;
}
}
test_assert_true(test, flag == true, "Audio data did not match!");
}
/**
* \brief usart_rs485 Application entry point.
*
* Configure USART in RS485 mode. If the application starts earlier, it acts
* as a receiver. Otherwise, it should be a transmitter.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint8_t uc_receive, uc_send = SYNC_CHAR;
uint32_t time_elapsed = 0;
uint32_t i;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Output example information. */
puts(STRING_HEADER);
/* 1ms tick. */
configure_systick();
/* Configure USART. */
configure_usart();
/* Initialize receiving buffer to distinguish with the sent frame. */
memset(g_uc_receive_buffer, 0x0, BUFFER_SIZE);
/*
* Enable transmitter here, and disable receiver first, to avoid receiving
* characters sent by itself. It's necessary for half duplex RS485.
*/
usart_enable_tx(BOARD_USART);
usart_disable_rx(BOARD_USART);
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);
pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
/* Send a sync character XON (0x11). */
pdca_channel_write_load(PDCA_TX_CHANNEL, &uc_send, 1);
/* Enable transfer PDCA channel */
pdca_channel_enable(PDCA_TX_CHANNEL);
/* Delay until the line is cleared, an estimated time used. */
wait(50);
/* Then enable receiver. */
usart_enable_rx(BOARD_USART);
/* Read the acknowledgement. */
pdca_channel_write_load(PDCA_RX_CHANNEL, &uc_receive, 1);
/* Enable PDCA channel */
pdca_channel_enable(PDCA_RX_CHANNEL);
/* Wait until time out or acknowledgement is received. */
time_elapsed = get_tick_count();
while (pdca_get_channel_status(PDCA_RX_CHANNEL) !=
PDCA_CH_TRANSFER_COMPLETED) {
if (get_tick_count() - time_elapsed > TIMEOUT) {
break;
}
}
/* If acknowledgement received in a short time. */
if (pdca_get_channel_status(PDCA_RX_CHANNEL) ==
PDCA_CH_TRANSFER_COMPLETED) {
/* Acknowledgement. */
if (uc_receive == ACK_CHAR) {
/* Act as transmitter, start transmitting. */
puts("-I- Act as transmitter.\r");
g_state = TRANSMITTING;
puts("-I- Start transmitting!\r");
pdca_channel_write_load(PDCA_TX_CHANNEL, g_uc_transmit_buffer,
BUFFER_SIZE);
/* Enable PDCA interrupt */
pdca_channel_set_callback(PDCA_TX_CHANNEL, PDCA_TX_Handler,
PDCA_1_IRQn, 1, PDCA_IER_TRC);
while (g_state != TRANSMITTED) {
}
puts("-I- Transmit done!\r");
while (1) {
}
}
} else {
/* Start receiving, act as receiver. */
puts("-I- Act as receiver.\r");
puts("-I- Receiving sync character.\r");
while (pdca_get_channel_status(PDCA_RX_CHANNEL) !=
PDCA_CH_TRANSFER_COMPLETED) {
}
/* Sync character is received. */
if (uc_receive == SYNC_CHAR) {
puts("-I- Received sync character.\r");
/* SEND XOff as acknowledgement. */
uc_send = ACK_CHAR;
/*
* Delay to prevent the character from being discarded by
* transmitter due to responding too soon.
*/
wait(100);
ioport_set_pin_level(RS485_USART_CTS_PIN, 1);
pdca_channel_write_load(PDCA_TX_CHANNEL, &uc_send, 1);
g_state = RECEIVING;
puts("-I- Start receiving buffer!\r");
pdca_channel_write_load(PDCA_RX_CHANNEL, g_uc_receive_buffer,
BUFFER_SIZE);
/* Enable PDCA interrupt */
pdca_channel_set_callback(PDCA_RX_CHANNEL, PDCA_RX_Handler,
PDCA_0_IRQn, 1, PDCA_IER_TRC);
ioport_set_pin_level(RS485_USART_CTS_PIN, 0);
while (g_state != RECEIVED) {
}
}
}
i = 0;
/* Check received frame. */
while (i < BUFFER_SIZE) {
if (g_uc_transmit_buffer[i] != g_uc_receive_buffer[i]) {
puts("-E- Error occurred while receiving!\r");
/* Infinite loop here. */
while (1) {
}
}
i++;
}
puts("-I- Received buffer successfully!\r");
while (1) {
}
}
