static void __init arch_mem_init(char **cmdline_p) { extern void plat_mem_setup(void); /* call board setup routine */ plat_mem_setup(); pr_info("Determined physical RAM map:\n"); print_memory_map(); strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); if (usermem) { pr_info("User-defined physical RAM map:\n"); print_memory_map(); } bootmem_init(); device_tree_init(); sparse_init(); plat_swiotlb_setup(); paging_init(); }
static void __init arch_mem_init(char **cmdline_p) { extern void plat_mem_setup(void); /* call board setup routine */ plat_mem_setup(); pr_info("Determined physical RAM map:\n"); print_memory_map(); strlcpy(command_line, arcs_cmdline, sizeof(command_line)); strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); if (usermem) { pr_info("User-defined physical RAM map:\n"); print_memory_map(); } bootmem_init(); #ifndef CONFIG_NLM_16G_MEM_SUPPORT #ifndef CONFIG_NUMA setup_mapped_kernel_tlbs(FALSE, TRUE); #endif #endif sparse_init(); paging_init(); }
static void __init arch_mem_init(char **cmdline_p) { extern void plat_mem_setup(void); /* call board setup routine */ plat_mem_setup(); printk("Determined physical RAM map:\n"); print_memory_map(); strlcpy(command_line, arcs_cmdline, sizeof(command_line)); strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); if (usermem) { printk("User-defined physical RAM map:\n"); print_memory_map(); } bootmem_init(); #ifdef CONFIG_SPARSEMEM sparse_memory_present_with_active_regions(MAX_NUMNODES); #endif sparse_init(); paging_init(); }
static void __init arch_mem_init(char **cmdline_p) { extern void plat_mem_setup(void); phys_t init_mem, init_end, init_size; /* call board setup routine */ plat_mem_setup(); init_mem = PFN_UP(__pa_symbol(&__init_begin)) << PAGE_SHIFT; init_end = PFN_DOWN(__pa_symbol(&__init_end)) << PAGE_SHIFT; init_size = init_end - init_mem; if (init_size) { /* Make sure it is in the boot_mem_map */ int i, found; found = 0; for (i = 0; i < boot_mem_map.nr_map; i++) { if (init_mem >= boot_mem_map.map[i].addr && init_mem < (boot_mem_map.map[i].addr + boot_mem_map.map[i].size)) { found = 1; break; } } if (!found) add_memory_region(init_mem, init_size, BOOT_MEM_INIT_RAM); } printk("Determined physical RAM map:\n"); print_memory_map(); strlcpy(command_line, arcs_cmdline, sizeof(command_line)); strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); if (usermem) { printk("User-defined physical RAM map:\n"); print_memory_map(); } bootmem_init(); sparse_init(); paging_init(); }
static void __init arch_mem_init(char **cmdline_p) { extern void plat_mem_setup(void); /* call board setup routine */ plat_mem_setup(); pr_info("Determined physical RAM map:\n"); print_memory_map(); #ifdef CONFIG_CMDLINE_BOOL #ifdef CONFIG_CMDLINE_OVERRIDE strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); #else if (builtin_cmdline[0]) { strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE); strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE); } strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); #endif #else strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); #endif strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); if (usermem) { pr_info("User-defined physical RAM map:\n"); print_memory_map(); } bootmem_init(); #if defined (CONFIG_RALINK_MT7621) && defined (CONFIG_RT2880_DRAM_512M) reserve_bootmem(0x1C000000, 64*1024*1024, BOOTMEM_DEFAULT); #endif device_tree_init(); sparse_init(); plat_swiotlb_setup(); paging_init(); }
/* * On SH machines the conventional approach is to stash system RAM * in node 0, and other memory blocks in to node 1 and up, ordered by * latency. Each node's pgdat is node-local at the beginning of the node, * immediately followed by the node mem map. */ void __init setup_memory(void) { unsigned long free_pfn = PFN_UP(__pa(_end)); /* * Node 0 sets up its pgdat at the first available pfn, * and bumps it up before setting up the bootmem allocator. */ NODE_DATA(0) = pfn_to_kaddr(free_pfn); memset(NODE_DATA(0), 0, sizeof(struct pglist_data)); free_pfn += PFN_UP(sizeof(struct pglist_data)); NODE_DATA(0)->bdata = &bootmem_node_data[0]; /* Set up node 0 */ setup_bootmem_allocator(free_pfn); /* Give the platforms a chance to hook up their nodes */ plat_mem_setup(); }
static void __init arch_mem_init(char **cmdline_p) { extern void plat_mem_setup(void); /* call board setup routine */ plat_mem_setup(); pr_info("Determined physical RAM map:\n"); print_memory_map(); #ifdef CONFIG_CMDLINE_BOOL #ifdef CONFIG_CMDLINE_OVERRIDE strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); #else if (builtin_cmdline[0]) { strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE); strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE); } strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); #endif #else strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); #endif strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); if (usermem) { pr_info("User-defined physical RAM map:\n"); print_memory_map(); } bootmem_init(); sparse_init(); paging_init(); #ifdef CONFIG_DUMP_PREV_OOPS_MSG reserve_bootmem(CPHYSADDR(CONFIG_DUMP_PREV_OOPS_MSG_BUF_ADDR), CONFIG_DUMP_PREV_OOPS_MSG_BUF_LEN, BOOTMEM_DEFAULT); #endif }
static void __init arch_mem_init(char **cmdline_p) { extern void plat_mem_setup(void); /* call board setup routine */ plat_mem_setup(); pr_info("Determined physical RAM map:\n"); print_memory_map(); #ifdef CONFIG_CMDLINE_BOOL #ifdef CONFIG_CMDLINE_OVERRIDE strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); #else if (builtin_cmdline[0]) { strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE); strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE); } strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); #endif #else strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); #endif strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); if (usermem) { pr_info("User-defined physical RAM map:\n"); print_memory_map(); } bootmem_init(); device_tree_init(); sparse_init(); paging_init(); }
/* * On SH machines the conventional approach is to stash system RAM * in node 0, and other memory blocks in to node 1 and up, ordered by * latency. Each node's pgdat is node-local at the beginning of the node, * immediately followed by the node mem map. */ void __init setup_memory(void) { unsigned long free_pfn = PFN_UP(__pa(_end)); u64 base = min_low_pfn << PAGE_SHIFT; u64 size = (max_low_pfn << PAGE_SHIFT) - base; lmb_add(base, size); /* Reserve the LMB regions used by the kernel, initrd, etc.. */ lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET, (PFN_PHYS(free_pfn) + PAGE_SIZE - 1) - (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET)); /* * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET. */ if (CONFIG_ZERO_PAGE_OFFSET != 0) lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET); lmb_analyze(); lmb_dump_all(); /* * Node 0 sets up its pgdat at the first available pfn, * and bumps it up before setting up the bootmem allocator. */ NODE_DATA(0) = pfn_to_kaddr(free_pfn); memset(NODE_DATA(0), 0, sizeof(struct pglist_data)); free_pfn += PFN_UP(sizeof(struct pglist_data)); NODE_DATA(0)->bdata = &bootmem_node_data[0]; /* Set up node 0 */ setup_bootmem_allocator(free_pfn); /* Give the platforms a chance to hook up their nodes */ plat_mem_setup(); }
static void __init arch_mem_init(char **cmdline_p) { phys_t init_mem, init_end, init_size; extern void plat_mem_setup(void); /* call board setup routine */ plat_mem_setup(); init_mem = PFN_UP(__pa_symbol(&__init_begin)) << PAGE_SHIFT; init_end = PFN_DOWN(__pa_symbol(&__init_end)) << PAGE_SHIFT; init_size = init_end - init_mem; if (init_size) { /* Make sure it is in the boot_mem_map */ int i, found; found = 0; for (i = 0; i < boot_mem_map.nr_map; i++) { if (init_mem >= boot_mem_map.map[i].addr && init_mem < (boot_mem_map.map[i].addr + boot_mem_map.map[i].size)) { found = 1; break; } } if (!found) add_memory_region(init_mem, init_size, BOOT_MEM_INIT_RAM); } pr_info("Determined physical RAM map:\n"); print_memory_map(); #ifdef CONFIG_CMDLINE_BOOL #ifdef CONFIG_CMDLINE_OVERRIDE strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); #else if (builtin_cmdline[0]) { strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE); strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE); } strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); #endif #else strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); #endif strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); if (usermem) { pr_info("User-defined physical RAM map:\n"); print_memory_map(); } bootmem_init(); device_tree_init(); sparse_init(); plat_swiotlb_setup(); paging_init(); }