static void spi_irq_handler( void* arg )
{
UNUSED_PARAMETER(arg);
#ifndef MICO_DISABLE_MCU_POWERSAVE
platform_mcu_powersave_exit_notify( );
#endif /* ifndef MICO_DISABLE_MCU_POWERSAVE */
wiced_platform_notify_irq( );
}
void sdio_irq( void )
{
uint32_t intstatus = SDIO->STA;
if ( ( intstatus & ( SDIO_STA_CCRCFAIL | SDIO_STA_DCRCFAIL | SDIO_STA_TXUNDERR | SDIO_STA_RXOVERR | SDIO_STA_STBITERR )) != 0 )
{
sdio_transfer_failed = true;
SDIO->ICR = (uint32_t) 0xffffffff;
mico_rtos_set_semaphore( &sdio_transfer_finished_semaphore );
}
else
{
if ((intstatus & (SDIO_STA_CMDREND | SDIO_STA_CMDSENT)) != 0)
{
if ( ( SDIO->RESP1 & 0x800 ) != 0 )
{
sdio_transfer_failed = true;
mico_rtos_set_semaphore( &sdio_transfer_finished_semaphore );
}
else if (current_command == SDIO_CMD_53)
{
if (current_transfer_direction == BUS_WRITE)
{
DMA2_Stream3->CR = DMA_DIR_MemoryToPeripheral |
DMA_Channel_4 | DMA_PeripheralInc_Disable | DMA_MemoryInc_Enable |
DMA_PeripheralDataSize_Word | DMA_MemoryDataSize_Word |
DMA_Mode_Normal | DMA_Priority_VeryHigh |
DMA_MemoryBurst_INC4 | DMA_PeripheralBurst_INC4 | DMA_SxCR_PFCTRL | DMA_SxCR_EN | DMA_SxCR_TCIE;
}
else
{
DMA2_Stream3->CR = DMA_DIR_PeripheralToMemory |
DMA_Channel_4 | DMA_PeripheralInc_Disable | DMA_MemoryInc_Enable |
DMA_PeripheralDataSize_Word | DMA_MemoryDataSize_Word |
DMA_Mode_Normal | DMA_Priority_VeryHigh |
DMA_MemoryBurst_INC4 | DMA_PeripheralBurst_INC4 | DMA_SxCR_PFCTRL | DMA_SxCR_EN | DMA_SxCR_TCIE;
}
}
/* Clear all command/response interrupts */
SDIO->ICR = (SDIO_STA_CMDREND | SDIO_STA_CMDSENT);
}
}
#ifndef SDIO_1_BIT
/* Check whether the external interrupt was triggered */
if ( ( intstatus & SDIO_STA_SDIOIT ) != 0 )
{
/* Clear the interrupt and then inform WICED thread */
SDIO->ICR = SDIO_ICR_SDIOITC;
platform_mcu_powersave_exit_notify( );
wiced_platform_notify_irq( );
}
#endif
}
void gpio_irq( ioport_port_t port )
{
volatile Pio* port_register = arch_ioport_port_to_base( port );
uint32_t status = port_register->PIO_ISR; /* Get interrupt status. Read clears the interrupt */
uint32_t mask = port_register->PIO_IMR;
uint32_t iter = 0;
if ( ( status != 0 ) && ( mask != 0 ) )
{
/* Call the respective GPIO interrupt handler/callback */
for ( iter = 0; iter < PINS_PER_PORT; iter++, status >>= 1, mask >>= 1 )
{
if ( ( ( mask & 0x1 ) != 0 ) && ( ( status & 0x1 ) != 0 ) && ( gpio_irq_data[port][iter].callback != NULL ) )
{
if ( gpio_irq_data[port][iter].wakeup_pin == true )
{
platform_mcu_powersave_exit_notify();
}
gpio_irq_data[port][iter].callback( gpio_irq_data[port][iter].arg );
}
}
}
}
static void sdio_int_pin_irq_handler( void* arg ) //SDIO 1 Bit mode
{
UNUSED_PARAMETER(arg);
platform_mcu_powersave_exit_notify( );
wiced_platform_notify_irq( );
}
static void sdio_oob_irq_handler( void* arg )
{
UNUSED_PARAMETER(arg);
platform_mcu_powersave_exit_notify( );
wiced_platform_notify_irq( );
}
