OSStatus MicoUartRecv( mico_uart_t uart, void* data, uint32_t size, uint32_t timeout )
{
if ( uart >= MICO_UART_NONE )
return kUnsupportedErr;
return (OSStatus) platform_uart_receive_bytes( &platform_uart_drivers[uart], (uint8_t*)data, size, timeout );
}
OSStatus internal_uart_init( mico_uart_t uart, const mico_uart_config_t* config, ring_buffer_t* optional_rx_buffer )
{
#ifndef NO_MICO_RTOS
mico_rtos_init_semaphore(&uart_interfaces[uart].tx_complete, 1);
mico_rtos_init_semaphore(&uart_interfaces[uart].rx_complete, 1);
#else
uart_interfaces[uart].tx_complete = false;
uart_interfaces[uart].rx_complete = false;
#endif
MicoMcuPowerSaveConfig(false);
/* Configure the UART TX/RX pins */
configure_uart_pins(BOARD_APP_UART_INSTANCE);
#if ADD_OS_CODE
#ifndef NO_MICO_RTOS
if(config->flags & UART_WAKEUP_ENABLE){
current_uart = uart;
mico_rtos_init_semaphore( &uart_interfaces[uart].sem_wakeup, 1 );
mico_rtos_create_thread(NULL, MICO_APPLICATION_PRIORITY, "UART_WAKEUP", thread_wakeup, 0x100, ¤t_uart);
}
#endif
#endif
//OSA_Init();
#ifdef UART_IRQ_APP
/****************************************************************/
uartConfig.baudRate = 115200;
uartConfig.bitCountPerChar = kUart8BitsPerChar;
uartConfig.parityMode = kUartParityDisabled;
uartConfig.stopBitCount = kUartOneStopBit;
/***************************************************************/
UART_DRV_Init(BOARD_APP_UART_INSTANCE, &uartState, &uartConfig);
#else
userConfig_app.chnArbitration = kEDMAChnArbitrationRoundrobin;
userConfig_app.notHaltOnError = false;
uartConfig_app.bitCountPerChar = kUart8BitsPerChar;
uartConfig_app.parityMode = kUartParityDisabled;
uartConfig_app.stopBitCount = kUartOneStopBit;
uartConfig_app.baudRate = 115200;
EDMA_DRV_Init(&state_app, &userConfig_app);
UART_DRV_EdmaInit(BOARD_APP_UART_INSTANCE, &uartStateEdma_app, &uartConfig_app);
INT_SYS_EnableIRQ(g_uartRxTxIrqId[BOARD_APP_UART_INSTANCE]);
#endif
#if RING_BUFF_ON
if (optional_rx_buffer != NULL)
{
// Note that the ring_buffer should've been initialised first
uart_interfaces[uart].rx_buffer = optional_rx_buffer;
uart_interfaces[uart].rx_size = 0;
platform_uart_receive_bytes( uart, optional_rx_buffer->buffer, optional_rx_buffer->size, 0 );
}
#endif
MicoMcuPowerSaveConfig(true);
return kNoErr;
}
OSStatus MicoUartRecv( mico_uart_t uart, void* data, uint32_t size, uint32_t timeout )
{
#if RING_BUFF_ON
if (uart_interfaces[uart].rx_buffer != NULL)
{
while (size != 0)
{
uint32_t transfer_size = MIN(uart_interfaces[uart].rx_buffer->size / 2, size);
/* Check if ring buffer already contains the required amount of data. */
if ( transfer_size > ring_buffer_used_space( uart_interfaces[uart].rx_buffer ) )
{
/* Set rx_size and wait in rx_complete semaphore until data reaches rx_size or timeout occurs */
uart_interfaces[uart].rx_size = transfer_size;
#ifndef NO_MICO_RTOS
if ( mico_rtos_get_semaphore( &uart_interfaces[uart].rx_complete, timeout) != kNoErr )
{
uart_interfaces[uart].rx_size = 0;
return kTimeoutErr;
}
#else
uart_interfaces[uart].rx_complete = false;
int delay_start = mico_get_time_no_os();
while(uart_interfaces[uart].rx_complete == false){
if(mico_get_time_no_os() >= delay_start + timeout && timeout != MICO_NEVER_TIMEOUT){
uart_interfaces[uart].rx_size = 0;
return kTimeoutErr;
}
}
#endif
/* Reset rx_size to prevent semaphore being set while nothing waits for the data */
uart_interfaces[uart].rx_size = 0;
}
size -= transfer_size;
// Grab data from the buffer
do
{
uint8_t* available_data;
uint32_t bytes_available;
//platform_log("uart receive 03");
ring_buffer_get_data( uart_interfaces[uart].rx_buffer, &available_data, &bytes_available );
bytes_available = MIN( bytes_available, transfer_size );
memcpy( data, available_data, bytes_available );
transfer_size -= bytes_available;
data = ( (uint8_t*) data + bytes_available );
ring_buffer_consume( uart_interfaces[uart].rx_buffer, bytes_available );
} while ( transfer_size != 0 );
}
if ( size != 0 )
{
return kGeneralErr;
}
else
{
return kNoErr;
}
}
else
{
return platform_uart_receive_bytes( uart, data, size, timeout );
}
#else
return platform_uart_receive_bytes( uart, data, size, timeout );
#endif
// return kNoErr;
}
// executed on rx worker thread
static void h4_rx_worker_receive_bytes(int bytes_to_read){
platform_uart_receive_bytes(wiced_bt_uart_driver, &hci_packet[rx_worker_read_pos], bytes_to_read, WICED_NEVER_TIMEOUT);
rx_worker_read_pos += bytes_to_read;
}
OSStatus internal_uart_init( mico_uart_t uart, const mico_uart_config_t* config, ring_buffer_t* optional_rx_buffer )
{
GPIO_InitTypeDef gpio_init_structure;
USART_InitTypeDef usart_init_structure;
NVIC_InitTypeDef nvic_init_structure;
DMA_InitTypeDef dma_init_structure;
#ifndef NO_MICO_RTOS
mico_rtos_init_semaphore(&uart_interfaces[uart].tx_complete, 1);
mico_rtos_init_semaphore(&uart_interfaces[uart].rx_complete, 1);
#else
uart_interfaces[uart].tx_complete = false;
uart_interfaces[uart].rx_complete = false;
#endif
MicoMcuPowerSaveConfig(false);
/* Enable GPIO peripheral clocks for TX and RX pins */
RCC_AHB1PeriphClockCmd( uart_mapping[uart].pin_rx->peripheral_clock |
uart_mapping[uart].pin_tx->peripheral_clock, ENABLE );
/* Configure USART TX Pin */
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << uart_mapping[uart].pin_tx->number );
gpio_init_structure.GPIO_Mode = GPIO_Mode_AF;
gpio_init_structure.GPIO_OType = GPIO_OType_PP;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
gpio_init_structure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init( uart_mapping[uart].pin_tx->bank, &gpio_init_structure );
GPIO_PinAFConfig( uart_mapping[uart].pin_tx->bank, uart_mapping[uart].pin_tx->number, uart_mapping[uart].gpio_af );
/* Configure USART RX Pin */
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << uart_mapping[uart].pin_rx->number );
gpio_init_structure.GPIO_Mode = GPIO_Mode_AF;
gpio_init_structure.GPIO_OType = GPIO_OType_OD;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init( uart_mapping[uart].pin_rx->bank, &gpio_init_structure );
GPIO_PinAFConfig( uart_mapping[uart].pin_rx->bank, uart_mapping[uart].pin_rx->number, uart_mapping[uart].gpio_af );
#ifndef NO_MICO_RTOS
if(config->flags & UART_WAKEUP_ENABLE){
current_uart = uart;
mico_rtos_init_semaphore( &uart_interfaces[uart].sem_wakeup, 1 );
mico_rtos_create_thread(NULL, MICO_APPLICATION_PRIORITY, "UART_WAKEUP", thread_wakeup, 0x100, ¤t_uart);
}
#endif
/* Check if any of the flow control is enabled */
if ( uart_mapping[uart].pin_cts && (config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
{
/* Enable peripheral clock */
RCC_AHB1PeriphClockCmd( uart_mapping[uart].pin_cts->peripheral_clock, ENABLE );
/* Configure CTS Pin */
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << uart_mapping[uart].pin_cts->number );
gpio_init_structure.GPIO_Mode = GPIO_Mode_AF;
gpio_init_structure.GPIO_OType = GPIO_OType_OD;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init( uart_mapping[uart].pin_cts->bank, &gpio_init_structure );
GPIO_PinAFConfig( uart_mapping[uart].pin_cts->bank, uart_mapping[uart].pin_cts->number, uart_mapping[uart].gpio_af );
}
if ( uart_mapping[uart].pin_cts && (config->flow_control == FLOW_CONTROL_RTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
{
/* Enable peripheral clock */
RCC_AHB1PeriphClockCmd( uart_mapping[uart].pin_rts->peripheral_clock, ENABLE );
/* Configure RTS Pin */
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << uart_mapping[uart].pin_rts->number );
gpio_init_structure.GPIO_Mode = GPIO_Mode_AF;
gpio_init_structure.GPIO_OType = GPIO_OType_OD;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init( uart_mapping[uart].pin_rts->bank, &gpio_init_structure );
GPIO_PinAFConfig( uart_mapping[uart].pin_rts->bank, uart_mapping[uart].pin_rts->number, uart_mapping[uart].gpio_af );
}
/* Enable UART peripheral clock */
uart_mapping[uart].usart_peripheral_clock_func( uart_mapping[uart].usart_peripheral_clock, ENABLE );
/**************************************************************************
* Initialise STM32 USART registers
* NOTE:
* - Both transmitter and receiver are disabled until usart_enable_transmitter/receiver is called.
* - Only 1 and 2 stop bits are implemented at the moment.
**************************************************************************/
usart_init_structure.USART_Mode = 0;
usart_init_structure.USART_BaudRate = config->baud_rate;
usart_init_structure.USART_WordLength = ( ( config->data_width == DATA_WIDTH_9BIT ) ||
( ( config->data_width == DATA_WIDTH_8BIT ) && ( config->parity != NO_PARITY ) ) ) ? USART_WordLength_9b : USART_WordLength_8b;
usart_init_structure.USART_StopBits = ( config->stop_bits == STOP_BITS_1 ) ? USART_StopBits_1 : USART_StopBits_2;
switch ( config->parity )
{
case NO_PARITY:
usart_init_structure.USART_Parity = USART_Parity_No;
break;
case EVEN_PARITY:
usart_init_structure.USART_Parity = USART_Parity_Even;
break;
case ODD_PARITY:
usart_init_structure.USART_Parity = USART_Parity_Odd;
break;
default:
return kParamErr;
}
switch ( config->flow_control )
{
case FLOW_CONTROL_DISABLED:
usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
break;
case FLOW_CONTROL_CTS:
usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_CTS;
break;
case FLOW_CONTROL_RTS:
usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS;
break;
case FLOW_CONTROL_CTS_RTS:
usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS_CTS;
break;
default:
return kParamErr;
}
/* Initialise USART peripheral */
USART_Init( uart_mapping[uart].usart, &usart_init_structure );
/**************************************************************************
* Initialise STM32 DMA registers
* Note: If DMA is used, USART interrupt isn't enabled.
**************************************************************************/
/* Enable DMA peripheral clock */
uart_mapping[uart].tx_dma_peripheral_clock_func( uart_mapping[uart].tx_dma_peripheral_clock, ENABLE );
uart_mapping[uart].rx_dma_peripheral_clock_func( uart_mapping[uart].rx_dma_peripheral_clock, ENABLE );
/* Fill init structure with common DMA settings */
dma_init_structure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
dma_init_structure.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init_structure.DMA_Priority = DMA_Priority_VeryHigh;
dma_init_structure.DMA_FIFOMode = DMA_FIFOMode_Disable;
dma_init_structure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
dma_init_structure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
dma_init_structure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
if ( config->data_width == DATA_WIDTH_9BIT )
{
dma_init_structure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
dma_init_structure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
}
else
{
dma_init_structure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
dma_init_structure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
}
/* Initialise TX DMA */
DMA_DeInit( uart_mapping[uart].tx_dma_stream );
dma_init_structure.DMA_Channel = uart_mapping[uart].tx_dma_channel;
dma_init_structure.DMA_PeripheralBaseAddr = (uint32_t) &uart_mapping[uart].usart->DR;
dma_init_structure.DMA_Memory0BaseAddr = (uint32_t) 0;
dma_init_structure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
dma_init_structure.DMA_BufferSize = 0;
dma_init_structure.DMA_Mode = DMA_Mode_Normal;
DMA_Init( uart_mapping[uart].tx_dma_stream, &dma_init_structure );
/* Initialise RX DMA */
DMA_DeInit( uart_mapping[uart].rx_dma_stream );
dma_init_structure.DMA_Channel = uart_mapping[uart].rx_dma_channel;
dma_init_structure.DMA_PeripheralBaseAddr = (uint32_t) &uart_mapping[uart].usart->DR;
dma_init_structure.DMA_Memory0BaseAddr = 0;
dma_init_structure.DMA_DIR = DMA_DIR_PeripheralToMemory;
dma_init_structure.DMA_BufferSize = 0;
dma_init_structure.DMA_Mode = DMA_Mode_Normal;
DMA_Init( uart_mapping[uart].rx_dma_stream, &dma_init_structure );
/**************************************************************************
* Initialise STM32 DMA interrupts
* Note: Only TX DMA interrupt is enabled.
**************************************************************************/
/* Configure TX DMA interrupt on Cortex-M3 */
nvic_init_structure.NVIC_IRQChannel = uart_mapping[uart].tx_dma_irq;
nvic_init_structure.NVIC_IRQChannelPreemptionPriority = (uint8_t) 0x5;
nvic_init_structure.NVIC_IRQChannelSubPriority = 0x8;
nvic_init_structure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init( &nvic_init_structure );
/* Enable TC (transfer complete) and TE (transfer error) interrupts on source */
DMA_ITConfig( uart_mapping[uart].tx_dma_stream, DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_FE, ENABLE );
/* Enable USART's RX DMA interfaces */
USART_DMACmd( uart_mapping[uart].usart, USART_DMAReq_Rx, ENABLE );
/**************************************************************************
* Initialise STM32 USART interrupt
**************************************************************************/
nvic_init_structure.NVIC_IRQChannel = uart_mapping[uart].usart_irq;
nvic_init_structure.NVIC_IRQChannelPreemptionPriority = (uint8_t) 0x6;
nvic_init_structure.NVIC_IRQChannelSubPriority = 0x7;
nvic_init_structure.NVIC_IRQChannelCmd = ENABLE;
/* Enable USART interrupt vector in Cortex-M3 */
NVIC_Init( &nvic_init_structure );
/* Enable USART */
USART_Cmd( uart_mapping[uart].usart, ENABLE );
/* Enable both transmit and receive */
uart_mapping[uart].usart->CR1 |= USART_CR1_TE;
uart_mapping[uart].usart->CR1 |= USART_CR1_RE;
/* Setup ring buffer */
if (optional_rx_buffer != NULL)
{
/* Note that the ring_buffer should've been initialised first */
uart_interfaces[uart].rx_buffer = optional_rx_buffer;
uart_interfaces[uart].rx_size = 0;
platform_uart_receive_bytes( uart, optional_rx_buffer->buffer, optional_rx_buffer->size, 0 );
}
else
{
/* Not using ring buffer. Configure RX DMA interrupt on Cortex-M3 */
nvic_init_structure.NVIC_IRQChannel = uart_mapping[uart].rx_dma_irq;
nvic_init_structure.NVIC_IRQChannelPreemptionPriority = (uint8_t) 0x5;
nvic_init_structure.NVIC_IRQChannelSubPriority = 0x8;
nvic_init_structure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init( &nvic_init_structure );
/* Enable TC (transfer complete) and TE (transfer error) interrupts on source */
DMA_ITConfig( uart_mapping[uart].rx_dma_stream, DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_FE, ENABLE );
}
MicoMcuPowerSaveConfig(true);
return kNoErr;
}
void UART_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
USART_InitTypeDef USART_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
mico_rtos_init_semaphore(&tx_complete, 1);
mico_rtos_init_semaphore(&rx_complete, 1);
sem_init = 1;
mico_mcu_powersave_config(mxDisable);
rx_buffer.buffer = rx_data;
rx_buffer.size = RX_BUFFER_SIZE;
rx_buffer.head = 0;
rx_buffer.tail = 0;
GPIO_CLK_INIT(USARTx_RX_GPIO_CLK, ENABLE);
USARTx_CLK_INIT(USARTx_CLK, ENABLE);
RCC_AHB1PeriphClockCmd(DMA_CLK_INIT,ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = UART_TX_DMA_Stream_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 5;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 8;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = USARTx_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = (uint8_t) 0x6;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x7;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init( &NVIC_InitStructure );
/* Configure USART pin*/
GPIO_PinAFConfig(USARTx_TX_GPIO_PORT, USARTx_TX_SOURCE, USARTx_TX_AF);
GPIO_PinAFConfig(USARTx_RX_GPIO_PORT, USARTx_RX_SOURCE, USARTx_RX_AF);
/* Configure USART Tx as alternate function */
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Pin = USARTx_TX_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(USARTx_TX_GPIO_PORT, &GPIO_InitStructure);
/* Configure USART Rx as alternate function */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Pin = USARTx_RX_PIN;
GPIO_Init(USARTx_RX_GPIO_PORT, &GPIO_InitStructure);
#ifdef MCULowPowerMode
gpio_irq_enable(USARTx_RX_GPIO_PORT, USARTx_IRQ_PIN, IRQ_TRIGGER_FALLING_EDGE, Rx_irq_handler, 0);
mico_rtos_init_semaphore(&wakeup, 1);
mico_rtos_create_thread(&uart_wakeup_thread_handler, MICO_APPLICATION_PRIORITY, "UART_WAKEUP", uart_wakeup_thread, 0x500, NULL );
#endif
USART_DeInit(USARTx);
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1 ;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USARTx, &USART_InitStructure);
USART_Cmd(USARTx, ENABLE);
USART_DMACmd(USARTx, USART_DMAReq_Rx | USART_DMAReq_Tx, ENABLE);
DMA_DeInit( UART_RX_DMA_Stream );
DMA_InitStructure.DMA_PeripheralBaseAddr = USARTx_DR_Base;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_InitStructure.DMA_Channel = DMA_Channel_4;
DMA_InitStructure.DMA_BufferSize = 0;
DMA_Init(UART_RX_DMA_Stream, &DMA_InitStructure);
platform_uart_receive_bytes( rx_buffer.buffer, rx_buffer.size);
mico_mcu_powersave_config(mxEnable);
}
