int main(int argc, const char **argv)
{
int test_result = 0;
int srcAlloc;
unsigned int *srcBuffer = 0;
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
DmaManager *dma = platformInit();
ReadTestRequestProxy *device = new ReadTestRequestProxy(IfcNames_ReadTestRequestS2H,TILE_NUMBER);
ReadTestIndication memReadIndication(IfcNames_ReadTestIndicationH2S,TILE_NUMBER);
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
for (int i = 0; i < numWords; i++)
srcBuffer[i] = i;
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
/* Test 1: check that match is ok */
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
fprintf(stderr, "Main::orig_test read numWords=%d burstLen=%d iterCnt=%d\n", numWords, burstLen, iterCnt);
portalTimerStart(0);
device->startRead(ref_srcAlloc, numWords * 4, burstLen * 4, iterCnt);
sem_wait(&test_sem);
if (mismatchCount) {
fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount);
test_result++; // failed
}
platformStatistics();
/* Test 2: check that mismatch is detected */
srcBuffer[0] = -1;
srcBuffer[numWords/2] = -1;
srcBuffer[numWords-1] = -1;
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
fprintf(stderr, "Starting second read, mismatches expected\n");
mismatchCount = 0;
device->startRead(ref_srcAlloc, numWords * 4, burstLen * 4, iterCnt);
sem_wait(&test_sem);
if (mismatchCount != 3/*number of errors introduced above*/ * iterCnt) {
fprintf(stderr, "Main::second test failed to match mismatchCount=%d (expected %d) iterCnt=%d numWords=%d.\n",
mismatchCount, 3*iterCnt,
iterCnt, numWords);
test_result++; // failed
}
#if 0
MonkitFile pmf("perf.monkit");
pmf.setHwCycles(cycles)
.setReadBwUtil(read_util)
.writeFile();
#endif
return test_result;
}
int main(int argc, char **argv) {
EncoderTestRequestProxy *device = new EncoderTestRequestProxy(IfcNames_EncoderTestRequestS2H);
EncoderTestIndication deviceIndication(IfcNames_EncoderTestIndicationH2S);
MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_MemServerRequestS2H);
MMURequestProxy *dmap = new MMURequestProxy(IfcNames_MMURequestS2H);
DmaManager *dma = new DmaManager(dmap);
MemServerIndication hostMemServerIndication(hostMemServerRequest, IfcNames_MemServerIndicationH2S);
MMUIndication hostMMUIndication(dma, IfcNames_MMUIndicationH2S);
const std::string path="../../data/xgmii.data";
std::ifstream traceinfo(path.c_str());
std::string line;
int srcAlloc;
srcAlloc = portalAlloc(alloc_sz, 0);
unsigned long int *srcBuffer = (unsigned long int *)portalMmap(srcAlloc, alloc_sz);
for (int i = 0; i < numWords; /*NONE*/ ) {
std::getline(traceinfo, line);
std::istringstream iss(line);
std::string first_64;
iss >> first_64;
std::string second_64;
iss >> second_64;
srcBuffer[i++] = strtoul(second_64.c_str(), NULL, 16); /*second_64 is LSB*/
srcBuffer[i++] = strtoul(first_64.c_str(), NULL, 16);
}
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
printf( "Main::starting read %08x\n", numWords);
device->startEncoder(ref_srcAlloc, numWords, burstLen, 1);
sem_wait(&test_sem);
return 0;
}
static void fill_pixels(int offset)
{
int *ptr = dataptr[frame_index];
for (int line = 0; line < nlines; line++)
for (int pixel = 0; pixel < npixels; pixel++) {
int v = ((((MAX_PIXEL * line) / nlines)+offset) % MAX_PIXEL) << 16
| ((((MAX_PIXEL * pixel) / npixels)+offset) % MAX_PIXEL);
if (!v)
v = 1;
if (line < 20 && pixel < 20)
v = corner[(corner_index+0) % 4];
if (line < 30 && pixel > npixels - 40)
v = corner[(corner_index+1) % 4];
if (line > nlines - 20 && pixel < 20)
v = corner[(corner_index+2) % 4];
if (line > nlines - 30 && pixel > npixels - 40)
v = corner[(corner_index+3) % 4];
if (line < 20 && pixel % 20 < 2)
v = corner[(corner_index+0) % 4];
if (line % 30 < 2 && pixel > npixels - 40)
v = corner[(corner_index+1) % 4];
ptr[line * npixels + pixel] = v;
}
corner_index = offset/16;
portalCacheFlush(allocFrame[frame_index], dataptr[frame_index], fbsize, 1);
device->startFrameBuffer(ref_srcAlloc[frame_index], fbsize);
hdmiGenerator->setTestPattern(0);
hdmiGenerator->waitForVsync(0);
frame_index = 1 - frame_index;
}
int main(int argc, const char **argv)
{
unsigned int srcGen = 0;
NandSimRequestProxy *device = 0;
NandSimIndication *deviceIndication = 0;
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
device = new NandSimRequestProxy(IfcNames_NandSimRequest);
deviceIndication = new NandSimIndication(IfcNames_NandSimIndication);
DmaManager *dma = platformInit();
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(numBytes, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, numBytes);
fprintf(stderr, "fd=%d, srcBuffer=%p\n", srcAlloc, srcBuffer);
for (int i = 0; i < numBytes/sizeof(srcBuffer[0]); i++)
srcBuffer[i] = srcGen++;
portalCacheFlush(srcAlloc, srcBuffer, numBytes, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
sleep(1);
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
nandAlloc = portalAlloc(nandBytes, 0);
int ref_nandAlloc = dma->reference(nandAlloc);
fprintf(stderr, "NAND alloc fd=%d ref=%d\n", nandAlloc, ref_nandAlloc);
device->configureNand(ref_nandAlloc, nandBytes);
deviceIndication->wait();
fprintf(stderr, "Main::starting write ref=%d, len=%08zx\n", ref_srcAlloc, numBytes);
device->startWrite(ref_srcAlloc, 0, 0, numBytes, 16);
deviceIndication->wait();
fprintf(stderr, "Main::starting read %08zx\n", numBytes);
device->startRead(ref_srcAlloc, 0, 0, numBytes, 16);
deviceIndication->wait();
fprintf(stderr, "Main::starting erase %08zx\n", numBytes);
device->startErase(0, numBytes);
deviceIndication->wait();
fprintf(stderr, "Main::starting read %08zx\n", numBytes);
device->startRead(ref_srcAlloc, 0, 0, numBytes, 16);
deviceIndication->wait();
return 0;
}
int initNandSim(DmaManager *hostDma)
{
NandCfgRequestProxy *nandcfgRequest = new NandCfgRequestProxy(IfcNames_NandCfgRequestS2H);
NandCfgIndication *nandcfgIndication = new NandCfgIndication(IfcNames_NandCfgIndicationH2S);
int nandBytes = 1 << 12;
int nandAlloc = portalAlloc(nandBytes, 0);
fprintf(stderr, "testnandsim::nandAlloc=%d\n", nandAlloc);
int ref_nandAlloc = hostDma->reference(nandAlloc);
fprintf(stderr, "ref_nandAlloc=%d\n", ref_nandAlloc);
fprintf(stderr, "testnandsim::NAND alloc fd=%d ref=%d\n", nandAlloc, ref_nandAlloc);
nandcfgRequest->configureNand(ref_nandAlloc, nandBytes);
nandcfgIndication->wait();
const char *filename = "../test.bin";
fprintf(stderr, "testnandsim::opening %s\n", filename);
// open up the text file and read it into an allocated memory buffer
int data_fd = open(filename, O_RDONLY);
if (data_fd < 0) {
fprintf(stderr, "%s:%d failed to open file %s errno=%d:%s\n", __FUNCTION__, __LINE__, filename, errno, strerror(errno));
return 0;
}
off_t data_len = lseek(data_fd, 0, SEEK_END);
fprintf(stderr, "%s:%d fd=%d data_len=%ld\n", __FUNCTION__, __LINE__, data_fd, data_len);
data_len = data_len & ~15; // because we are using a burst length of 16
lseek(data_fd, 0, SEEK_SET);
int dataAlloc = portalAlloc(data_len, 0);
char *data = (char *)portalMmap(dataAlloc, data_len);
ssize_t read_len = read(data_fd, data, data_len);
if(read_len != data_len) {
fprintf(stderr, "%s:%d::error reading %s %ld %ld\n", __FUNCTION__, __LINE__, filename, (long)data_len, (long) read_len);
exit(-1);
}
int ref_dataAlloc = hostDma->reference(dataAlloc);
// write the contents of data into "flash" memory
portalCacheFlush(ref_dataAlloc, data, data_len, 1);
fprintf(stderr, "testnandsim::invoking write %08x %08lx\n", ref_dataAlloc, (long)data_len);
nandcfgRequest->startWrite(ref_dataAlloc, 0, 0, data_len, 16);
nandcfgIndication->wait();
fprintf(stderr, "%s:%d finished -- data_len=%ld\n", __FUNCTION__, __LINE__, data_len);
return data_len;
}
int main(int argc, const char **argv)
{
int mismatch = 0;
uint32_t sg = 0;
int max_error = 10;
if (sem_init(&test_sem, 1, 0)) {
fprintf(stderr, "error: failed to init test_sem\n");
exit(1);
}
fprintf(stderr, "testmemwrite: start %s %s\n", __DATE__, __TIME__);
DmaManager *dma = platformInit();
MemwriteRequestProxy *device = new MemwriteRequestProxy(IfcNames_MemwriteRequestS2H);
MemwriteIndication deviceIndication(IfcNames_MemwriteIndicationH2S);
fprintf(stderr, "main::allocating memory...\n");
int dstAlloc = portalAlloc(alloc_sz, 0);
unsigned int *dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
#ifdef FPGA0_CLOCK_FREQ
long req_freq = FPGA0_CLOCK_FREQ, freq = 0;
setClockFrequency(0, req_freq, &freq);
fprintf(stderr, "Requested FCLK[0]=%ld actually %ld\n", req_freq, freq);
#endif
unsigned int ref_dstAlloc = dma->reference(dstAlloc);
for (int i = 0; i < numWords; i++)
dstBuffer[i] = 0xDEADBEEF;
portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
fprintf(stderr, "testmemwrite: flush and invalidate complete\n");
fprintf(stderr, "testmemwrite: starting write %08x\n", numWords);
portalTimerStart(0);
device->startWrite(ref_dstAlloc, 0, numWords, burstLen, iterCnt);
sem_wait(&test_sem);
for (int i = 0; i < numWords; i++) {
if (dstBuffer[i] != sg) {
mismatch++;
if (max_error-- > 0)
fprintf(stderr, "testmemwrite: [%d] actual %08x expected %08x\n", i, dstBuffer[i], sg);
}
sg++;
}
platformStatistics();
fprintf(stderr, "testmemwrite: mismatch count %d.\n", mismatch);
exit(mismatch);
}
int main(int argc, const char **argv)
{
ReadTestRequestProxy *device = new ReadTestRequestProxy(IfcNames_ReadTestRequestS2H);
ReadTestIndication deviceIndication(IfcNames_ReadTestIndicationH2S);
DmaManager *dma = platformInit();
int srcAlloc;
srcAlloc = portalAlloc(test_sz, 0);
unsigned int *srcBuffer = (unsigned int *)portalMmap(srcAlloc, test_sz);
for (unsigned int i = 0; i < test_sz/sizeof(unsigned int); i++)
srcBuffer[i] = i;
portalCacheFlush(srcAlloc, srcBuffer, test_sz, 1);
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
printf( "Main::starting read %lx\n", test_sz);
device->startRead(ref_srcAlloc, test_sz, burstLen, 1);
sem_wait(&test_sem);
return 0;
}
int reader::read_circ_buff(int buff_len, unsigned int ref_dstAlloc, int dstAlloc, char* dstBuffer, char *snapshot, int write_addr, int write_wrap_cnt)
{
int dwc = write_wrap_cnt - wrap_cnt;
int two,top,bottom,datalen=0;
if(dwc == 0){
assert(addr <= write_addr);
two = false;
top = write_addr;
bottom = addr;
datalen = write_addr - addr;
} else if (dwc == 1 && addr > write_addr) {
two = true;
top = addr;
bottom = write_addr;
datalen = (buff_len-top)+bottom;
} else if (write_addr == 0) {
two = false;
top = buff_len;
bottom = 0;
datalen = buff_len;
} else {
two = true;
top = write_addr;
bottom = write_addr;
datalen = buff_len;
fprintf(stderr, "WARNING: sock_server::read_circ_buffer dwc>1\n");
}
portalCacheFlush(dstAlloc, dstBuffer, buff_len, 1);
if (verbose) fprintf(stderr, "bottom:%4x, top:%4x, two:%d, datalen:%4x, dwc:%d\n", bottom,top,two,datalen,dwc);
if (datalen){
if (two) {
memcpy(snapshot, dstBuffer+top, datalen-bottom);
memcpy(snapshot+(datalen-bottom), dstBuffer, bottom );
} else {
memcpy(snapshot, dstBuffer+bottom, datalen );
}
}
addr = write_addr;
wrap_cnt = write_wrap_cnt;
return datalen;
}
int main(int argc, const char **argv)
{
size_t alloc_sz = 1024*1024;
MemwriteRequestProxy *device = new MemwriteRequestProxy(IfcNames_MemwriteRequestS2H);
MemwriteIndication deviceIndication(IfcNames_MemwriteIndicationH2S);
DmaManager *dma = platformInit();
sem_init(&done_sem, 1, 0);
int dstAlloc = portalAlloc(alloc_sz, 0);
unsigned int *dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
for (unsigned int i = 0; i < alloc_sz/sizeof(uint32_t); i++)
dstBuffer[i] = 0xDEADBEEF;
portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
fprintf(stderr, "parent::starting write\n");
unsigned int ref_dstAlloc = dma->reference(dstAlloc);
device->startWrite(ref_dstAlloc, alloc_sz, 2 * sizeof(uint32_t));
sem_wait(&done_sem);
memdump((unsigned char *)dstBuffer, 32, "MEM");
fprintf(stderr, "%s: done\n", __FUNCTION__);
}
int main(int argc, const char **argv)
{
fprintf(stderr, "%s %s\n", __DATE__, __TIME__);
RegexpRequestProxy *device = new RegexpRequestProxy(IfcNames_RegexpRequestS2H);
DmaManager *hostDma = platformInit();
RegexpIndication *deviceIndication = new RegexpIndication(IfcNames_RegexpIndicationH2S);
haystack_dma = hostDma;
haystack_mmu = hostMMURequest;
regexp = device;
if(sem_init(&test_sem, 1, 0)){
fprintf(stderr, "failed to init test_sem\n");
return -1;
}
// this is hard-coded into the REParser.java
assert(32 == MAX_NUM_STATES);
assert(32 == MAX_NUM_CHARS);
if(1){
P charMapP;
P stateMapP;
P stateTransitionsP;
readfile("jregexp.charMap", &charMapP);
readfile("jregexp.stateMap", &stateMapP);
readfile("jregexp.stateTransitions", &stateTransitionsP);
portalCacheFlush(charMapP.alloc, charMapP.mem, charMapP.length, 1);
portalCacheFlush(stateMapP.alloc, stateMapP.mem, stateMapP.length, 1);
portalCacheFlush(stateTransitionsP.alloc, stateTransitionsP.mem, stateTransitionsP.length, 1);
for(int i = 0; i < num_tests; i++){
device->setup(charMapP.ref, charMapP.length);
device->setup(stateMapP.ref, stateMapP.length);
device->setup(stateTransitionsP.ref, stateTransitionsP.length);
readfile("test.bin", &haystackP[i]);
portalCacheFlush(haystackP[i].alloc, haystackP[i].mem, haystackP[i].length, 1);
if(i==0)
sw_match_cnt = num_tests*sw_ref(&haystackP[0], &charMapP, &stateMapP, &stateTransitionsP);
sem_wait(&test_sem);
int token = deviceIndication->token;
assert(token < max_num_tokens);
token_map[token] = i;
// Regexp uses a data-bus width of 8 bytes. length must be a multiple of this dimension
device->search(token, haystackP[i].ref, haystackP[i].length & ~((1<<3)-1));
}
sem_wait(&test_sem);
close(charMapP.alloc);
close(stateMapP.alloc);
close(stateTransitionsP.alloc);
}
fprintf(stderr, " testregexp: Done, hw_match_cnt=%d, sw_match_cnt=%d\n", hw_match_cnt, sw_match_cnt);
sleep(1);
return (hw_match_cnt == sw_match_cnt ? 0 : -1);
}
int runtest(int argc, const char ** argv)
{
int test_result = 0;
int srcAlloc;
unsigned int *srcBuffer = 0;
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
MemreadRequestProxy *device = new MemreadRequestProxy(IfcNames_MemreadRequestS2H);
MemreadIndication deviceIndication(IfcNames_MemreadIndicationH2S);
DmaManager *dma = platformInit();
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
#ifdef FPGA0_CLOCK_FREQ
long req_freq = FPGA0_CLOCK_FREQ;
long freq = 0;
setClockFrequency(0, req_freq, &freq);
fprintf(stderr, "Requested FCLK[0]=%ld actually %ld\n", req_freq, freq);
#endif
for (int i = 0; i < numWords; i++){
srcBuffer[i] = i;
}
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
if(true) {
fprintf(stderr, "Main::test read %08x\n", numWords);
// first attempt should get the right answer
device->startRead(ref_srcAlloc, 0, numWords, burstLen);
sem_wait(&test_sem);
if (mismatchCount) {
fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount);
test_result++; // failed
}
}
int err = 5;
switch (err){
case 0:
{
fprintf(stderr, "Main: attempt to use a de-referenced sglist\n");
dma->dereference(ref_srcAlloc);
device->startRead(ref_srcAlloc, 0, numWords, burstLen);
break;
}
case 1:
{
fprintf(stderr, "Main: attempt to use an out-of-range sglist\n");
device->startRead(ref_srcAlloc+32, 0, numWords, burstLen);
break;
}
case 2:
{
fprintf(stderr, "Main: attempt to use an invalid sglist\n");
device->startRead(ref_srcAlloc+1, 0, numWords, burstLen);
break;
}
case 3:
{
fprintf(stderr, "Main: attempt to use an invalid mmusel\n");
device->startRead(ref_srcAlloc | (1<<16), 0, numWords, burstLen);
break;
}
case 4:
{
fprintf(stderr, "Main: attempt to read off the end of the region\n");
device->startRead(ref_srcAlloc, numWords<<2, burstLen, burstLen);
break;
}
default:
{
device->startRead(ref_srcAlloc, 0, numWords, burstLen);
}
}
sem_wait(&test_sem);
if (mismatchCount) {
fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount);
test_result++; // failed
}
return test_result;
}
int main(int argc, const char **argv)
{
if(sem_init(&done_sem, 1, 0)) {
fprintf(stderr, "failed to init done_sem\n");
exit(1);
}
if(sem_init(&memcmp_sem, 1, 0)) {
fprintf(stderr, "failed to init memcmp_sem\n");
exit(1);
}
fprintf(stderr, "%s %s\n", __DATE__, __TIME__);
MemcpyRequestProxy *device = new MemcpyRequestProxy(IfcNames_MemcpyRequestS2H);
deviceIndication = new MemcpyIndication(IfcNames_MemcpyIndicationH2S);
DmaManager *dma = platformInit();
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz, 0);
dstAlloc = portalAlloc(alloc_sz, 0);
// for(int i = 0; i < srcAlloc->header.numEntries; i++)
// fprintf(stderr, "%lx %lx\n", srcAlloc->entries[i].dma_address, srcAlloc->entries[i].length);
// for(int i = 0; i < dstAlloc->header.numEntries; i++)
// fprintf(stderr, "%lx %lx\n", dstAlloc->entries[i].dma_address, dstAlloc->entries[i].length);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
for (int i = 0; i < numWords; i++) {
srcBuffer[i] = i;
dstBuffer[i] = 0x5a5abeef;
}
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
unsigned int ref_dstAlloc = dma->reference(dstAlloc);
fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
fprintf(stderr, "ref_dstAlloc=%d\n", ref_dstAlloc);
// unsigned int refs[2] = {ref_srcAlloc, ref_dstAlloc};
// for(int j = 0; j < 2; j++){
// unsigned int ref = refs[j];
// for(int i = 0; i < numWords; i = i+(numWords/4)){
// dmap->addrRequest(ref, i*sizeof(unsigned int));
// sleep(1);
// }
// dmap->addrRequest(ref, (1<<16)*sizeof(unsigned int));
// sleep(1);
// }
fprintf(stderr, "Main::starting memcpy numWords:%d\n", numWords);
int burstLen = 32;
#ifndef SIMULATION
int iterCnt = 128;
#else
int iterCnt = 2;
#endif
portalTimerStart(0);
device->startCopy(ref_dstAlloc, ref_srcAlloc, numWords, burstLen, iterCnt);
sem_wait(&done_sem);
platformStatistics();
//float read_util = (float)read_beats/(float)cycles;
//float write_util = (float)write_beats/(float)cycles;
//fprintf(stderr, " iters: %d\n", iterCnt);
//fprintf(stderr, "wr_beats: %"PRIx64" %08lx\n", write_beats, (long)write_beats);
//fprintf(stderr, "rd_beats: %"PRIx64" %08lx\n", read_beats, (long)read_beats);
//fprintf(stderr, "numWords: %x\n", numWords);
//fprintf(stderr, " wr_est: %"PRIx64"\n", (write_beats*2)/iterCnt);
//fprintf(stderr, " rd_est: %"PRIx64"\n", (read_beats*2)/iterCnt);
//fprintf(stderr, "memory read utilization (beats/cycle): %f\n", read_util);
//fprintf(stderr, "memory write utilization (beats/cycle): %f\n", write_util);
#if 0
MonkitFile pmf("perf.monkit");
pmf.setHwCycles(cycles)
.setReadBwUtil(read_util)
.setWriteBwUtil(write_util)
.writeFile();
fprintf(stderr, "After updating perf.monkit\n");
#endif
sem_wait(&memcmp_sem);
fprintf(stderr, "after memcmp_sem memcmp_fail=%d\n", memcmp_fail);
return memcmp_fail;
}
int main(int argc, const char **argv)
{
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
DmaManager *hostDma = platformInit();
MMURequestProxy *nandsimMMU = new MMURequestProxy(IfcNames_NandMMURequestS2H);
DmaManager *nandsimDma = new DmaManager(nandsimMMU);
MMUIndicationNAND nandsimMMUIndication(nandsimDma,IfcNames_NandMMUIndicationH2S);
StrstrRequestProxy *strstrRequest = new StrstrRequestProxy(IfcNames_AlgoRequestS2H);
StrstrIndication *strstrIndication = new StrstrIndication(IfcNames_AlgoIndicationH2S);
//MemServerIndicationNAND nandsimMemServerIndication(IfcNames_NandMemServerIndication);
fprintf(stderr, "Main::allocating memory...\n");
// allocate memory for strstr data
int needleAlloc = portalAlloc(numBytes, 0);
int mpNextAlloc = portalAlloc(numBytes, 0);
int ref_needleAlloc = hostDma->reference(needleAlloc);
int ref_mpNextAlloc = hostDma->reference(mpNextAlloc);
fprintf(stderr, "%08x %08x\n", ref_needleAlloc, ref_mpNextAlloc);
char *needle = (char *)portalMmap(needleAlloc, numBytes);
int *mpNext = (int *)portalMmap(mpNextAlloc, numBytes);
const char *needle_text = "ababab";
int needle_len = strlen(needle_text);
strncpy(needle, needle_text, needle_len);
compute_MP_next(needle, mpNext, needle_len);
// fprintf(stderr, "mpNext=[");
// for(int i= 0; i <= needle_len; i++)
// fprintf(stderr, "%d ", mpNext[i]);
// fprintf(stderr, "]\nneedle=[");
// for(int i= 0; i < needle_len; i++)
// fprintf(stderr, "%d ", needle[i]);
// fprintf(stderr, "]\n");
portalCacheFlush(needleAlloc, needle, numBytes, 1);
portalCacheFlush(mpNextAlloc, mpNext, numBytes, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
fprintf(stderr, "Main::waiting to connect to nandsim_exe\n");
wait_for_connect_nandsim_exe();
fprintf(stderr, "Main::connected to nandsim_exe\n");
// base of haystack in "flash" memory
// this is read from nandsim_exe, but could also come from kernel driver
int haystack_base = read_from_nandsim_exe();
int haystack_len = read_from_nandsim_exe();
fprintf(stderr, "haystack_base=%d haystack_len=%d\n", haystack_base, haystack_len);
// request the next sglist identifier from the sglistMMU hardware module
// which is used by the mem server accessing flash memory.
int id = 0;
MMURequest_idRequest(nandsimDma->priv.sglDevice, 0);
sem_wait(&nandsimDma->priv.sglIdSem);
id = nandsimDma->priv.sglId;
// pairs of ('offset','size') pointing to space in nandsim memory
// this is unsafe. To do it properly, we should get this list from
// nandsim_exe or from the kernel driver. This code here might overrun
// the backing store allocated by nandsim_exe.
RegionRef region[] = {{0, 0x100000}, {0x100000, 0x100000}};
printf("[%s:%d]\n", __FUNCTION__, __LINE__);
int ref_haystackInNandMemory = send_reference_to_portal(nandsimDma->priv.sglDevice, sizeof(region)/sizeof(region[0]), region, id);
sem_wait(&(nandsimDma->priv.confSem));
fprintf(stderr, "%08x\n", ref_haystackInNandMemory);
// at this point, ref_needleAlloc and ref_mpNextAlloc are valid sgListIds for use by
// the host memory dma hardware, and ref_haystackInNandMemory is a valid sgListId for
// use by the nandsim dma hardware
fprintf(stderr, "about to setup device %d %d\n", ref_needleAlloc, ref_mpNextAlloc);
strstrRequest->setup(ref_needleAlloc, ref_mpNextAlloc, needle_len);
fprintf(stderr, "about to invoke search %d\n", ref_haystackInNandMemory);
strstrRequest->search(ref_haystackInNandMemory, haystack_len);
strstrIndication->wait();
fprintf(stderr, "algo1_nandsim: Done %d\n", (strstrIndication->match_cnt==3));
sleep(2);
exit(!(strstrIndication->match_cnt==3));
}
void PortalMatAllocator::cacheFlushInvalidate(int* refcount, uchar* datastart, uchar* data)
{
struct arrayInfo *info = (struct arrayInfo *)refcount;
portalCacheFlush(info->fd, datastart, info->totalsize, 1);
}
int main(int argc, const char **argv)
{
int srcAlloc;
unsigned int *srcBuffer;
unsigned int ref_srcAlloc;
unsigned int i;
pthread_t tid = 0;
init_portal_internal(&intarr[0], IfcNames_MMUIndicationH2S, 0, MMUIndication_handleMessage, &MMUIndication_cbTable, NULL, NULL, MMUIndication_reqinfo);// fpga1
init_portal_internal(&intarr[1], IfcNames_ReadTestIndicationH2S,0, ReadTestIndication_handleMessage, &ReadTestIndication_cbTable, NULL, NULL, ReadTestIndication_reqinfo); // fpga2
init_portal_internal(&intarr[2], IfcNames_MMURequestS2H, 0, NULL, NULL, NULL, NULL, MMURequest_reqinfo); // fpga3
init_portal_internal(&intarr[3], IfcNames_ReadTestRequestS2H,0, NULL, NULL, NULL, NULL, ReadTestRequest_reqinfo); // fpga4
sem_init(&test_sem, 0, 0);
DmaManager_init(&priv, &intarr[2]);
srcAlloc = portalAlloc(numBytes, 0);
if (srcAlloc < 0){
PORTAL_PRINTF("portal alloc failed rc=%d\n", srcAlloc);
return srcAlloc;
}
srcBuffer = (unsigned int *)portalMmap(srcAlloc, numBytes);
for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++)
srcBuffer[i] = i;
portalCacheFlush(srcAlloc, srcBuffer, numBytes, 1);
PORTAL_PRINTF( "Main: creating exec thread\n");
if(pthread_create(&tid, NULL, pthread_worker, NULL)){
PORTAL_PRINTF( "error creating exec thread\n");
return -1;
}
PORTAL_PRINTF( "Test 1: check for match\n");
PORTAL_PRINTF( "Main: before DmaManager_reference(%x)\n", srcAlloc);
ref_srcAlloc = DmaManager_reference(&priv, srcAlloc);
PORTAL_PRINTF( "Main: starting read %08x\n", numBytes);
ReadTestRequest_startRead (&intarr[3], ref_srcAlloc, numBytes, burstLen, 1);
PORTAL_PRINTF( "Main: waiting for semaphore1\n");
sem_wait(&test_sem);
PORTAL_PRINTF( "Test 2: check that mismatch is detected\n");
srcBuffer[0] = -1;
srcBuffer[numBytes/sizeof(srcBuffer[0])/2] = -1;
srcBuffer[numBytes/sizeof(srcBuffer[0])-1] = -1;
portalCacheFlush(srcAlloc, srcBuffer, numBytes, 1);
ReadTestRequest_startRead (&intarr[3], ref_srcAlloc, numBytes, burstLen, 1);
PORTAL_PRINTF( "Main: waiting for semaphore2\n");
sem_wait(&test_sem);
PORTAL_PRINTF( "Main: all done\n");
#ifdef __KERNEL__
if (tid && !kthread_stop (tid)) {
printk("kthread stops");
}
wait_for_completion(&worker_completion);
#endif
#ifdef __KERNEL__
portalmem_dmabuffer_destroy(srcAlloc);
#endif
return 0;
}
int main(int argc, const char **argv)
{
testPassed=true;
fprintf(stderr, "Initializing Connectal & DMA...\n");
device = new FlashRequestProxy(IfcNames_FlashRequestS2H);
FlashIndication deviceIndication(IfcNames_FlashIndicationH2S);
DmaManager *dma = platformInit();
fprintf(stderr, "Main::allocating memory...\n");
// Memory for DMA
srcAlloc = portalAlloc(srcAlloc_sz, 0);
dstAlloc = portalAlloc(dstAlloc_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, srcAlloc_sz); // Host->Flash Write
dstBuffer = (unsigned int *)portalMmap(dstAlloc, dstAlloc_sz); // Flash->Host Read
// Memory for FTL
blkmapAlloc = portalAlloc(blkmapAlloc_sz * 2, 0);
char *ftlPtr = (char*)portalMmap(blkmapAlloc, blkmapAlloc_sz * 2);
blkmap = (uint16_t(*)[NUM_LOGBLKS]) (ftlPtr); // blkmap[Seg#][LogBlk#]
blkmgr = (uint16_t(*)[NUM_CHIPS][NUM_BLOCKS]) (ftlPtr+blkmapAlloc_sz); // blkmgr[Bus][Chip][Block]
fprintf(stderr, "dstAlloc = %x\n", dstAlloc);
fprintf(stderr, "srcAlloc = %x\n", srcAlloc);
fprintf(stderr, "blkmapAlloc = %x\n", blkmapAlloc);
pthread_mutex_init(&flashReqMutex, NULL);
pthread_cond_init(&flashFreeTagCond, NULL);
printf( "Done initializing hw interfaces\n" ); fflush(stdout);
portalCacheFlush(dstAlloc, dstBuffer, dstAlloc_sz, 1);
portalCacheFlush(srcAlloc, srcBuffer, srcAlloc_sz, 1);
portalCacheFlush(blkmapAlloc, blkmap, blkmapAlloc_sz*2, 1);
ref_dstAlloc = dma->reference(dstAlloc);
ref_srcAlloc = dma->reference(srcAlloc);
ref_blkmapAlloc = dma->reference(blkmapAlloc);
device->setDmaWriteRef(ref_dstAlloc);
device->setDmaReadRef(ref_srcAlloc);
device->setDmaMapRef(ref_blkmapAlloc);
for (int t = 0; t < NUM_TAGS; t++) {
readTagTable[t].busy = false;
writeTagTable[t].busy = false;
eraseTagTable[t].busy = false;
int byteOffset = t * FPAGE_SIZE;
readBuffers[t] = dstBuffer + byteOffset/sizeof(unsigned int);
writeBuffers[t] = srcBuffer + byteOffset/sizeof(unsigned int);
}
for (int lpa=0; lpa < NUM_SEGMENTS*NUM_LOGBLKS*NUM_PAGES_PER_BLK; lpa++) {
flashStatus[lpa] = UNINIT;
}
for (int t = 0; t < NUM_TAGS; t++) {
for ( unsigned int i = 0; i < FPAGE_SIZE/sizeof(unsigned int); i++ ) {
readBuffers[t][i] = 0xDEADBEEF;
writeBuffers[t][i] = 0xBEEFDEAD;
}
}
long actualFrequency=0;
long requestedFrequency=1e9/MainClockPeriod;
int status = setClockFrequency(0, requestedFrequency, &actualFrequency);
fprintf(stderr, "Requested Freq: %5.2f, Actual Freq: %5.2f, status=%d\n"
,(double)requestedFrequency*1.0e-6
,(double)actualFrequency*1.0e-6,status);
printf( "Start!\n" ); fflush(stdout);
device->start(0);
device->setDebugVals(0,0); //flag, delay
device->debugDumpReq(0);
sleep(1);
printf( "Read initial FTL table from table.dump.0\n" ); fflush(stdout);
// Read Initial FTL table
if (readFTLfromFile("table.dump.0", ftlPtr) != 0) {
fprintf(stderr, "Read Failure\n");
return -1;
}
printf( "Done reading table.dump.0\n" ); fflush(stdout);
printf( "MAP Upload to HW!\n" ); fflush(stdout);
device->uploadMap();
timespec start, now;
clock_gettime(CLOCK_REALTIME, & start);
printf( "Test Write!\n" ); fflush(stdout);
for (int logblk = 0; logblk < NUM_LOGBLKS; logblk++){
// test only 1024 segments due to some bad blocks (cannot allocate full 4096 segments)
for (int segnum = 0; segnum < 1024; segnum++) {
// assuming page_ofs = 0
int lpa = (segnum<<14) + logblk;
int freeTag = waitIdleWriteBuffer();
// fill write memory
for (unsigned int w=0; w<FPAGE_SIZE_VALID/sizeof(unsigned int); w++) {
writeBuffers[freeTag][w] = hashAddrToData(lpa, w);
}
writePage(freeTag, lpa);
}
}
while (true) {
usleep(100);
if ( getNumWritesInFlight() == 0 ) break;
}
// read back Map and Save to table.dump.1
device->downloadMap(); // read table from FPGA
if(writeFTLtoFile("table.dump.1", ftlPtr) != 0) {
fprintf(stderr, "Write Failure\n");
return -1;
}
printf( "Test Read!\n" ); fflush(stdout);
for (int logblk = 0; logblk < NUM_LOGBLKS; logblk++){
// test only 1024 segments due to some bad blocks (cannot allocate full 4096 segments)
for (int segnum = 0; segnum < 1024; segnum++) {
// assuming page_ofs = 0
int lpa = (segnum<<14) + logblk;
readPage(waitIdleReadBuffer(), lpa);
}
}
while (true) {
usleep(100);
if ( getNumReadsInFlight() == 0 ) break;
}
printf( "Test Erase!\n" ); fflush(stdout);
for (int logblk = 0; logblk < NUM_LOGBLKS; logblk++){
// test only 1024 segments due to some bad blocks (cannot allocate full 4096 segments)
for (int segnum = 0; segnum < 1024; segnum++) {
// assuming page_ofs = 0
int lpa = (segnum<<14) + logblk;
eraseBlock(waitIdleEraseTag(), lpa);
}
}
while (true) {
usleep(100);
if ( getNumErasesInFlight() == 0 ) break;
}
int elapsed = 0;
while (true) {
usleep(100);
if (elapsed == 0) {
elapsed=10000;
device->debugDumpReq(0);
}
else {
elapsed--;
}
if ( getNumReadsInFlight() == 0 ) break;
}
device->debugDumpReq(0);
clock_gettime(CLOCK_REALTIME, & now);
fprintf(stderr, "LOG: finished reading from page! %f\n", timespec_diff_sec(start, now) );
sleep(2);
}
int main(int argc, const char **argv)
{
int i;
int srcAlloc;
int dstAlloc;
unsigned int *srcBuffer = 0;
unsigned int *dstBuffer = 0;
FMComms1RequestProxy *device = 0;
FMComms1Indication *deviceIndication = 0;
BlueScopeEventPIORequestProxy *bluescope = 0;
BlueScopeEventPIOIndication *bluescopeIndication = 0;
fprintf(stdout, "Main::%s %s\n", __DATE__, __TIME__);
if(sem_init(&cv_sem, 1, 0)){
fprintf(stdout, "failed to init cv_sem\n");
exit(1);
}
if(sem_init(&read_sem, 1, 0)){
fprintf(stdout, "failed to init read_sem\n");
exit(1);
}
if(sem_init(&write_sem, 1, 0)){
fprintf(stdout, "failed to init write_sem\n");
exit(1);
}
device = new FMComms1RequestProxy(IfcNames_FMComms1Request);
DmaManager *dma = platformInit();
deviceIndication = new FMComms1Indication(IfcNames_FMComms1Indication);
bluescope = new BlueScopeEventPIORequestProxy(IfcNames_BlueScopeEventPIORequest);
bluescopeIndication = new BlueScopeEventPIOIndication(IfcNames_BlueScopeEventPIOIndication);
fprintf(stdout, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
if ((char *) srcBuffer == MAP_FAILED) perror("srcBuffer mmap failed");
assert ((char *) srcBuffer != MAP_FAILED);
dstAlloc = portalAlloc(alloc_sz, 0);
dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
if ((char *) dstBuffer == MAP_FAILED) perror("dstBuffer mmap failed");
assert ((char *) dstBuffer != MAP_FAILED);
int status;
status = setClockFrequency(0, 100000000, 0);
/* FMComms1 refclk should be 30 MHz */
status = setClockFrequency(1, 30000000, 0);
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
fprintf(stdout, "Main::flush and invalidate complete\n");
bluescope->doReset();
WHERE();
bluescope->setTriggerMask (0xFFFFFFFF);
WHERE();
bluescope->getCounterValue();
WHERE();
bluescope->enableIndications(1);
WHERE();
sem_wait(&cv_sem);
fprintf(stdout, "Main::initial BlueScopeEventPIO counterValue: %d\n", counter_value);
device->getReadStatus();
device->getWriteStatus();
sem_wait(&read_sem);
sem_wait(&write_sem);
fprintf(stdout, "Main::after getStateDbg\n");
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
fprintf(stdout, "ref_srcAlloc=%d\n", ref_srcAlloc);
unsigned int ref_dstAlloc = dma->reference(dstAlloc);
fprintf(stdout, "ref_dstAlloc=%d\n", ref_dstAlloc);
fprintf(stdout, "Main::starting read %08x\n", numWords);
device->startRead(ref_srcAlloc, numWords, readBurstLen, 1);
device->startWrite(ref_dstAlloc, numWords, writeBurstLen, 1);
sem_wait(&read_sem);
sleep(5);
device->getReadStatus();
device->getWriteStatus();
sem_wait(&read_sem);
sem_wait(&write_sem);
sleep(5);
fprintf(stdout, "Main::stopping reads\n");
device->startRead(ref_srcAlloc, numWords, readBurstLen, 0);
fprintf(stdout, "Main::stopping writes\n");
device->startWrite(ref_dstAlloc, numWords, writeBurstLen, 0);
device->getReadStatus();
device->getWriteStatus();
sem_wait(&read_sem);
sem_wait(&write_sem);
testi2c("/dev/i2c-1", 0x58);
bluescope->getCounterValue();
fprintf(stdout, "Main::getCounter\n");
sem_wait(&cv_sem);
fprintf(stdout, "Main::final BlueScopeEventPIO counterValue: %d\n", counter_value);
fprintf(stdout, "received %d events\n", eventcount);
for (i = 0; i < eventcount; i += 1) {
fprintf(stdout, "reportEvent(0x%08x, 0x%08x)\n", events[i], timestamps[i]);
}
exit(0);
}
int main(int argc, const char **argv)
{
int srcAlloc;
int nandAlloc;
unsigned int *srcBuffer;
unsigned int ref_srcAlloc;
unsigned int ref_nandAlloc;
int rc = 0, i;
pthread_t tid = 0;
init_portal_internal(&intarr[0], IfcNames_DmaIndication, DmaIndication_handleMessage, NULL, NULL, DmaIndication_reqinfo); // fpga1
init_portal_internal(&intarr[1], IfcNames_NandSimIndication, NandSimIndication_handleMessage, NULL, NULL, NandSimIndication_reqinfo); // fpga2
init_portal_internal(&intarr[2], IfcNames_DmaConfig, NULL, NULL, NULL, DmaConfig_reqinfo); // fpga3
init_portal_internal(&intarr[3], IfcNames_NandSimRequest, NULL, NULL, NULL, NandSimRequest_reqinfo); // fpga4
sem_init(&test_sem, 0, 0);
DmaManager_init(&priv, &intarr[2]);
srcAlloc = portalAlloc(alloc_sz, 0);
if (rc){
PORTAL_PRINTF("portal alloc failed rc=%d\n", rc);
return rc;
}
PORTAL_PRINTF( "Main: creating exec thread\n");
if(pthread_create(&tid, NULL, pthread_worker, NULL)){
PORTAL_PRINTF( "error creating exec thread\n");
return -1;
}
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
for (i = 0; i < numWords; i++) {
srcBuffer[i] = i;
}
PORTAL_PRINTF("Test 1: check for operations\n");
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
PORTAL_PRINTF("Main: before DmaManager_reference(%u)\n", srcAlloc);
ref_srcAlloc = DmaManager_reference(&priv, srcAlloc);
nandAlloc = portalAlloc (nandBytes, 0);
ref_nandAlloc = DmaManager_reference(&priv, nandAlloc);
PORTAL_PRINTF("Main::configure NAND fd=%d ref=%d\n", nandAlloc, ref_nandAlloc);
NandSimRequest_configureNand (&intarr[3], ref_nandAlloc, nandBytes);
sem_wait(&test_sem);
PORTAL_PRINTF( "Main::starting write - begin %08zx\n", numBytes);
NandSimRequest_startWrite (&intarr[3], ref_srcAlloc, 0, 0, numBytes, 16);
PORTAL_PRINTF( "Main:: wait for semaphore\n");
sem_wait(&test_sem);
for (i = 0; i < numWords; i++) {
srcBuffer[i] = 0;
}
PORTAL_PRINTF( "Main::starting read %08zx\n", numBytes);
NandSimRequest_startRead (&intarr[3], ref_srcAlloc, 0, 0, numBytes, 16);
sem_wait(&test_sem);
PORTAL_PRINTF ("read: %u %u %u %u\n", srcBuffer[0], srcBuffer[1], srcBuffer[2], srcBuffer[3]);
PORTAL_PRINTF( "Main::starting erase %08zx\n", numBytes);
NandSimRequest_startErase (&intarr[3], 0, numBytes);
sem_wait(&test_sem);
PORTAL_PRINTF( "Main::starting read %08zx\n", numBytes);
NandSimRequest_startRead (&intarr[3], ref_srcAlloc, 0, 0, numBytes, 16);
sem_wait(&test_sem);
PORTAL_PRINTF ("read: %u %u %u %u\n", srcBuffer[0], srcBuffer[1], srcBuffer[2], srcBuffer[3]);
PORTAL_PRINTF("\n\nTest 2: check for match\n");
{
unsigned long loop = 0;
unsigned long match = 0, mismatch = 0;
while (loop < nandBytes) {
int i;
for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) {
srcBuffer[i] = loop+i;
}
/*PORTAL_PRINTF("Main::starting write ref=%d, len=%08zx (%lu)\n", ref_srcAlloc, numBytes, loop);*/
NandSimRequest_startWrite (&intarr[3], ref_srcAlloc, 0, loop, numBytes, 16);
sem_wait(&test_sem);
loop+=numBytes;
}
loop = 0;
while (loop < nandBytes) {
int i;
/*PORTAL_PRINTF("Main::starting read %08zx (%lu)\n", numBytes, loop);*/
NandSimRequest_startRead (&intarr[3], ref_srcAlloc, 0, loop, numBytes, 16);
sem_wait(&test_sem);
for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) {
if (srcBuffer[i] != loop+i) {
PORTAL_PRINTF("Main::mismatch [%08zx] != [%08zx]\n", loop+i, srcBuffer[i]);
mismatch++;
} else {
match++;
}
}
loop+=numBytes;
}
PORTAL_PRINTF("Main::Summary: match=%lu mismatch:%lu (%lu) (%f percent)\n",
match, mismatch, match+mismatch, (float)mismatch/(float)(match+mismatch)*100.0);
}
PORTAL_PRINTF( "Main: all done\n");
#ifdef __KERNEL__
if (tid && !kthread_stop (tid)) {
PORTAL_PRINTF ("kthread stops\n");
}
wait_for_completion(&worker_completion);
#endif
PORTAL_PRINTF ("Main: ends\n");
return 0;
}
int main(int argc, const char **argv)
{
int srcAlloc;
int backAlloc;
unsigned int *srcBuffer;
unsigned int ref_srcAlloc;
unsigned int *backBuffer;
unsigned int ref_backAlloc;
int rc = 0, i;
pthread_t tid = 0;
init_portal_internal(&intarr[2], IfcNames_BackingStoreMMURequest, NULL, NULL, NULL, NULL, MMURequest_reqinfo); // fpga3
init_portal_internal(&intarr[0], IfcNames_BackingStoreMMUIndication, MMUIndication_handleMessage, &MMUIndication_cbTable, NULL, NULL, MMUIndication_reqinfo); // fpga1
init_portal_internal(&intarr[3], IfcNames_NandCfgRequest, NULL, NULL, NULL, NULL, NandCfgRequest_reqinfo); // fpga4
init_portal_internal(&intarr[1], IfcNames_NandCfgIndication, NandCfgIndication_handleMessage, &NandCfgIndication_cbTable, NULL, NULL, NandCfgIndication_reqinfo); // fpga2
DmaManager_init(&priv, &intarr[2]);
sem_init(&test_sem, 0, 0);
PORTAL_PRINTF( "Main: creating exec thread - %lu\n", sizeof (unsigned int) );
if(pthread_create(&tid, NULL, pthread_worker, NULL)){
PORTAL_PRINTF( "error creating exec thread\n");
return -1;
}
backAlloc = portalAlloc (back_sz, 0);
PORTAL_PRINTF("backAlloc=%d\n", backAlloc);
ref_backAlloc = DmaManager_reference(&priv, backAlloc);
PORTAL_PRINTF("ref_backAlloc=%d\n", ref_backAlloc);
backBuffer = (unsigned int*)portalMmap(backAlloc, back_sz);
portalCacheFlush(backAlloc, backBuffer, back_sz, 1);
NandCfgRequest_configureNand (&intarr[3], ref_backAlloc, back_sz);
PORTAL_PRINTF("Main::configure NAND fd=%d ref=%d\n", backAlloc, ref_backAlloc);
sem_wait(&test_sem);
srcAlloc = portalAlloc(back_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, back_sz);
ref_srcAlloc = DmaManager_reference(&priv, srcAlloc);
PORTAL_PRINTF("about to start write\n");
//write data to "flash" memory
strcpy((char*)srcBuffer, "acabcabacababacababababababcacabcabacababacabababc\n012345678912");
NandCfgRequest_startWrite(&intarr[3], ref_srcAlloc, 0, 0, 1024, 8);
sem_wait(&test_sem);
// at this point, if we were synchronizing with the algo_exe, we
// could tell it that it was OK to start searching
PORTAL_PRINTF ("initialization of data in \"flash\" memory complete\n");
#ifdef __KERNEL__
if (tid && !kthread_stop (tid)) {
PORTAL_PRINTF ("kthread stops\n");
}
wait_for_completion(&worker_completion);
msleep(20000);
#else
sleep(20);
#endif
#ifdef __KERNEL__
portalmem_dmabuffer_destroy(backAlloc);
portalmem_dmabuffer_destroy(srcAlloc);
#endif
PORTAL_PRINTF ("Main: ends\n");
return 0;
}