static void
hrowpic_dispatch(device_t dev, struct trapframe *tf)
{
struct hrowpic_softc *sc;
uint64_t mask;
uint32_t reg;
u_int irq;
sc = device_get_softc(dev);
while (1) {
mask = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY);
reg = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY);
mask = (mask << 32) | reg;
if (mask == 0)
break;
irq = 0;
while (irq < HROWPIC_IRQMAX) {
if (mask & 1)
powerpc_dispatch_intr(sc->sc_vector[irq], tf);
mask >>= 1;
irq++;
}
}
}
void
openpic_dispatch(device_t dev, struct trapframe *tf)
{
struct openpic_softc *sc;
u_int cpuid, vector;
CTR1(KTR_INTR, "%s: got interrupt", __func__);
cpuid = (dev == root_pic) ? PCPU_GET(cpuid) : 0;
sc = device_get_softc(dev);
while (1) {
vector = openpic_read(sc, OPENPIC_PCPU_IACK(cpuid));
vector &= OPENPIC_VECTOR_MASK;
if (vector == 255)
break;
powerpc_dispatch_intr(vector, tf);
}
}
static void
ps3pic_dispatch(device_t dev, struct trapframe *tf)
{
uint64_t bitmap, mask;
int irq;
struct ps3pic_softc *sc;
sc = device_get_softc(dev);
if (PCPU_GET(cpuid) == 0) {
bitmap = sc->bitmap_thread0[0];
mask = sc->mask_thread0[0];
} else {
bitmap = sc->bitmap_thread1[0];
mask = sc->mask_thread1[0];
}
while ((irq = ffsl(bitmap & mask) - 1) != -1) {
bitmap &= ~(1UL << irq);
powerpc_dispatch_intr(sc->sc_vector[63 - irq], tf);
}
}
static void
atpic_dispatch(device_t dev, struct trapframe *tf)
{
struct atpic_softc *sc;
uint8_t irq;
sc = device_get_softc(dev);
atpic_write(sc, ATPIC_MASTER, 0, OCW3_SEL | OCW3_P);
irq = atpic_read(sc, ATPIC_MASTER, 0);
atpic_write(sc, ATPIC_MASTER, 0, OCW3_SEL | OCW3_RR);
if ((irq & 0x80) == 0)
return;
if (irq == 0x82) {
atpic_write(sc, ATPIC_SLAVE, 0, OCW3_SEL | OCW3_P);
irq = atpic_read(sc, ATPIC_SLAVE, 0) + 8;
atpic_write(sc, ATPIC_SLAVE, 0, OCW3_SEL | OCW3_RR);
if ((irq & 0x80) == 0)
return;
}
powerpc_dispatch_intr(sc->sc_vector[irq & 0x0f], tf);
}